2021-11-19 05:59:46

by Ping-Ke Shih

[permalink] [raw]
Subject: [PATCH] rtw89: add AXIDMA and TX FIFO dump in mac_mem_dump

From: Chia-Yuan Li <[email protected]>

The AXIDMA is tx/rx packet transmission between PCIE host
and device, and TX FIFO is MAC TX data.
We dump them to ensure these memory buffers correct.

Signed-off-by: Chia-Yuan Li <[email protected]>
Signed-off-by: Ping-Ke Shih <[email protected]>
---
drivers/net/wireless/realtek/rtw89/debug.c | 5 +++++
drivers/net/wireless/realtek/rtw89/mac.h | 10 ++++++++++
2 files changed, 15 insertions(+)

diff --git a/drivers/net/wireless/realtek/rtw89/debug.c b/drivers/net/wireless/realtek/rtw89/debug.c
index 29eb188c888c7..dabee20b37c49 100644
--- a/drivers/net/wireless/realtek/rtw89/debug.c
+++ b/drivers/net/wireless/realtek/rtw89/debug.c
@@ -723,6 +723,7 @@ rtw89_debug_priv_mac_mem_dump_select(struct file *filp,
}

static const u32 mac_mem_base_addr_table[RTW89_MAC_MEM_MAX] = {
+ [RTW89_MAC_MEM_AXIDMA] = AXIDMA_BASE_ADDR,
[RTW89_MAC_MEM_SHARED_BUF] = SHARED_BUF_BASE_ADDR,
[RTW89_MAC_MEM_DMAC_TBL] = DMAC_TBL_BASE_ADDR,
[RTW89_MAC_MEM_SHCUT_MACHDR] = SHCUT_MACHDR_BASE_ADDR,
@@ -735,6 +736,10 @@ static const u32 mac_mem_base_addr_table[RTW89_MAC_MEM_MAX] = {
[RTW89_MAC_MEM_BA_CAM] = BA_CAM_BASE_ADDR,
[RTW89_MAC_MEM_BCN_IE_CAM0] = BCN_IE_CAM0_BASE_ADDR,
[RTW89_MAC_MEM_BCN_IE_CAM1] = BCN_IE_CAM1_BASE_ADDR,
+ [RTW89_MAC_MEM_TXD_FIFO_0] = TXD_FIFO_0_BASE_ADDR,
+ [RTW89_MAC_MEM_TXD_FIFO_1] = TXD_FIFO_1_BASE_ADDR,
+ [RTW89_MAC_MEM_TXDATA_FIFO_0] = TXDATA_FIFO_0_BASE_ADDR,
+ [RTW89_MAC_MEM_TXDATA_FIFO_1] = TXDATA_FIFO_1_BASE_ADDR,
};

static void rtw89_debug_dump_mac_mem(struct seq_file *m,
diff --git a/drivers/net/wireless/realtek/rtw89/mac.h b/drivers/net/wireless/realtek/rtw89/mac.h
index 6f3db8a2a9c2a..94cd29bd83d77 100644
--- a/drivers/net/wireless/realtek/rtw89/mac.h
+++ b/drivers/net/wireless/realtek/rtw89/mac.h
@@ -227,6 +227,7 @@ enum rtw89_mac_dbg_port_sel {
/* SRAM mem dump */
#define R_AX_INDIR_ACCESS_ENTRY 0x40000

+#define AXIDMA_BASE_ADDR 0x18006000
#define STA_SCHED_BASE_ADDR 0x18808000
#define RXPLD_FLTR_CAM_BASE_ADDR 0x18813000
#define SECURITY_CAM_BASE_ADDR 0x18814000
@@ -240,10 +241,15 @@ enum rtw89_mac_dbg_port_sel {
#define DMAC_TBL_BASE_ADDR 0x18800000
#define SHCUT_MACHDR_BASE_ADDR 0x18800800
#define BCN_IE_CAM1_BASE_ADDR 0x188A0000
+#define TXD_FIFO_0_BASE_ADDR 0x18856200
+#define TXD_FIFO_1_BASE_ADDR 0x188A1080
+#define TXDATA_FIFO_0_BASE_ADDR 0x18856000
+#define TXDATA_FIFO_1_BASE_ADDR 0x188A1000

#define CCTL_INFO_SIZE 32

enum rtw89_mac_mem_sel {
+ RTW89_MAC_MEM_AXIDMA,
RTW89_MAC_MEM_SHARED_BUF,
RTW89_MAC_MEM_DMAC_TBL,
RTW89_MAC_MEM_SHCUT_MACHDR,
@@ -256,6 +262,10 @@ enum rtw89_mac_mem_sel {
RTW89_MAC_MEM_BA_CAM,
RTW89_MAC_MEM_BCN_IE_CAM0,
RTW89_MAC_MEM_BCN_IE_CAM1,
+ RTW89_MAC_MEM_TXD_FIFO_0,
+ RTW89_MAC_MEM_TXD_FIFO_1,
+ RTW89_MAC_MEM_TXDATA_FIFO_0,
+ RTW89_MAC_MEM_TXDATA_FIFO_1,

/* keep last */
RTW89_MAC_MEM_LAST,
--
2.25.1



2021-11-19 20:06:58

by Larry Finger

[permalink] [raw]
Subject: Re: [PATCH] rtw89: add AXIDMA and TX FIFO dump in mac_mem_dump

On 11/18/21 23:59, Ping-Ke Shih wrote:
> From: Chia-Yuan Li <[email protected]>
>
> The AXIDMA is tx/rx packet transmission between PCIE host
> and device, and TX FIFO is MAC TX data.
> We dump them to ensure these memory buffers correct.
>
> Signed-off-by: Chia-Yuan Li <[email protected]>
> Signed-off-by: Ping-Ke Shih <[email protected]>

The code in this patch is fine, but I think you may want to change the commit
message. Te mo, "We dump them to ensure these memory buffers correct" means that
the change here will fix the memory buffers. I think you want to say "We dump
them to verify that these memory buffers are correct." This means that you are
providing a way to dump the buffers so that their correctness can be determined.

Reviewed-by: Larry Finger <[email protected]"

Larry

> ---
> drivers/net/wireless/realtek/rtw89/debug.c | 5 +++++
> drivers/net/wireless/realtek/rtw89/mac.h | 10 ++++++++++
> 2 files changed, 15 insertions(+)
>
> diff --git a/drivers/net/wireless/realtek/rtw89/debug.c b/drivers/net/wireless/realtek/rtw89/debug.c
> index 29eb188c888c7..dabee20b37c49 100644
> --- a/drivers/net/wireless/realtek/rtw89/debug.c
> +++ b/drivers/net/wireless/realtek/rtw89/debug.c
> @@ -723,6 +723,7 @@ rtw89_debug_priv_mac_mem_dump_select(struct file *filp,
> }
>
> static const u32 mac_mem_base_addr_table[RTW89_MAC_MEM_MAX] = {
> + [RTW89_MAC_MEM_AXIDMA] = AXIDMA_BASE_ADDR,
> [RTW89_MAC_MEM_SHARED_BUF] = SHARED_BUF_BASE_ADDR,
> [RTW89_MAC_MEM_DMAC_TBL] = DMAC_TBL_BASE_ADDR,
> [RTW89_MAC_MEM_SHCUT_MACHDR] = SHCUT_MACHDR_BASE_ADDR,
> @@ -735,6 +736,10 @@ static const u32 mac_mem_base_addr_table[RTW89_MAC_MEM_MAX] = {
> [RTW89_MAC_MEM_BA_CAM] = BA_CAM_BASE_ADDR,
> [RTW89_MAC_MEM_BCN_IE_CAM0] = BCN_IE_CAM0_BASE_ADDR,
> [RTW89_MAC_MEM_BCN_IE_CAM1] = BCN_IE_CAM1_BASE_ADDR,
> + [RTW89_MAC_MEM_TXD_FIFO_0] = TXD_FIFO_0_BASE_ADDR,
> + [RTW89_MAC_MEM_TXD_FIFO_1] = TXD_FIFO_1_BASE_ADDR,
> + [RTW89_MAC_MEM_TXDATA_FIFO_0] = TXDATA_FIFO_0_BASE_ADDR,
> + [RTW89_MAC_MEM_TXDATA_FIFO_1] = TXDATA_FIFO_1_BASE_ADDR,
> };
>
> static void rtw89_debug_dump_mac_mem(struct seq_file *m,
> diff --git a/drivers/net/wireless/realtek/rtw89/mac.h b/drivers/net/wireless/realtek/rtw89/mac.h
> index 6f3db8a2a9c2a..94cd29bd83d77 100644
> --- a/drivers/net/wireless/realtek/rtw89/mac.h
> +++ b/drivers/net/wireless/realtek/rtw89/mac.h
> @@ -227,6 +227,7 @@ enum rtw89_mac_dbg_port_sel {
> /* SRAM mem dump */
> #define R_AX_INDIR_ACCESS_ENTRY 0x40000
>
> +#define AXIDMA_BASE_ADDR 0x18006000
> #define STA_SCHED_BASE_ADDR 0x18808000
> #define RXPLD_FLTR_CAM_BASE_ADDR 0x18813000
> #define SECURITY_CAM_BASE_ADDR 0x18814000
> @@ -240,10 +241,15 @@ enum rtw89_mac_dbg_port_sel {
> #define DMAC_TBL_BASE_ADDR 0x18800000
> #define SHCUT_MACHDR_BASE_ADDR 0x18800800
> #define BCN_IE_CAM1_BASE_ADDR 0x188A0000
> +#define TXD_FIFO_0_BASE_ADDR 0x18856200
> +#define TXD_FIFO_1_BASE_ADDR 0x188A1080
> +#define TXDATA_FIFO_0_BASE_ADDR 0x18856000
> +#define TXDATA_FIFO_1_BASE_ADDR 0x188A1000
>
> #define CCTL_INFO_SIZE 32
>
> enum rtw89_mac_mem_sel {
> + RTW89_MAC_MEM_AXIDMA,
> RTW89_MAC_MEM_SHARED_BUF,
> RTW89_MAC_MEM_DMAC_TBL,
> RTW89_MAC_MEM_SHCUT_MACHDR,
> @@ -256,6 +262,10 @@ enum rtw89_mac_mem_sel {
> RTW89_MAC_MEM_BA_CAM,
> RTW89_MAC_MEM_BCN_IE_CAM0,
> RTW89_MAC_MEM_BCN_IE_CAM1,
> + RTW89_MAC_MEM_TXD_FIFO_0,
> + RTW89_MAC_MEM_TXD_FIFO_1,
> + RTW89_MAC_MEM_TXDATA_FIFO_0,
> + RTW89_MAC_MEM_TXDATA_FIFO_1,
>
> /* keep last */
> RTW89_MAC_MEM_LAST,
>


2021-11-22 02:15:14

by Ping-Ke Shih

[permalink] [raw]
Subject: RE: [PATCH] rtw89: add AXIDMA and TX FIFO dump in mac_mem_dump


> -----Original Message-----
> From: Larry Finger <[email protected]> On Behalf Of Larry Finger
> Sent: Saturday, November 20, 2021 4:07 AM
> To: Pkshih <[email protected]>; [email protected]
> Cc: [email protected]; 李佳遠 <[email protected]>
> Subject: Re: [PATCH] rtw89: add AXIDMA and TX FIFO dump in mac_mem_dump
>
> On 11/18/21 23:59, Ping-Ke Shih wrote:
> > From: Chia-Yuan Li <[email protected]>
> >
> > The AXIDMA is tx/rx packet transmission between PCIE host
> > and device, and TX FIFO is MAC TX data.
> > We dump them to ensure these memory buffers correct.
> >
> > Signed-off-by: Chia-Yuan Li <[email protected]>
> > Signed-off-by: Ping-Ke Shih <[email protected]>
>
> The code in this patch is fine, but I think you may want to change the commit
> message. Te mo, "We dump them to ensure these memory buffers correct" means that
> the change here will fix the memory buffers. I think you want to say "We dump
> them to verify that these memory buffers are correct." This means that you are
> providing a way to dump the buffers so that their correctness can be determined.
>
> Reviewed-by: Larry Finger <[email protected]"

I have fixed and sent v2.
Thank you.

--
Ping-Ke