I've had a play with the rt2x00 tree (11c3222a) and hit some problems on my
EeePC 901.
First, I was seeing "SIOCSIFFLAGS: unknown error 132" (which turns out to be
ERFKILL) when trying to bring up the interface. "rfkill list" shows that phy0
is hard-blocked¹; since there's no switch for this, the only way to "unblock"
it is to patch the driver. I used the following patch for this².
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x
index 8a22e65..f934325 100644
--- a/drivers/net/wireless/rt2x00/rt2800pci.c
+++ b/drivers/net/wireless/rt2x00/rt2800pci.c
@@ -380,7 +380,12 @@ static int rt2800pci_rfkill_poll(struct rt2x00_dev *rt2x00d
u32 reg;
rt2x00pci_register_read(rt2x00dev, GPIO_CTRL_CFG, ®);
- return rt2x00_get_field32(reg, GPIO_CTRL_CFG_BIT2);
+ /*return rt2x00_get_field32(reg, GPIO_CTRL_CFG_BIT2);*/
+ if (rt2x00_get_field32(reg, GPIO_CTRL_CFG_BIT2)) {
+ rt2x00_set_field32(®, GPIO_CTRL_CFG_BIT2, 0);
+ rt2x00pci_register_write(rt2x00dev, GPIO_CTRL_CFG, reg);
+ }
+ return 0;
}
#ifdef CONFIG_RT2X00_LIB_LEDS
However, this isn't the end of the problems: I get an oops instead while
trying to bring up the interface (configured via /etc/network/interfaces and
using WPA2; the configuration is known good for rt2860sta).
¹ phy0 is only present when eeepc-wlan is not blocked, which isn't surprising
because the card is effectively unplugged when eeepc-wlan is blocked.
² I also tried just having rt2800pci_rfkill_poll() just return 0, but that
makes no difference.
--
| Darren Salt | linux at youmustbejoking | nr. Ashington, | Doon
| using Debian GNU/Linux | or ds ,demon,co,uk | Northumberland | Army
| + Burn less waste. Use less packaging. Waste less. USE FEWER RESOURCES.
Sir Bobby Robson, R. I. P.
Hi,
> diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x
> index 8a22e65..f934325 100644
> --- a/drivers/net/wireless/rt2x00/rt2800pci.c
> +++ b/drivers/net/wireless/rt2x00/rt2800pci.c
> @@ -380,7 +380,12 @@ static int rt2800pci_rfkill_poll(struct rt2x00_dev *rt2x00d
> u32 reg;
>
> rt2x00pci_register_read(rt2x00dev, GPIO_CTRL_CFG, ®);
> - return rt2x00_get_field32(reg, GPIO_CTRL_CFG_BIT2);
> + /*return rt2x00_get_field32(reg, GPIO_CTRL_CFG_BIT2);*/
> + if (rt2x00_get_field32(reg, GPIO_CTRL_CFG_BIT2)) {
> + rt2x00_set_field32(®, GPIO_CTRL_CFG_BIT2, 0);
> + rt2x00pci_register_write(rt2x00dev, GPIO_CTRL_CFG, reg);
> + }
> + return 0;
> }
Writing to the GPIO isn't the solution, the entire register is read-only, so
the chip will ignore it. The reason why the RFKILL bit is apparently set
while it shouldn't is that the device isn't initialized correctly and the
entire device isn't ready to handle anything at this time.
Ivo