This patch set adds QCA9984/QCA9994 1.0 support. Boot sequence is same as
QCA99X0.
Vasanthakumar Thiagarajan (4):
ath10k: Move rx_location_info out of struct rx_pkt_end
ath10k: Clean up growing hw checks during safe and full reset
ath10k: Define rx_ppdu_end for QCA9984
ath10k: Enable support for QCA9984
drivers/net/wireless/ath/ath10k/core.c | 23 ++++++++++++
drivers/net/wireless/ath/ath10k/hw.h | 11 ++++++
drivers/net/wireless/ath/ath10k/pci.c | 58 ++++++++++++++++++++++---------
drivers/net/wireless/ath/ath10k/pci.h | 6 ++++
drivers/net/wireless/ath/ath10k/rx_desc.h | 48 ++++++++++++++++++++++++-
5 files changed, 129 insertions(+), 17 deletions(-)
--
1.9.1
QCA9984 Rx descriptor has two 32-bit words of location information
when compared to one 32-bit word in QCA99X0. To handle this difference in
rx descriptor ppdu_end, define a new ppdu_end for QCA9984 descriptor
which has the new structure to represent rx_location_info.
Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
---
drivers/net/wireless/ath/ath10k/rx_desc.h | 46 +++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/drivers/net/wireless/ath/ath10k/rx_desc.h b/drivers/net/wireless/ath/ath10k/rx_desc.h
index 3e7dfaa..9ceebea 100644
--- a/drivers/net/wireless/ath/ath10k/rx_desc.h
+++ b/drivers/net/wireless/ath/ath10k/rx_desc.h
@@ -996,6 +996,41 @@ struct rx_pkt_end {
__le32 phy_timestamp_2;
} __packed;
+#define RX_LOCATION_INFO0_RTT_FAC_LEGACY_MASK 0x00003fff
+#define RX_LOCATION_INFO0_RTT_FAC_LEGACY_LSB 0
+#define RX_LOCATION_INFO0_RTT_FAC_VHT_MASK 0x1fff8000
+#define RX_LOCATION_INFO0_RTT_FAC_VHT_LSB 15
+#define RX_LOCATION_INFO0_RTT_STRONGEST_CHAIN_MASK 0xc0000000
+#define RX_LOCATION_INFO0_RTT_STRONGEST_CHAIN_LSB 30
+#define RX_LOCATION_INFO0_RTT_FAC_LEGACY_STATUS BIT(14)
+#define RX_LOCATION_INFO0_RTT_FAC_VHT_STATUS BIT(29)
+
+#define RX_LOCATION_INFO1_RTT_PREAMBLE_TYPE_MASK 0x0000000c
+#define RX_LOCATION_INFO1_RTT_PREAMBLE_TYPE_LSB 2
+#define RX_LOCATION_INFO1_PKT_BW_MASK 0x00000030
+#define RX_LOCATION_INFO1_PKT_BW_LSB 4
+#define RX_LOCATION_INFO1_SKIP_P_SKIP_BTCF_MASK 0x0000ff00
+#define RX_LOCATION_INFO1_SKIP_P_SKIP_BTCF_LSB 8
+#define RX_LOCATION_INFO1_RTT_MSC_RATE_MASK 0x000f0000
+#define RX_LOCATION_INFO1_RTT_MSC_RATE_LSB 16
+#define RX_LOCATION_INFO1_RTT_PBD_LEG_BW_MASK 0x00300000
+#define RX_LOCATION_INFO1_RTT_PBD_LEG_BW_LSB 20
+#define RX_LOCATION_INFO1_TIMING_BACKOFF_MASK 0x07c00000
+#define RX_LOCATION_INFO1_TIMING_BACKOFF_LSB 22
+#define RX_LOCATION_INFO1_RTT_TX_FRAME_PHASE_MASK 0x18000000
+#define RX_LOCATION_INFO1_RTT_TX_FRAME_PHASE_LSB 27
+#define RX_LOCATION_INFO1_RTT_CFR_STATUS BIT(0)
+#define RX_LOCATION_INFO1_RTT_CIR_STATUS BIT(1)
+#define RX_LOCATION_INFO1_RTT_GI_TYPE BIT(7)
+#define RX_LOCATION_INFO1_RTT_MAC_PHY_PHASE BIT(29)
+#define RX_LOCATION_INFO1_RTT_TX_DATA_START_X_PHASE BIT(30)
+#define RX_LOCATION_INFO1_RX_LOCATION_VALID BIT(31)
+
+struct rx_location_info {
+ __le32 rx_location_info0; /* %RX_LOCATION_INFO0_ */
+ __le32 rx_location_info1; /* %RX_LOCATION_INFO1_ */
+} __packed;
+
enum rx_phy_ppdu_end_info0 {
RX_PHY_PPDU_END_INFO0_ERR_RADAR = BIT(2),
RX_PHY_PPDU_END_INFO0_ERR_RX_ABORT = BIT(3),
@@ -1074,12 +1109,23 @@ struct rx_ppdu_end_qca99x0 {
__le16 info1; /* %RX_PPDU_END_INFO1_ */
} __packed;
+struct rx_ppdu_end_qca9984 {
+ struct rx_pkt_end rx_pkt_end;
+ struct rx_location_info rx_location_info;
+ struct rx_phy_ppdu_end rx_phy_ppdu_end;
+ __le32 rx_timing_offset; /* %RX_PPDU_END_RX_TIMING_OFFSET_ */
+ __le32 rx_info; /* %RX_PPDU_END_RX_INFO_ */
+ __le16 bb_length;
+ __le16 info1; /* %RX_PPDU_END_INFO1_ */
+} __packed;
+
struct rx_ppdu_end {
struct rx_ppdu_end_common common;
union {
struct rx_ppdu_end_qca988x qca988x;
struct rx_ppdu_end_qca6174 qca6174;
struct rx_ppdu_end_qca99x0 qca99x0;
+ struct rx_ppdu_end_qca9984 qca9984;
} __packed;
} __packed;
--
1.9.1
Store pci chip secific reset funtions in struct ath10k_pci
as callbacks during early ath10k_pci_probe() and use the
callback to perform chip specific resets. This patch essentially
adds two callback in ath10k_pci, one for doing soft reset and
the other for hard reset. By using callbacks we can get rid of
those hw revision checks in ath10k_pci_safe_chip_reset() and
ath10k_pci_chip_reset(). As such this patch does not fix
any issue.
Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
---
drivers/net/wireless/ath/ath10k/pci.c | 44 ++++++++++++++++++++++-------------
drivers/net/wireless/ath/ath10k/pci.h | 6 +++++
2 files changed, 34 insertions(+), 16 deletions(-)
diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
index cdd8a30..6614fd7 100644
--- a/drivers/net/wireless/ath/ath10k/pci.c
+++ b/drivers/net/wireless/ath/ath10k/pci.c
@@ -2293,16 +2293,20 @@ static int ath10k_pci_warm_reset(struct ath10k *ar)
return 0;
}
+static int ath10k_pci_qca99x0_soft_chip_reset(struct ath10k *ar)
+{
+ ath10k_pci_irq_disable(ar);
+ return ath10k_pci_qca99x0_chip_reset(ar);
+}
+
static int ath10k_pci_safe_chip_reset(struct ath10k *ar)
{
- if (QCA_REV_988X(ar) || QCA_REV_6174(ar)) {
- return ath10k_pci_warm_reset(ar);
- } else if (QCA_REV_99X0(ar)) {
- ath10k_pci_irq_disable(ar);
- return ath10k_pci_qca99x0_chip_reset(ar);
- } else {
+ struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
+
+ if (!ar_pci->pci_soft_reset)
return -ENOTSUPP;
- }
+
+ return ar_pci->pci_soft_reset(ar);
}
static int ath10k_pci_qca988x_chip_reset(struct ath10k *ar)
@@ -2437,16 +2441,12 @@ static int ath10k_pci_qca99x0_chip_reset(struct ath10k *ar)
static int ath10k_pci_chip_reset(struct ath10k *ar)
{
- if (QCA_REV_988X(ar))
- return ath10k_pci_qca988x_chip_reset(ar);
- else if (QCA_REV_6174(ar))
- return ath10k_pci_qca6174_chip_reset(ar);
- else if (QCA_REV_9377(ar))
- return ath10k_pci_qca6174_chip_reset(ar);
- else if (QCA_REV_99X0(ar))
- return ath10k_pci_qca99x0_chip_reset(ar);
- else
+ struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
+
+ if (WARN_ON(!ar_pci->pci_hard_reset))
return -ENOTSUPP;
+
+ return ar_pci->pci_hard_reset(ar);
}
static int ath10k_pci_hif_power_up(struct ath10k *ar)
@@ -2976,24 +2976,34 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
enum ath10k_hw_rev hw_rev;
u32 chip_id;
bool pci_ps;
+ int (*pci_soft_reset)(struct ath10k *ar);
+ int (*pci_hard_reset)(struct ath10k *ar);
switch (pci_dev->device) {
case QCA988X_2_0_DEVICE_ID:
hw_rev = ATH10K_HW_QCA988X;
pci_ps = false;
+ pci_soft_reset = ath10k_pci_warm_reset;
+ pci_hard_reset = ath10k_pci_qca988x_chip_reset;
break;
case QCA6164_2_1_DEVICE_ID:
case QCA6174_2_1_DEVICE_ID:
hw_rev = ATH10K_HW_QCA6174;
pci_ps = true;
+ pci_soft_reset = ath10k_pci_warm_reset;
+ pci_hard_reset = ath10k_pci_qca6174_chip_reset;
break;
case QCA99X0_2_0_DEVICE_ID:
hw_rev = ATH10K_HW_QCA99X0;
pci_ps = false;
+ pci_soft_reset = ath10k_pci_qca99x0_soft_chip_reset;
+ pci_hard_reset = ath10k_pci_qca99x0_chip_reset;
break;
case QCA9377_1_0_DEVICE_ID:
hw_rev = ATH10K_HW_QCA9377;
pci_ps = true;
+ pci_soft_reset = NULL;
+ pci_hard_reset = ath10k_pci_qca6174_chip_reset;
break;
default:
WARN_ON(1);
@@ -3018,6 +3028,8 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
ar->dev_id = pci_dev->device;
ar_pci->pci_ps = pci_ps;
ar_pci->bus_ops = &ath10k_pci_bus_ops;
+ ar_pci->pci_soft_reset = pci_soft_reset;
+ ar_pci->pci_hard_reset = pci_hard_reset;
ar->id.vendor = pdev->vendor;
ar->id.device = pdev->device;
diff --git a/drivers/net/wireless/ath/ath10k/pci.h b/drivers/net/wireless/ath/ath10k/pci.h
index 959dc32..6eca1df 100644
--- a/drivers/net/wireless/ath/ath10k/pci.h
+++ b/drivers/net/wireless/ath/ath10k/pci.h
@@ -234,6 +234,12 @@ struct ath10k_pci {
const struct ath10k_bus_ops *bus_ops;
+ /* Chip specific pci reset routine used to do a safe reset */
+ int (*pci_soft_reset)(struct ath10k *ar);
+
+ /* Chip specific pci full reset function */
+ int (*pci_hard_reset)(struct ath10k *ar);
+
/* Keep this entry in the last, memory for struct ath10k_ahb is
* allocated (ahb support enabled case) in the continuation of
* this struct.
--
1.9.1
Define rx_location_info in struct rx_ppdu_end_qca99x0 after
rx_pkt_end. This is to prepare rx_ppdu_end for QCA9984 chip.
Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
---
drivers/net/wireless/ath/ath10k/rx_desc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/wireless/ath/ath10k/rx_desc.h b/drivers/net/wireless/ath/ath10k/rx_desc.h
index ca8d168..3e7dfaa 100644
--- a/drivers/net/wireless/ath/ath10k/rx_desc.h
+++ b/drivers/net/wireless/ath/ath10k/rx_desc.h
@@ -994,7 +994,6 @@ struct rx_pkt_end {
__le32 info0; /* %RX_PKT_END_INFO0_ */
__le32 phy_timestamp_1;
__le32 phy_timestamp_2;
- __le32 rx_location_info; /* %RX_LOCATION_INFO_ */
} __packed;
enum rx_phy_ppdu_end_info0 {
@@ -1067,6 +1066,7 @@ struct rx_phy_ppdu_end {
struct rx_ppdu_end_qca99x0 {
struct rx_pkt_end rx_pkt_end;
+ __le32 rx_location_info; /* %RX_LOCATION_INFO_ */
struct rx_phy_ppdu_end rx_phy_ppdu_end;
__le32 rx_timing_offset; /* %RX_PPDU_END_RX_TIMING_OFFSET_ */
__le32 rx_info; /* %RX_PPDU_END_RX_INFO_ */
--
1.9.1
QCA9984 shares the same configuration with QCA99X0.
Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
---
drivers/net/wireless/ath/ath10k/core.c | 23 +++++++++++++++++++++++
drivers/net/wireless/ath/ath10k/hw.h | 11 +++++++++++
drivers/net/wireless/ath/ath10k/pci.c | 14 ++++++++++++++
3 files changed, 48 insertions(+)
diff --git a/drivers/net/wireless/ath/ath10k/core.c b/drivers/net/wireless/ath/ath10k/core.c
index 1c4106b..f24ce1c 100644
--- a/drivers/net/wireless/ath/ath10k/core.c
+++ b/drivers/net/wireless/ath/ath10k/core.c
@@ -175,6 +175,28 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
},
},
{
+ .id = QCA9984_HW_1_0_DEV_VERSION,
+ .dev_id = QCA9984_1_0_DEVICE_ID,
+ .name = "qca9984/qca9994 hw1.0",
+ .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
+ .uart_pin = 7,
+ .otp_exe_param = 0x00000700,
+ .continuous_frag_desc = true,
+ .channel_counters_freq_hz = 150000,
+ .max_probe_resp_desc_thres = 24,
+ .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE,
+ .tx_chain_mask = 0xf,
+ .rx_chain_mask = 0xf,
+ .max_spatial_stream = 4,
+ .cal_data_len = 12064,
+ .fw = {
+ .dir = QCA9984_HW_1_0_FW_DIR,
+ .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
+ .board_size = QCA99X0_BOARD_DATA_SZ,
+ .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
+ },
+ },
+ {
.id = QCA9377_HW_1_0_DEV_VERSION,
.dev_id = QCA9377_1_0_DEVICE_ID,
.name = "qca9377 hw1.0",
@@ -2119,6 +2141,7 @@ struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
ar->hw_values = &qca6174_values;
break;
case ATH10K_HW_QCA99X0:
+ case ATH10K_HW_QCA9984:
ar->regs = &qca99x0_regs;
ar->hw_values = &qca99x0_values;
break;
diff --git a/drivers/net/wireless/ath/ath10k/hw.h b/drivers/net/wireless/ath/ath10k/hw.h
index c0179bc..59dcda6 100644
--- a/drivers/net/wireless/ath/ath10k/hw.h
+++ b/drivers/net/wireless/ath/ath10k/hw.h
@@ -26,6 +26,7 @@
#define QCA6164_2_1_DEVICE_ID (0x0041)
#define QCA6174_2_1_DEVICE_ID (0x003e)
#define QCA99X0_2_0_DEVICE_ID (0x0040)
+#define QCA9984_1_0_DEVICE_ID (0x0046)
#define QCA9377_1_0_DEVICE_ID (0x0042)
/* QCA988X 1.0 definitions (unsupported) */
@@ -99,6 +100,14 @@ enum qca9377_chip_id_rev {
#define QCA99X0_HW_2_0_BOARD_DATA_FILE "board.bin"
#define QCA99X0_HW_2_0_PATCH_LOAD_ADDR 0x1234
+/* QCA9984 1.0 defines */
+#define QCA9984_HW_1_0_DEV_VERSION 0x1000000
+#define QCA9984_HW_DEV_TYPE 0xa
+#define QCA9984_HW_1_0_CHIP_ID_REV 0x0
+#define QCA9984_HW_1_0_FW_DIR ATH10K_FW_DIR "/QCA9984/hw1.0"
+#define QCA9984_HW_1_0_BOARD_DATA_FILE "board.bin"
+#define QCA9984_HW_1_0_PATCH_LOAD_ADDR 0x1234
+
/* QCA9377 1.0 definitions */
#define QCA9377_HW_1_0_FW_DIR ATH10K_FW_DIR "/QCA9377/hw1.0"
#define QCA9377_HW_1_0_FW_FILE "firmware.bin"
@@ -205,6 +214,7 @@ enum ath10k_hw_rev {
ATH10K_HW_QCA988X,
ATH10K_HW_QCA6174,
ATH10K_HW_QCA99X0,
+ ATH10K_HW_QCA9984,
ATH10K_HW_QCA9377,
ATH10K_HW_QCA4019,
};
@@ -261,6 +271,7 @@ void ath10k_hw_fill_survey_time(struct ath10k *ar, struct survey_info *survey,
#define QCA_REV_988X(ar) ((ar)->hw_rev == ATH10K_HW_QCA988X)
#define QCA_REV_6174(ar) ((ar)->hw_rev == ATH10K_HW_QCA6174)
#define QCA_REV_99X0(ar) ((ar)->hw_rev == ATH10K_HW_QCA99X0)
+#define QCA_REV_9984(ar) ((ar)->hw_rev == ATH10K_HW_QCA9984)
#define QCA_REV_9377(ar) ((ar)->hw_rev == ATH10K_HW_QCA9377)
#define QCA_REV_40XX(ar) ((ar)->hw_rev == ATH10K_HW_QCA4019)
diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
index 6614fd7..4786974 100644
--- a/drivers/net/wireless/ath/ath10k/pci.c
+++ b/drivers/net/wireless/ath/ath10k/pci.c
@@ -56,6 +56,7 @@ static const struct pci_device_id ath10k_pci_id_table[] = {
{ PCI_VDEVICE(ATHEROS, QCA6164_2_1_DEVICE_ID) }, /* PCI-E QCA6164 V2.1 */
{ PCI_VDEVICE(ATHEROS, QCA6174_2_1_DEVICE_ID) }, /* PCI-E QCA6174 V2.1 */
{ PCI_VDEVICE(ATHEROS, QCA99X0_2_0_DEVICE_ID) }, /* PCI-E QCA99X0 V2 */
+ { PCI_VDEVICE(ATHEROS, QCA9984_1_0_DEVICE_ID) }, /* PCI-E QCA9984 V1 */
{ PCI_VDEVICE(ATHEROS, QCA9377_1_0_DEVICE_ID) }, /* PCI-E QCA9377 V1 */
{0}
};
@@ -81,8 +82,11 @@ static const struct ath10k_pci_supp_chip ath10k_pci_supp_chips[] = {
{ QCA99X0_2_0_DEVICE_ID, QCA99X0_HW_2_0_CHIP_ID_REV },
+ { QCA9984_1_0_DEVICE_ID, QCA9984_HW_1_0_CHIP_ID_REV },
+
{ QCA9377_1_0_DEVICE_ID, QCA9377_HW_1_0_CHIP_ID_REV },
{ QCA9377_1_0_DEVICE_ID, QCA9377_HW_1_1_CHIP_ID_REV },
+
};
static void ath10k_pci_buffer_cleanup(struct ath10k *ar);
@@ -844,6 +848,7 @@ static u32 ath10k_pci_targ_cpu_to_ce_addr(struct ath10k *ar, u32 addr)
0x7ff) << 21;
break;
case ATH10K_HW_QCA99X0:
+ case ATH10K_HW_QCA9984:
case ATH10K_HW_QCA4019:
val = ath10k_pci_read32(ar, PCIE_BAR_REG_ADDRESS);
break;
@@ -1569,6 +1574,7 @@ static void ath10k_pci_irq_msi_fw_mask(struct ath10k *ar)
CORE_CTRL_ADDRESS, val);
break;
case ATH10K_HW_QCA99X0:
+ case ATH10K_HW_QCA9984:
case ATH10K_HW_QCA4019:
/* TODO: Find appropriate register configuration for QCA99X0
* to mask irq/MSI.
@@ -1592,6 +1598,7 @@ static void ath10k_pci_irq_msi_fw_unmask(struct ath10k *ar)
CORE_CTRL_ADDRESS, val);
break;
case ATH10K_HW_QCA99X0:
+ case ATH10K_HW_QCA9984:
case ATH10K_HW_QCA4019:
/* TODO: Find appropriate register configuration for QCA99X0
* to unmask irq/MSI.
@@ -1932,6 +1939,7 @@ static int ath10k_pci_get_num_banks(struct ath10k *ar)
switch (ar_pci->pdev->device) {
case QCA988X_2_0_DEVICE_ID:
case QCA99X0_2_0_DEVICE_ID:
+ case QCA9984_1_0_DEVICE_ID:
return 1;
case QCA6164_2_1_DEVICE_ID:
case QCA6174_2_1_DEVICE_ID:
@@ -2999,6 +3007,12 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
pci_soft_reset = ath10k_pci_qca99x0_soft_chip_reset;
pci_hard_reset = ath10k_pci_qca99x0_chip_reset;
break;
+ case QCA9984_1_0_DEVICE_ID:
+ hw_rev = ATH10K_HW_QCA9984;
+ pci_ps = false;
+ pci_soft_reset = ath10k_pci_qca99x0_soft_chip_reset;
+ pci_hard_reset = ath10k_pci_qca99x0_chip_reset;
+ break;
case QCA9377_1_0_DEVICE_ID:
hw_rev = ATH10K_HW_QCA9377;
pci_ps = true;
--
1.9.1
Archisman Maitra <[email protected]> writes:
> Can you provide me the binaries of QCA9984?
I pushed them to ath10k-firmware.git:
https://github.com/kvalo/ath10k-firmware/tree/master/QCA9984/hw1.0
--
Kalle Valo
Vasanthakumar Thiagarajan <[email protected]> wrote:
> Define rx_location_info in struct rx_ppdu_end_qca99x0 after
> rx_pkt_end. This is to prepare rx_ppdu_end for QCA9984 chip.
>
> Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
Thanks, 4 patches applied to ath.git:
8f09588b2cdc ath10k: move rx_location_info out of struct rx_pkt_end
0fc7e270523b ath10k: clean up growing hw checks during safe and full reset
acc6b5593eee ath10k: define rx_ppdu_end for QCA9984
651b4cdcf97e ath10k: enable support for QCA9984
--
Sent by pwcli
https://patchwork.kernel.org/patch/8890931/
On Monday 09 May 2016 03:16 PM, Archisman Maitra wrote:
>
>
> The firmware crashes on applying this patch.. On examining the kernel OOPs,
> I have found out that that ath10k_bmi_execute in
> drivers/net/wireless/ath/ath10k/core.c when called goes in a loop until
> timeout occurs after which it eventually crashes. This is called from
> ath10k_core_get_board_id_from_otp in
> drivers/net/wireless/ath/ath10k/core.c . As per my understanding, the
> binaries of QCA99X0 that I have used for QCA9984 is not the correct one.
> Could you clarify?
Yes, the firmware binaries are different for QCA99X0 and QCA9984.
Vasanth
The firmware crashes on applying this patch.. On examining the kernel OOPs,
I have found out that that ath10k_bmi_execute in
drivers/net/wireless/ath/ath10k/core.c when called goes in a loop until
timeout occurs after which it eventually crashes. This is called from
ath10k_core_get_board_id_from_otp in
drivers/net/wireless/ath/ath10k/core.c . As per my understanding, the
binaries of QCA99X0 that I have used for QCA9984 is not the correct one.
Could you clarify?
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dmUgc29tZSBxdWVzdGlvbnM6LQ0KPg0KPiBhKSBJIGFtIHdvcmtpbmcgd2l0aCBPcGVuV1JUIGZy
YW1ld29yaywgd2hpY2ggdXNlcyBtYWM4MDIxMSBkcml2ZXIgZGF0ZWQgMS0xMC0yMDE2LiBJIGhh
dmUgbm90aWNlZCB0aGF0IHRoZQ0KPiBwYXRjaCB0aGF0IHlvdSBoYXZlIHByb3ZpZGVkLCB1c2Vz
IGEgZGlmZmVyZW50IG1hYzgwMjExIGRyaXZlci4gV291bGQgdGhhdCBiZSBhIHByb2JsZW0/DQo+
DQo+IEV4Oi0NCj4gLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t
LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tDQo+ICAg
ICAgICAgIC5pZCA9IFFDQTk5ODRfSFdfMV8wX0RFVl9WRVJTSU9OLA0KPiAgICAgICAgICAuZGV2
X2lkID0gUUNBOTk4NF8xXzBfREVWSUNFX0lELA0KPiAgICAgICAgICAubmFtZSA9ICJxY2E5OTg0
L3FjYTk5OTQgaHcxLjAiLA0KPiAgICAgICAgICAucGF0Y2hfbG9hZF9hZGRyID0gUUNBOTk4NF9I
V18xXzBfUEFUQ0hfTE9BRF9BRERSLA0KPiAgICAgICAgICAudWFydF9waW4gPSA3LA0KPiAgICAg
ICAgICAub3RwX2V4ZV9wYXJhbSA9IDB4MDAwMDA3MDAsDQo+ICAgICAgICAgIC5jb250aW51b3Vz
X2ZyYWdfZGVzYyA9IHRydWUsDQo+ICAgICAgICAgIC5jaGFubmVsX2NvdW50ZXJzX2ZyZXFfaHog
PSAxNTAwMDAsDQo+ICAgICAgICAgIC5tYXhfcHJvYmVfcmVzcF9kZXNjX3RocmVzID0gMjQsDQo+
ICAgICAgICAgIC5od180YWRkcl9wYWQgPSBBVEgxMEtfSFdfNEFERFJfUEFEX0JFRk9SRSwNCj4g
ICAgICAgICAgLyoNCj4gICAgICAgICAgLnR4X2NoYWluX21hc2sgPSAweGYsDQo+ICAgICAgICAg
IC5yeF9jaGFpbl9tYXNrID0gMHhmLA0KPiAgICAgICAgICAubWF4X3NwYXRpYWxfc3RyZWFtID0g
NCwNCj4gICAgICAgICAgLmNhbF9kYXRhX2xlbiA9IDEyMDY0LCAqLw0KPiAgICAgICAgICAuZncg
PSB7DQo+ICAgICAgICAgICAgICAuZGlyID0gUUNBOTk4NF9IV18xXzBfRldfRElSLA0KPiAgICAg
ICAgICAgICAgLmZ3ID0gUUNBOTk4NF9IV18xXzBfRldfRklMRSwNCj4gLS0tLS0tLS0tLS0tLS0t
LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t
LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLQ0KPiAgIEhlcmUsIHRoZSBjb21tZW50ZWQgb3V0IG1l
bWJlcnMgYXJlIG5vdCBwcmVzZW50IGluIG15IGRyaXZlciBzb3VyY2UgY29kZS4NCj4NCj4gYikg
ICJhdGgxMGtfcGNpIDAwMDE6MDE6MDAuMDogdW5hYmxlIHRvIHJlYWQgZnJvbSB0aGUgZGV2aWNl
IiBUaGlzIGlzIGVuY291bnRlcmVkIGF0IHJ1bnRpbWUuIFVwb24NCj4gaW52ZXN0aWdhdGluZywg
aXQgaXMgc2VlbiB0aGF0ICBhdGgxMGtfYm1pX2V4ZWN1dGUoYXIsIGFkZHJlc3MsIEJNSV9QQVJB
TV9HRVRfRUVQUk9NX0JPQVJEX0lELCAmcmVzdWx0KQ0KPiByZXR1cm5zIDAgaW4gZHJpdmVycy9u
ZXQvd2lyZWxlc3MvYXRoL2F0aDEway9jb3JlLmMgd2hlbiBjYWxsZWQgZnJvbSBhdGgxMGtfY29y
ZV9nZXRfYm9hcmRfaWRfZnJvbV9vdHANCj4NCj4gT24gYnJvd3NpbmcgdGhlIHNvdXJjZSBvZiB0
aGUgZXJyb3IgSSBoYXZlIGZvdW5kIHRoZSBjb250cm9sIHRvIGdvIGZyb20gYXRoMTBrX2JtaV9l
eGVjdXRlIC0tLS0+DQo+ICAgYXRoMTBrX3BjaV9oaWZfZXhjaGFuZ2VfYm1pX21zZyBpbiBkcml2
ZXJzL25ldC93aXJlbGVzcy9hdGgvYXRoMTBrL3BjaS5jIC0tLS0tLT4gIGF0aDEwa19wY2lfYm1p
X3dhaXQgaW4NCj4gZHJpdmVycy9uZXQvd2lyZWxlc3MvYXRoL2F0aDEway9wY2kuYyB3aGVyZSBp
dCByZXR1cm5zICAtRVRJTUVET1VUDQoNCkNhbiB5b3UgcGxlYXNlIG1vdmUgdG8gdGhlIGxhdGVz
dCBhdGgxMGsgc3JjIChhdGguZ2l0KSBhbmQgZW5hYmxlIDB4NDIwIChibWkgYW5kIGJvb3QgcmVs
YXRlZCBkZWJ1ZykgYXRoMTBrIA0KZGVidWcgbWFzaz8uDQoNCllvdSBjYW4gZW5hYmxlIHRoZSBk
ZWJ1ZyB0aHJvdWdoIG1vZHBhcmFtLCBpbnNtb2QgYXRoMTBrX2NvcmUgZGVidWdfbWFzaz0weDQy
MC4NCg0KDQpWYXNhbnRoDQoNCg==
Can you provide me the binaries of QCA9984?
T24gVGh1cnNkYXkgMDQgQXVndXN0IDIwMTYgMDc6NTAgUE0sIGJoYXJhdGggeWFkYXYgd3JvdGU6
DQo+IEhpLiwNCj4gSSBhbSB0cnlpbmcgdG8gZW5hYmxlIHN1cHBvcnQgZm9yIFFDQTk5ODQgb24g
bGF0ZXN0IHN0YWJsZSBiYWNrcG9ydHMtNC40LjItMSB1c2luZyB0aGUgYWJvdmUgcGF0Y2guDQo+
DQo+IGRvd25sb2FkZWQgImh0dHBzOi8va2VybmVsLmdvb2dsZXNvdXJjZS5jb20vcHViL3NjbS9s
aW51eC9rZXJuZWwvZ2l0L2t2YWxvL2F0aC8iIChhdGguZ2l0KSBoYXMgdGhlIHBhdGNoDQo+IGFw
cGxpZWQgZm9yIHFjYTk5ODQgYnV0IGl0IGhhcyBkb3dubG9hZGVkIHRoZSBrZXJuZWwgdHJlZS4N
Cj4NCj4gcGxlYXNlIGdpdmUgbWUgaW5mbyBvbiB3aGljaCB2ZXJzaW9uIG9mIGJhY2twb3J0cyB3
ZSBuZWVkIHRvIHVzZSBmb3IgUUNBOTk4NCBvciBob3cgdG8gYnVpbGQgYXRoMTBrIGFsb25lIGZy
b20NCj4gYXRoLmdpdCBrZXJuZWwgdHJlZS4NCg0KSSBkb250IHRoaW5rIHRoZXJlIGlzIGFueSBu
ZXcgYmFja3BvcnRzIHRhcmJhbGwgZm9yIHJlY2VudCBhdGguZ2l0IGF2YWlsYWJsZS4gWW91IG1h
eSBuZWVkIHRvIGNyZWF0ZSBvbmUsDQpwbGVhc2UgcmVmZXIgaHR0cHM6Ly93aXJlbGVzcy53aWtp
Lmtlcm5lbC5vcmcvZW4vdXNlcnMvZHJpdmVycy9hdGgxMGsvYmFja3BvcnRzIGZvciBpbmZvcm1h
dGlvbg0KdG8gY3JlYXRlIHlvdXIgb3duIGJhY2twb3J0cyB0YXJiYWxsLg0KDQpWYXNhbnRoDQoN
Cj4NCj4gT24gV2VkLCBNYXkgMTEsIDIwMTYgYXQgMTI6NDMgUE0sIFRoaWFnYXJhamFuLCBWYXNh
bnRoYWt1bWFyIDx2dGhpYWdhckBxdGkucXVhbGNvbW0uY29tDQo+IDxtYWlsdG86dnRoaWFnYXJA
cXRpLnF1YWxjb21tLmNvbT4+IHdyb3RlOg0KPg0KPiAgICAgT24gV2VkbmVzZGF5IDExIE1heSAy
MDE2IDEyOjIzIFBNLCBBcmNoaXNtYW4gTWFpdHJhIHdyb3RlOg0KPiAgICAgID4gSGksDQo+ICAg
ICAgPg0KPiAgICAgID4gVGhhbmsgeW91IGZvciBwcm92aWRpbmcgbWUgdGhlIGJpbmFyaWVzLg0K
PiAgICAgID4NCj4gICAgICA+IEkgaGF2ZSBzdGFydGVkIHdvcmtpbmcgb24gdGhlIG1hYzgwMjEx
IGRyaXZlciBhbmQgaGF2ZSBzb21lIHF1ZXN0aW9uczotDQo+ICAgICAgPg0KPiAgICAgID4gYSkg
SSBhbSB3b3JraW5nIHdpdGggT3BlbldSVCBmcmFtZXdvcmssIHdoaWNoIHVzZXMgbWFjODAyMTEg
ZHJpdmVyIGRhdGVkIDEtMTAtMjAxNi4gSSBoYXZlIG5vdGljZWQgdGhhdCB0aGUNCj4gICAgICA+
IHBhdGNoIHRoYXQgeW91IGhhdmUgcHJvdmlkZWQsIHVzZXMgYSBkaWZmZXJlbnQgbWFjODAyMTEg
ZHJpdmVyLiBXb3VsZCB0aGF0IGJlIGEgcHJvYmxlbT8NCj4gICAgICA+DQo+ICAgICAgPiBFeDot
DQo+ICAgICAgPiAtLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t
LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0NCj4gICAg
ICA+ICAgICAgICAgIC5pZCA9IFFDQTk5ODRfSFdfMV8wX0RFVl9WRVJTSU9OLA0KPiAgICAgID4g
ICAgICAgICAgLmRldl9pZCA9IFFDQTk5ODRfMV8wX0RFVklDRV9JRCwNCj4gICAgID4gICAgICAg
ICAgLm5hbWUgPSAicWNhOTk4NC9xY2E5OTk0IGh3MS4wIiwNCj4gICAgICA+ICAgICAgICAgIC5w
YXRjaF9sb2FkX2FkZHIgPSBRQ0E5OTg0X0hXXzFfMF9QQVRDSF9MT0FEX0FERFIsDQo+ICAgICAg
PiAgICAgICAgICAudWFydF9waW4gPSA3LA0KPiAgICAgID4gICAgICAgICAgLm90cF9leGVfcGFy
YW0gPSAweDAwMDAwNzAwLA0KPiAgICAgID4gICAgICAgICAgLmNvbnRpbnVvdXNfZnJhZ19kZXNj
ID0gdHJ1ZSwNCj4gICAgICA+ICAgICAgICAgIC5jaGFubmVsX2NvdW50ZXJzX2ZyZXFfaHogPSAx
NTAwMDAsDQo+ICAgICAgPiAgICAgICAgICAubWF4X3Byb2JlX3Jlc3BfZGVzY190aHJlcyA9IDI0
LA0KPiAgICAgID4gICAgICAgICAgLmh3XzRhZGRyX3BhZCA9IEFUSDEwS19IV180QUREUl9QQURf
QkVGT1JFLA0KPiAgICAgID4gICAgICAgICAgLyoNCj4gICAgICA+ICAgICAgICAgIC50eF9jaGFp
bl9tYXNrID0gMHhmLA0KPiAgICAgID4gICAgICAgICAgLnJ4X2NoYWluX21hc2sgPSAweGYsDQo+
ICAgICAgPiAgICAgICAgICAubWF4X3NwYXRpYWxfc3RyZWFtID0gNCwNCj4gICAgICA+ICAgICAg
ICAgIC5jYWxfZGF0YV9sZW4gPSAxMjA2NCwgKi8NCj4gICAgICA+ICAgICAgICAgIC5mdyA9IHsN
Cj4gICAgICA+ICAgICAgICAgICAgICAuZGlyID0gUUNBOTk4NF9IV18xXzBfRldfRElSLA0KPiAg
ICAgID4gICAgICAgICAgICAgIC5mdyA9IFFDQTk5ODRfSFdfMV8wX0ZXX0ZJTEUsDQo+ICAgICAg
PiAtLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t
LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tDQo+ICAgICAgPiAgIEhl
cmUsIHRoZSBjb21tZW50ZWQgb3V0IG1lbWJlcnMgYXJlIG5vdCBwcmVzZW50IGluIG15IGRyaXZl
ciBzb3VyY2UgY29kZS4NCj4gICAgICA+DQo+ICAgICAgPiBiKSAgImF0aDEwa19wY2kgMDAwMTow
MTowMC4wOiB1bmFibGUgdG8gcmVhZCBmcm9tIHRoZSBkZXZpY2UiIFRoaXMgaXMgZW5jb3VudGVy
ZWQgYXQgcnVudGltZS4gVXBvbg0KPiAgICAgID4gaW52ZXN0aWdhdGluZywgaXQgaXMgc2VlbiB0
aGF0ICBhdGgxMGtfYm1pX2V4ZWN1dGUoYXIsIGFkZHJlc3MsIEJNSV9QQVJBTV9HRVRfRUVQUk9N
X0JPQVJEX0lELCAmcmVzdWx0KQ0KPiAgICAgID4gcmV0dXJucyAwIGluIGRyaXZlcnMvbmV0L3dp
cmVsZXNzL2F0aC9hdGgxMGsvY29yZS5jIHdoZW4gY2FsbGVkIGZyb20gYXRoMTBrX2NvcmVfZ2V0
X2JvYXJkX2lkX2Zyb21fb3RwDQo+ICAgICAgPg0KPiAgICAgID4gT24gYnJvd3NpbmcgdGhlIHNv
dXJjZSBvZiB0aGUgZXJyb3IgSSBoYXZlIGZvdW5kIHRoZSBjb250cm9sIHRvIGdvIGZyb20gYXRo
MTBrX2JtaV9leGVjdXRlIC0tLS0+DQo+ICAgICAgPiAgIGF0aDEwa19wY2lfaGlmX2V4Y2hhbmdl
X2JtaV9tc2cgaW4gZHJpdmVycy9uZXQvd2lyZWxlc3MvYXRoL2F0aDEway9wY2kuYyAtLS0tLS0+
ICBhdGgxMGtfcGNpX2JtaV93YWl0IGluDQo+ICAgICAgPiBkcml2ZXJzL25ldC93aXJlbGVzcy9h
dGgvYXRoMTBrL3BjaS5jIHdoZXJlIGl0IHJldHVybnMgIC1FVElNRURPVVQNCj4NCj4gICAgIENh
biB5b3UgcGxlYXNlIG1vdmUgdG8gdGhlIGxhdGVzdCBhdGgxMGsgc3JjIChhdGguZ2l0KSBhbmQg
ZW5hYmxlIDB4NDIwIChibWkgYW5kIGJvb3QgcmVsYXRlZCBkZWJ1ZykgYXRoMTBrDQo+ICAgICBk
ZWJ1ZyBtYXNrPy4NCj4NCj4gICAgIFlvdSBjYW4gZW5hYmxlIHRoZSBkZWJ1ZyB0aHJvdWdoIG1v
ZHBhcmFtLCBpbnNtb2QgYXRoMTBrX2NvcmUgZGVidWdfbWFzaz0weDQyMC4NCj4NCj4NCj4gICAg
IFZhc2FudGgNCj4NCj4gICAgIF9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f
X19fX19fX19fDQo+ICAgICBhdGgxMGsgbWFpbGluZyBsaXN0DQo+ICAgICBhdGgxMGtAbGlzdHMu
aW5mcmFkZWFkLm9yZyA8bWFpbHRvOmF0aDEwa0BsaXN0cy5pbmZyYWRlYWQub3JnPg0KPiAgICAg
aHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9hdGgxMGsNCj4NCj4N
Cg==