Hello,
This is an attempt at adding "depends || COMPILE_TEST" to all NAND
drivers that have no compile-time dependencies on arch
features/headers.
This will hopefully help us (NAND/MTD maintainers) in detecting build
issues earlier. Unfortunately we still have a few drivers that can't
easily be modified to be arch independent.
I tried to put all patches that only touch the NAND subsystem first,
so that they can be applied even if other patches are being discussed.
Don't hesitate to point any missing dependencies when compiled with
COMPILE_TEST. I didn't have any problem when compiling, but that might
be because the dependencies were already selected.
In this v2, I tried to fix all warnings/errors reported by kbuild/0day
robots. The only remaining ones are those in omap_elm.c which seems to
do some weird cpu_to_be32() conversions. I guess I could replace those
by iowrite32be() calls (or just add (__force __u32)), but I don't want
to risk a regression on this driver, so I'm just leaving it for someone
else to fix :P.
Regards,
Boris
Changes in v2:
- Fix a few problems reported by kbuild robots and Stephen Rothwell
Boris Brezillon (24):
mtd: rawnand: atmel: Use uintptr_t casts instead of unsigned int
mtd: rawnand: atmel: Add an __iomem cast on gen_pool_dma_alloc() call
mtd: rawnand: atmel: Allow selection of this driver when
COMPILE_TEST=y
mtd: rawnand: s3c2410: Allow selection of this driver when
COMPILE_TEST=y
mtd: rawnand: orion: Avoid direct inclusion of asm headers
mtd: rawnand: orion: Allow selection of this driver when
COMPILE_TEST=y
mtd: rawnand: davinci: Stop doing iomem pointer <-> u32 conversions
mtd: rawnand: davinci: Use uintptr_t casts instead of unsigned ones
mtd: rawnand: davinci: Allow selection of this driver when
COMPILE_TEST=y
mtd: rawnand: sunxi: Add an U suffix to NFC_PAGE_OP definition
mtd: rawnand: sunxi: Make sure ret is initialized in
sunxi_nfc_read_byte()
mtd: rawnand: sunxi: Allow selection of this driver when
COMPILE_TEST=y
mtd: rawnand: fscm: Avoid collision on PC def when compiling for MIPS
mtd: rawnand: fsmc: Use uintptr_t casts instead of unsigned ones
mtd: rawnand: fsmc: Allow selection of this driver when COMPILE_TEST=y
memory: fsl_ifc: Allow selection of this driver when COMPILE_TEST=y
mtd: rawnand: fsl_ifc: Add an __iomem specifier on eccstat_regs
mtd: rawnand: fsl_ifc: Allow selection of this driver when
COMPILE_TEST=y
MIPS: txx9: Move the ndfc.h header to include/linux/platform_data/txx9
mtd: rawnand: txx9ndfmc: Allow selection of this driver when
COMPILE_TEST=y
MIPS: jz4740: Move jz4740_nand.h header to
include/linux/platform_data/jz4740
mtd: rawnand: jz4740: Allow selection of this driver when
COMPILE_TEST=y
mtd: rawnand: jz4780: Drop the dependency on MACH_JZ4780
memory: jz4780-nemc: Allow selection of this driver when
COMPILE_TEST=y
arch/mips/jz4740/board-qi_lb60.c | 3 +-
arch/mips/txx9/generic/setup.c | 2 +-
arch/mips/txx9/generic/setup_tx4938.c | 2 +-
arch/mips/txx9/generic/setup_tx4939.c | 2 +-
drivers/memory/Kconfig | 6 ++--
drivers/mtd/nand/raw/Kconfig | 33 ++++++++++++++--------
drivers/mtd/nand/raw/atmel/nand-controller.c | 8 +++---
drivers/mtd/nand/raw/davinci_nand.c | 33 ++++++++++------------
drivers/mtd/nand/raw/fsl_ifc_nand.c | 2 +-
drivers/mtd/nand/raw/fsmc_nand.c | 33 +++++++++++-----------
drivers/mtd/nand/raw/jz4740_nand.c | 2 +-
drivers/mtd/nand/raw/orion_nand.c | 2 +-
drivers/mtd/nand/raw/sunxi_nand.c | 4 +--
drivers/mtd/nand/raw/txx9ndfmc.c | 2 +-
.../linux/platform_data/jz4740}/jz4740_nand.h | 4 +--
.../linux/platform_data}/txx9/ndfmc.h | 6 ++--
16 files changed, 77 insertions(+), 67 deletions(-)
rename {arch/mips/include/asm/mach-jz4740 => include/linux/platform_data/jz4740}/jz4740_nand.h (91%)
rename {arch/mips/include/asm => include/linux/platform_data}/txx9/ndfmc.h (91%)
--
2.14.1
On Mon, Jul 9, 2018 at 10:09 PM, Boris Brezillon
<[email protected]> wrote:
> Fixes the following smatch warning:
>
> drivers/mtd/nand/raw/sunxi_nand.c:551 sunxi_nfc_read_byte() error: uninitialized symbol 'ret'.
>
> Signed-off-by: Boris Brezillon <[email protected]>
> ---
> drivers/mtd/nand/raw/sunxi_nand.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
> index 99043c3a4fa7..4b11cd4a79be 100644
> --- a/drivers/mtd/nand/raw/sunxi_nand.c
> +++ b/drivers/mtd/nand/raw/sunxi_nand.c
> @@ -544,7 +544,7 @@ static void sunxi_nfc_write_buf(struct mtd_info *mtd, const uint8_t *buf,
>
> static uint8_t sunxi_nfc_read_byte(struct mtd_info *mtd)
> {
> - uint8_t ret;
> + uint8_t ret = 0;
>
> sunxi_nfc_read_buf(mtd, &ret, 1);
>
Should there perhaps be a warning when no data was returned after a timeout?
Arnd
Hi Boris,
Boris Brezillon <[email protected]> wrote on Mon, 9 Jul 2018
22:09:21 +0200:
> Hello,
>
> This is an attempt at adding "depends || COMPILE_TEST" to all NAND
> drivers that have no compile-time dependencies on arch
> features/headers.
>
> This will hopefully help us (NAND/MTD maintainers) in detecting build
> issues earlier. Unfortunately we still have a few drivers that can't
> easily be modified to be arch independent.
>
> I tried to put all patches that only touch the NAND subsystem first,
> so that they can be applied even if other patches are being discussed.
>
> Don't hesitate to point any missing dependencies when compiled with
> COMPILE_TEST. I didn't have any problem when compiling, but that might
> be because the dependencies were already selected.
>
> In this v2, I tried to fix all warnings/errors reported by kbuild/0day
> robots. The only remaining ones are those in omap_elm.c which seems to
> do some weird cpu_to_be32() conversions. I guess I could replace those
> by iowrite32be() calls (or just add (__force __u32)), but I don't want
> to risk a regression on this driver, so I'm just leaving it for someone
> else to fix :P.
>
> Regards,
>
> Boris
>
> Changes in v2:
> - Fix a few problems reported by kbuild robots and Stephen Rothwell
>
> Boris Brezillon (24):
> mtd: rawnand: atmel: Use uintptr_t casts instead of unsigned int
> mtd: rawnand: atmel: Add an __iomem cast on gen_pool_dma_alloc() call
> mtd: rawnand: atmel: Allow selection of this driver when
> COMPILE_TEST=y
> mtd: rawnand: s3c2410: Allow selection of this driver when
> COMPILE_TEST=y
> mtd: rawnand: orion: Avoid direct inclusion of asm headers
> mtd: rawnand: orion: Allow selection of this driver when
> COMPILE_TEST=y
> mtd: rawnand: davinci: Stop doing iomem pointer <-> u32 conversions
> mtd: rawnand: davinci: Use uintptr_t casts instead of unsigned ones
> mtd: rawnand: davinci: Allow selection of this driver when
> COMPILE_TEST=y
> mtd: rawnand: sunxi: Add an U suffix to NFC_PAGE_OP definition
> mtd: rawnand: sunxi: Make sure ret is initialized in
> sunxi_nfc_read_byte()
> mtd: rawnand: sunxi: Allow selection of this driver when
> COMPILE_TEST=y
> mtd: rawnand: fscm: Avoid collision on PC def when compiling for MIPS
> mtd: rawnand: fsmc: Use uintptr_t casts instead of unsigned ones
> mtd: rawnand: fsmc: Allow selection of this driver when COMPILE_TEST=y
> memory: fsl_ifc: Allow selection of this driver when COMPILE_TEST=y
> mtd: rawnand: fsl_ifc: Add an __iomem specifier on eccstat_regs
> mtd: rawnand: fsl_ifc: Allow selection of this driver when
> COMPILE_TEST=y
> MIPS: txx9: Move the ndfc.h header to include/linux/platform_data/txx9
> mtd: rawnand: txx9ndfmc: Allow selection of this driver when
> COMPILE_TEST=y
> MIPS: jz4740: Move jz4740_nand.h header to
> include/linux/platform_data/jz4740
> mtd: rawnand: jz4740: Allow selection of this driver when
> COMPILE_TEST=y
> mtd: rawnand: jz4780: Drop the dependency on MACH_JZ4780
> memory: jz4780-nemc: Allow selection of this driver when
> COMPILE_TEST=y
>
> arch/mips/jz4740/board-qi_lb60.c | 3 +-
> arch/mips/txx9/generic/setup.c | 2 +-
> arch/mips/txx9/generic/setup_tx4938.c | 2 +-
> arch/mips/txx9/generic/setup_tx4939.c | 2 +-
> drivers/memory/Kconfig | 6 ++--
> drivers/mtd/nand/raw/Kconfig | 33 ++++++++++++++--------
> drivers/mtd/nand/raw/atmel/nand-controller.c | 8 +++---
> drivers/mtd/nand/raw/davinci_nand.c | 33 ++++++++++------------
> drivers/mtd/nand/raw/fsl_ifc_nand.c | 2 +-
> drivers/mtd/nand/raw/fsmc_nand.c | 33 +++++++++++-----------
> drivers/mtd/nand/raw/jz4740_nand.c | 2 +-
> drivers/mtd/nand/raw/orion_nand.c | 2 +-
> drivers/mtd/nand/raw/sunxi_nand.c | 4 +--
> drivers/mtd/nand/raw/txx9ndfmc.c | 2 +-
> .../linux/platform_data/jz4740}/jz4740_nand.h | 4 +--
> .../linux/platform_data}/txx9/ndfmc.h | 6 ++--
> 16 files changed, 77 insertions(+), 67 deletions(-)
> rename {arch/mips/include/asm/mach-jz4740 => include/linux/platform_data/jz4740}/jz4740_nand.h (91%)
> rename {arch/mips/include/asm => include/linux/platform_data}/txx9/ndfmc.h (91%)
>
Series applied with some typo fixes in the commit log as well as a
proper indentation forced in drivers/mtd/nand/raw/Kconfig.
Thanks,
Miquèl
This MACH_JZ4780 dependency is taken care of by JZ4780_NEMC, no need
to repeat it here.
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 7b5e97719c25..d9cd9608bc2d 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -499,7 +499,7 @@ config MTD_NAND_JZ4740
config MTD_NAND_JZ4780
tristate "Support for NAND on JZ4780 SoC"
- depends on MACH_JZ4780 && JZ4780_NEMC
+ depends on JZ4780_NEMC
help
Enables support for NAND Flash connected to the NEMC on JZ4780 SoC
based boards, using the BCH controller for hardware error correction.
--
2.14.1
Include linux/sizes.h instead of asm/sizes.h to make code completely
arch independent.
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/orion_nand.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/orion_nand.c b/drivers/mtd/nand/raw/orion_nand.c
index 1a4828442675..27cc902545f3 100644
--- a/drivers/mtd/nand/raw/orion_nand.c
+++ b/drivers/mtd/nand/raw/orion_nand.c
@@ -18,7 +18,7 @@
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/io.h>
-#include <asm/sizes.h>
+#include <linux/sizes.h>
#include <linux/platform_data/mtd-orion_nand.h>
struct orion_nand_info {
--
2.14.1
Hi Boris,
On Mon, Jul 09, 2018 at 10:09:21PM +0200, Boris Brezillon wrote:
> MIPS: txx9: Move the ndfc.h header to include/linux/platform_data/txx9
> mtd: rawnand: txx9ndfmc: Allow selection of this driver when
> COMPILE_TEST=y
> MIPS: jz4740: Move jz4740_nand.h header to
> include/linux/platform_data/jz4740
> mtd: rawnand: jz4740: Allow selection of this driver when
> COMPILE_TEST=y
> mtd: rawnand: jz4780: Drop the dependency on MACH_JZ4780
> memory: jz4780-nemc: Allow selection of this driver when
> COMPILE_TEST=y
>
> arch/mips/jz4740/board-qi_lb60.c | 3 +-
> arch/mips/txx9/generic/setup.c | 2 +-
> arch/mips/txx9/generic/setup_tx4938.c | 2 +-
> arch/mips/txx9/generic/setup_tx4939.c | 2 +-
> drivers/memory/Kconfig | 6 ++--
> drivers/mtd/nand/raw/Kconfig | 33 ++++++++++++++--------
> drivers/mtd/nand/raw/jz4740_nand.c | 2 +-
> drivers/mtd/nand/raw/txx9ndfmc.c | 2 +-
> .../linux/platform_data/jz4740}/jz4740_nand.h | 4 +--
> .../linux/platform_data}/txx9/ndfmc.h | 6 ++--
> rename {arch/mips/include/asm/mach-jz4740 => include/linux/platform_data/jz4740}/jz4740_nand.h (91%)
> rename {arch/mips/include/asm => include/linux/platform_data}/txx9/ndfmc.h (91%)
For the MIPS-related patches 19-24:
Acked-by: Paul Burton <[email protected]>
Thanks,
Paul
We want to allow this driver to be selected when COMPILE_TEST=y, this
means the driver can be compiled for any arch, including MIPS. When
compiling this driver for MIPS, we end up with a collision on the 'PC'
macro definition (also defined in arch/mips/include/asm/ptrace.h).
Prefix the fsmc one with FSMC_ to avoid this problem.
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/fsmc_nand.c | 29 +++++++++++++++--------------
1 file changed, 15 insertions(+), 14 deletions(-)
diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
index f4a5a317d4ae..d71c49f50e77 100644
--- a/drivers/mtd/nand/raw/fsmc_nand.c
+++ b/drivers/mtd/nand/raw/fsmc_nand.c
@@ -62,7 +62,7 @@
reg)
/* fsmc controller registers for NAND flash */
-#define PC 0x00
+#define FSMC_PC 0x00
/* pc register definitions */
#define FSMC_RESET (1 << 0)
#define FSMC_WAITON (1 << 1)
@@ -273,12 +273,13 @@ static void fsmc_nand_setup(struct fsmc_nand_data *host,
tset = (tims->tset & FSMC_TSET_MASK) << FSMC_TSET_SHIFT;
if (host->nand.options & NAND_BUSWIDTH_16)
- writel_relaxed(value | FSMC_DEVWID_16, host->regs_va + PC);
+ writel_relaxed(value | FSMC_DEVWID_16,
+ host->regs_va + FSMC_PC);
else
- writel_relaxed(value | FSMC_DEVWID_8, host->regs_va + PC);
+ writel_relaxed(value | FSMC_DEVWID_8, host->regs_va + FSMC_PC);
- writel_relaxed(readl(host->regs_va + PC) | tclr | tar,
- host->regs_va + PC);
+ writel_relaxed(readl(host->regs_va + FSMC_PC) | tclr | tar,
+ host->regs_va + FSMC_PC);
writel_relaxed(thiz | thold | twait | tset, host->regs_va + COMM);
writel_relaxed(thiz | thold | twait | tset, host->regs_va + ATTRIB);
}
@@ -371,12 +372,12 @@ static void fsmc_enable_hwecc(struct mtd_info *mtd, int mode)
{
struct fsmc_nand_data *host = mtd_to_fsmc(mtd);
- writel_relaxed(readl(host->regs_va + PC) & ~FSMC_ECCPLEN_256,
- host->regs_va + PC);
- writel_relaxed(readl(host->regs_va + PC) & ~FSMC_ECCEN,
- host->regs_va + PC);
- writel_relaxed(readl(host->regs_va + PC) | FSMC_ECCEN,
- host->regs_va + PC);
+ writel_relaxed(readl(host->regs_va + FSMC_PC) & ~FSMC_ECCPLEN_256,
+ host->regs_va + FSMC_PC);
+ writel_relaxed(readl(host->regs_va + FSMC_PC) & ~FSMC_ECCEN,
+ host->regs_va + FSMC_PC);
+ writel_relaxed(readl(host->regs_va + FSMC_PC) | FSMC_ECCEN,
+ host->regs_va + FSMC_PC);
}
/*
@@ -618,11 +619,11 @@ static void fsmc_select_chip(struct mtd_info *mtd, int chipnr)
if (chipnr > 0)
return;
- pc = readl(host->regs_va + PC);
+ pc = readl(host->regs_va + FSMC_PC);
if (chipnr < 0)
- writel_relaxed(pc & ~FSMC_ENABLE, host->regs_va + PC);
+ writel_relaxed(pc & ~FSMC_ENABLE, host->regs_va + FSMC_PC);
else
- writel_relaxed(pc | FSMC_ENABLE, host->regs_va + PC);
+ writel_relaxed(pc | FSMC_ENABLE, host->regs_va + FSMC_PC);
/* nCE line must be asserted before starting any operation */
mb();
--
2.14.1
Hi Miquel,
Miquel Raynal <[email protected]> wrote on Wed, 18 Jul 2018
09:13:32 +0200:
> Hi Boris,
>
> Boris Brezillon <[email protected]> wrote on Mon, 9 Jul 2018
> 22:09:21 +0200:
>
> > Hello,
> >
> > This is an attempt at adding "depends || COMPILE_TEST" to all NAND
> > drivers that have no compile-time dependencies on arch
> > features/headers.
> >
> > This will hopefully help us (NAND/MTD maintainers) in detecting build
> > issues earlier. Unfortunately we still have a few drivers that can't
> > easily be modified to be arch independent.
> >
> > I tried to put all patches that only touch the NAND subsystem first,
> > so that they can be applied even if other patches are being discussed.
> >
> > Don't hesitate to point any missing dependencies when compiled with
> > COMPILE_TEST. I didn't have any problem when compiling, but that might
> > be because the dependencies were already selected.
> >
> > In this v2, I tried to fix all warnings/errors reported by kbuild/0day
> > robots. The only remaining ones are those in omap_elm.c which seems to
> > do some weird cpu_to_be32() conversions. I guess I could replace those
> > by iowrite32be() calls (or just add (__force __u32)), but I don't want
> > to risk a regression on this driver, so I'm just leaving it for someone
> > else to fix :P.
> >
> > Regards,
> >
> > Boris
> >
> > Changes in v2:
> > - Fix a few problems reported by kbuild robots and Stephen Rothwell
> >
> > Boris Brezillon (24):
> > mtd: rawnand: atmel: Use uintptr_t casts instead of unsigned int
> > mtd: rawnand: atmel: Add an __iomem cast on gen_pool_dma_alloc() call
> > mtd: rawnand: atmel: Allow selection of this driver when
> > COMPILE_TEST=y
> > mtd: rawnand: s3c2410: Allow selection of this driver when
> > COMPILE_TEST=y
> > mtd: rawnand: orion: Avoid direct inclusion of asm headers
> > mtd: rawnand: orion: Allow selection of this driver when
> > COMPILE_TEST=y
> > mtd: rawnand: davinci: Stop doing iomem pointer <-> u32 conversions
> > mtd: rawnand: davinci: Use uintptr_t casts instead of unsigned ones
> > mtd: rawnand: davinci: Allow selection of this driver when
> > COMPILE_TEST=y
> > mtd: rawnand: sunxi: Add an U suffix to NFC_PAGE_OP definition
> > mtd: rawnand: sunxi: Make sure ret is initialized in
> > sunxi_nfc_read_byte()
> > mtd: rawnand: sunxi: Allow selection of this driver when
> > COMPILE_TEST=y
> > mtd: rawnand: fscm: Avoid collision on PC def when compiling for MIPS
> > mtd: rawnand: fsmc: Use uintptr_t casts instead of unsigned ones
> > mtd: rawnand: fsmc: Allow selection of this driver when COMPILE_TEST=y
> > memory: fsl_ifc: Allow selection of this driver when COMPILE_TEST=y
> > mtd: rawnand: fsl_ifc: Add an __iomem specifier on eccstat_regs
> > mtd: rawnand: fsl_ifc: Allow selection of this driver when
> > COMPILE_TEST=y
> > MIPS: txx9: Move the ndfc.h header to include/linux/platform_data/txx9
> > mtd: rawnand: txx9ndfmc: Allow selection of this driver when
> > COMPILE_TEST=y
> > MIPS: jz4740: Move jz4740_nand.h header to
> > include/linux/platform_data/jz4740
> > mtd: rawnand: jz4740: Allow selection of this driver when
> > COMPILE_TEST=y
> > mtd: rawnand: jz4780: Drop the dependency on MACH_JZ4780
> > memory: jz4780-nemc: Allow selection of this driver when
> > COMPILE_TEST=y
> >
> > arch/mips/jz4740/board-qi_lb60.c | 3 +-
> > arch/mips/txx9/generic/setup.c | 2 +-
> > arch/mips/txx9/generic/setup_tx4938.c | 2 +-
> > arch/mips/txx9/generic/setup_tx4939.c | 2 +-
> > drivers/memory/Kconfig | 6 ++--
> > drivers/mtd/nand/raw/Kconfig | 33 ++++++++++++++--------
> > drivers/mtd/nand/raw/atmel/nand-controller.c | 8 +++---
> > drivers/mtd/nand/raw/davinci_nand.c | 33 ++++++++++------------
> > drivers/mtd/nand/raw/fsl_ifc_nand.c | 2 +-
> > drivers/mtd/nand/raw/fsmc_nand.c | 33 +++++++++++-----------
> > drivers/mtd/nand/raw/jz4740_nand.c | 2 +-
> > drivers/mtd/nand/raw/orion_nand.c | 2 +-
> > drivers/mtd/nand/raw/sunxi_nand.c | 4 +--
> > drivers/mtd/nand/raw/txx9ndfmc.c | 2 +-
> > .../linux/platform_data/jz4740}/jz4740_nand.h | 4 +--
> > .../linux/platform_data}/txx9/ndfmc.h | 6 ++--
> > 16 files changed, 77 insertions(+), 67 deletions(-)
> > rename {arch/mips/include/asm/mach-jz4740 => include/linux/platform_data/jz4740}/jz4740_nand.h (91%)
> > rename {arch/mips/include/asm => include/linux/platform_data}/txx9/ndfmc.h (91%)
> >
>
> Series applied with some typo fixes in the commit log as well as a
> proper indentation forced in drivers/mtd/nand/raw/Kconfig.
Forgot to mention: minus orion and s3c patches that will need a v3.
>
> Thanks,
> Miquèl
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having SOC_TX4938 or SOC_TX4939
enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index dc6c5aff4172..f4bbc90ee250 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -471,7 +471,8 @@ config MTD_NAND_DAVINCI
config MTD_NAND_TXX9NDFMC
tristate "NAND Flash support for TXx9 SoC"
- depends on SOC_TX4938 || SOC_TX4939
+ depends on SOC_TX4938 || SOC_TX4939 || COMPILE_TEST
+ depends on HAS_IOMEM
help
This enables the NAND flash controller on the TXx9 SoCs.
--
2.14.1
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_DAVINCI or ARCH_KEYSTONE
enabled.
We also need to add a dependency on HAS_IOMEM to make sure the
driver compiles correctly.
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index efc5dcd5135c..539b0619f53a 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -462,7 +462,8 @@ config MTD_NAND_SH_FLCTL
config MTD_NAND_DAVINCI
tristate "Support NAND on DaVinci/Keystone SoC"
- depends on ARCH_DAVINCI || (ARCH_KEYSTONE && TI_AEMIF)
+ depends on ARCH_DAVINCI || (ARCH_KEYSTONE && TI_AEMIF) || COMPILE_TEST
+ depends on HAS_IOMEM
help
Enable the driver for NAND flash chips on Texas Instruments
DaVinci/Keystone processors.
--
2.14.1
This way we will be able to compile the ndfmc driver when
COMPILE_TEST=y.
Signed-off-by: Boris Brezillon <[email protected]>
---
arch/mips/txx9/generic/setup.c | 2 +-
arch/mips/txx9/generic/setup_tx4938.c | 2 +-
arch/mips/txx9/generic/setup_tx4939.c | 2 +-
drivers/mtd/nand/raw/txx9ndfmc.c | 2 +-
{arch/mips/include/asm => include/linux/platform_data}/txx9/ndfmc.h | 6 +++---
5 files changed, 7 insertions(+), 7 deletions(-)
rename {arch/mips/include/asm => include/linux/platform_data}/txx9/ndfmc.h (91%)
diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c
index 1791a44ee570..aa47932abd28 100644
--- a/arch/mips/txx9/generic/setup.c
+++ b/arch/mips/txx9/generic/setup.c
@@ -20,6 +20,7 @@
#include <linux/err.h>
#include <linux/gpio/driver.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/txx9/ndfmc.h>
#include <linux/serial_core.h>
#include <linux/mtd/physmap.h>
#include <linux/leds.h>
@@ -35,7 +36,6 @@
#include <asm/txx9/generic.h>
#include <asm/txx9/pci.h>
#include <asm/txx9tmr.h>
-#include <asm/txx9/ndfmc.h>
#include <asm/txx9/dmac.h>
#ifdef CONFIG_CPU_TX49XX
#include <asm/txx9/tx4938.h>
diff --git a/arch/mips/txx9/generic/setup_tx4938.c b/arch/mips/txx9/generic/setup_tx4938.c
index 85d1795652da..17395d5d15ca 100644
--- a/arch/mips/txx9/generic/setup_tx4938.c
+++ b/arch/mips/txx9/generic/setup_tx4938.c
@@ -17,13 +17,13 @@
#include <linux/ptrace.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/txx9/ndfmc.h>
#include <asm/reboot.h>
#include <asm/traps.h>
#include <asm/txx9irq.h>
#include <asm/txx9tmr.h>
#include <asm/txx9pio.h>
#include <asm/txx9/generic.h>
-#include <asm/txx9/ndfmc.h>
#include <asm/txx9/dmac.h>
#include <asm/txx9/tx4938.h>
diff --git a/arch/mips/txx9/generic/setup_tx4939.c b/arch/mips/txx9/generic/setup_tx4939.c
index 274928987a21..360c388f4c82 100644
--- a/arch/mips/txx9/generic/setup_tx4939.c
+++ b/arch/mips/txx9/generic/setup_tx4939.c
@@ -21,13 +21,13 @@
#include <linux/ptrace.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/txx9/ndfmc.h>
#include <asm/bootinfo.h>
#include <asm/reboot.h>
#include <asm/traps.h>
#include <asm/txx9irq.h>
#include <asm/txx9tmr.h>
#include <asm/txx9/generic.h>
-#include <asm/txx9/ndfmc.h>
#include <asm/txx9/dmac.h>
#include <asm/txx9/tx4939.h>
diff --git a/drivers/mtd/nand/raw/txx9ndfmc.c b/drivers/mtd/nand/raw/txx9ndfmc.c
index b567d212fe7d..04d57474ef97 100644
--- a/drivers/mtd/nand/raw/txx9ndfmc.c
+++ b/drivers/mtd/nand/raw/txx9ndfmc.c
@@ -20,7 +20,7 @@
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>
#include <linux/io.h>
-#include <asm/txx9/ndfmc.h>
+#include <linux/platform_data/txx9/ndfmc.h>
/* TXX9 NDFMC Registers */
#define TXX9_NDFDTR 0x00
diff --git a/arch/mips/include/asm/txx9/ndfmc.h b/include/linux/platform_data/txx9/ndfmc.h
similarity index 91%
rename from arch/mips/include/asm/txx9/ndfmc.h
rename to include/linux/platform_data/txx9/ndfmc.h
index fa67f3df78fc..fc172627d54e 100644
--- a/arch/mips/include/asm/txx9/ndfmc.h
+++ b/include/linux/platform_data/txx9/ndfmc.h
@@ -5,8 +5,8 @@
*
* (C) Copyright TOSHIBA CORPORATION 2007
*/
-#ifndef __ASM_TXX9_NDFMC_H
-#define __ASM_TXX9_NDFMC_H
+#ifndef __TXX9_NDFMC_H
+#define __TXX9_NDFMC_H
#define NDFMC_PLAT_FLAG_USE_BSPRT 0x01
#define NDFMC_PLAT_FLAG_NO_RSTR 0x02
@@ -27,4 +27,4 @@ struct txx9ndfmc_platform_data {
void txx9_ndfmc_init(unsigned long baseaddr,
const struct txx9ndfmc_platform_data *plat_data);
-#endif /* __ASM_TXX9_NDFMC_H */
+#endif /* __TXX9_NDFMC_H */
--
2.14.1
uintptr_t should be used when casting a pointer to an unsigned int so
that the code compiles without warnings even on 64-bit architectures.
This is needed if we want to allow selection of this driver when
COMPILE_TEST=y.
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/fsmc_nand.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
index d71c49f50e77..527bebc7e6c9 100644
--- a/drivers/mtd/nand/raw/fsmc_nand.c
+++ b/drivers/mtd/nand/raw/fsmc_nand.c
@@ -547,7 +547,7 @@ static void fsmc_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
struct fsmc_nand_data *host = mtd_to_fsmc(mtd);
int i;
- if (IS_ALIGNED((uint32_t)buf, sizeof(uint32_t)) &&
+ if (IS_ALIGNED((uintptr_t)buf, sizeof(uint32_t)) &&
IS_ALIGNED(len, sizeof(uint32_t))) {
uint32_t *p = (uint32_t *)buf;
len = len >> 2;
@@ -570,7 +570,7 @@ static void fsmc_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
struct fsmc_nand_data *host = mtd_to_fsmc(mtd);
int i;
- if (IS_ALIGNED((uint32_t)buf, sizeof(uint32_t)) &&
+ if (IS_ALIGNED((uintptr_t)buf, sizeof(uint32_t)) &&
IS_ALIGNED(len, sizeof(uint32_t))) {
uint32_t *p = (uint32_t *)buf;
len = len >> 2;
--
2.14.1
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having PLAT_SPEAR, ARCH_NOMADIK,
ARCH_U8500 or MACH_U300 enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/Kconfig | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index ee836f7d7b8b..29d360f984c9 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -503,8 +503,9 @@ config MTD_NAND_JZ4780
config MTD_NAND_FSMC
tristate "Support for NAND on ST Micros FSMC"
- depends on OF
- depends on PLAT_SPEAR || ARCH_NOMADIK || ARCH_U8500 || MACH_U300
+ depends on OF && HAS_IOMEM
+ depends on PLAT_SPEAR || ARCH_NOMADIK || ARCH_U8500 || MACH_U300 || \
+ COMPILE_TEST
help
Enables support for NAND Flash chips on the ST Microelectronics
Flexible Static Memory Controller (FSMC)
--
2.14.1
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_S3C24XX or ARCH_S3C64XX
enabled.
We add a dependency on HAS_IOMEM to make sure the driver compiles
correctly, and a dependency on !IA64 because the {read,write}s{bwl}()
accessors are not defined for this architecture.
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 1488ad0a0199..e01b3da726c0 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -119,7 +119,8 @@ config MTD_NAND_AU1550
config MTD_NAND_S3C2410
tristate "NAND Flash support for Samsung S3C SoCs"
- depends on ARCH_S3C24XX || ARCH_S3C64XX
+ depends on ARCH_S3C24XX || ARCH_S3C64XX || COMPILE_TEST
+ depends on HAS_IOMEM && !IA64
help
This enables the NAND flash controller on the S3C24xx and S3C64xx
SoCs
--
2.14.1
It just makes maintainers' life easier by allowing them to compile-test
this driver without having FSL_SOC, ARCH_LAYERSCAPE or SOC_LS1021A
enabled.
We also need to add a dependency on HAS_IOMEM to make sure the
driver compiles correctly.
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 29d360f984c9..dc6c5aff4172 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -408,7 +408,8 @@ config MTD_NAND_FSL_ELBC
config MTD_NAND_FSL_IFC
tristate "NAND support for Freescale IFC controller"
- depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A
+ depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST
+ depends on HAS_IOMEM
select FSL_IFC
select MEMORY
help
--
2.14.1
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having PLAT_ORION enabled.
We add a dependency on HAS_IOMEM to make sure the driver compiles
correctly, and a dependency on !IA64 because the {read,write}s{bwl}()
accessors are not defined for this architecture.
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/Kconfig | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index e01b3da726c0..efc5dcd5135c 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -289,7 +289,7 @@ config MTD_NAND_MARVELL
tristate "NAND controller support on Marvell boards"
depends on PXA3xx || ARCH_MMP || PLAT_ORION || ARCH_MVEBU || \
COMPILE_TEST
- depends on HAS_IOMEM
+ depends on HAS_IOMEM && !IA64
help
This enables the NAND flash controller driver for Marvell boards,
including:
@@ -381,7 +381,8 @@ config MTD_NAND_PLATFORM
config MTD_NAND_ORION
tristate "NAND Flash support for Marvell Orion SoC"
- depends on PLAT_ORION
+ depends on PLAT_ORION || COMPILE_TEST
+ depends on HAS_IOMEM
help
This enables the NAND flash controller on Orion machines.
--
2.14.1
This way we will be able to compile the jz4740_nand driver when
COMPILE_TEST=y.
Signed-off-by: Boris Brezillon <[email protected]>
---
arch/mips/jz4740/board-qi_lb60.c | 3 ++-
drivers/mtd/nand/raw/jz4740_nand.c | 2 +-
.../mach-jz4740 => include/linux/platform_data/jz4740}/jz4740_nand.h | 4 ++--
3 files changed, 5 insertions(+), 4 deletions(-)
rename {arch/mips/include/asm/mach-jz4740 => include/linux/platform_data/jz4740}/jz4740_nand.h (91%)
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
index 60f0767507c6..af0c8ace0141 100644
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -29,10 +29,11 @@
#include <linux/power/gpio-charger.h>
#include <linux/pwm.h>
+#include <linux/platform_data/jz4740/jz4740_nand.h>
+
#include <asm/mach-jz4740/gpio.h>
#include <asm/mach-jz4740/jz4740_fb.h>
#include <asm/mach-jz4740/jz4740_mmc.h>
-#include <asm/mach-jz4740/jz4740_nand.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
diff --git a/drivers/mtd/nand/raw/jz4740_nand.c b/drivers/mtd/nand/raw/jz4740_nand.c
index 613b00a9604b..a0254461812d 100644
--- a/drivers/mtd/nand/raw/jz4740_nand.c
+++ b/drivers/mtd/nand/raw/jz4740_nand.c
@@ -25,7 +25,7 @@
#include <linux/gpio.h>
-#include <asm/mach-jz4740/jz4740_nand.h>
+#include <linux/platform_data/jz4740/jz4740_nand.h>
#define JZ_REG_NAND_CTRL 0x50
#define JZ_REG_NAND_ECC_CTRL 0x100
diff --git a/arch/mips/include/asm/mach-jz4740/jz4740_nand.h b/include/linux/platform_data/jz4740/jz4740_nand.h
similarity index 91%
rename from arch/mips/include/asm/mach-jz4740/jz4740_nand.h
rename to include/linux/platform_data/jz4740/jz4740_nand.h
index f381d465e768..bc571f6d5ced 100644
--- a/arch/mips/include/asm/mach-jz4740/jz4740_nand.h
+++ b/include/linux/platform_data/jz4740/jz4740_nand.h
@@ -13,8 +13,8 @@
*
*/
-#ifndef __ASM_MACH_JZ4740_JZ4740_NAND_H__
-#define __ASM_MACH_JZ4740_JZ4740_NAND_H__
+#ifndef __JZ4740_NAND_H__
+#define __JZ4740_NAND_H__
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
--
2.14.1
There is no point in doing this sort of conversion since pointers can
we can replace |= by += operations which are perfectly valid on
pointers.
This is done in preparation of COMPILE_TEST addition to the NAND_DAVINCI
Kconfig entry, since building for x86 generates a several warnings
because of inappropriate u32 <-> void * conversions (pointers are 64bits
large on x86_64).
Reported-by: Stephen Rothwell <[email protected]>
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/davinci_nand.c | 23 ++++++++++-------------
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c
index cd12e5abafde..9cd36a750965 100644
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -60,8 +60,7 @@ struct davinci_nand_info {
void __iomem *base;
void __iomem *vaddr;
- uint32_t ioaddr;
- uint32_t current_cs;
+ void __iomem *current_cs;
uint32_t mask_chipsel;
uint32_t mask_ale;
@@ -102,17 +101,17 @@ static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd,
unsigned int ctrl)
{
struct davinci_nand_info *info = to_davinci_nand(mtd);
- uint32_t addr = info->current_cs;
+ void __iomem *addr = info->current_cs;
struct nand_chip *nand = mtd_to_nand(mtd);
/* Did the control lines change? */
if (ctrl & NAND_CTRL_CHANGE) {
if ((ctrl & NAND_CTRL_CLE) == NAND_CTRL_CLE)
- addr |= info->mask_cle;
+ addr += info->mask_cle;
else if ((ctrl & NAND_CTRL_ALE) == NAND_CTRL_ALE)
- addr |= info->mask_ale;
+ addr += info->mask_ale;
- nand->IO_ADDR_W = (void __iomem __force *)addr;
+ nand->IO_ADDR_W = addr;
}
if (cmd != NAND_CMD_NONE)
@@ -122,14 +121,14 @@ static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd,
static void nand_davinci_select_chip(struct mtd_info *mtd, int chip)
{
struct davinci_nand_info *info = to_davinci_nand(mtd);
- uint32_t addr = info->ioaddr;
+
+ info->current_cs = info->vaddr;
/* maybe kick in a second chipselect */
if (chip > 0)
- addr |= info->mask_chipsel;
- info->current_cs = addr;
+ info->current_cs += info->mask_chipsel;
- info->chip.IO_ADDR_W = (void __iomem __force *)addr;
+ info->chip.IO_ADDR_W = info->current_cs;
info->chip.IO_ADDR_R = info->chip.IO_ADDR_W;
}
@@ -680,9 +679,7 @@ static int nand_davinci_probe(struct platform_device *pdev)
info->chip.bbt_md = pdata->bbt_md;
info->timing = pdata->timing;
- info->ioaddr = (uint32_t __force) vaddr;
-
- info->current_cs = info->ioaddr;
+ info->current_cs = info->vaddr;
info->core_chipsel = pdata->core_chipsel;
info->mask_chipsel = pdata->mask_chipsel;
--
2.14.1
The local eccstat_regs variable in fsl_ifc_run_command() is missing an
__iomem specifier, and sparce complains about that.
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/fsl_ifc_nand.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/fsl_ifc_nand.c b/drivers/mtd/nand/raw/fsl_ifc_nand.c
index 382b67e97174..75d3c951f61a 100644
--- a/drivers/mtd/nand/raw/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/raw/fsl_ifc_nand.c
@@ -225,7 +225,7 @@ static void fsl_ifc_run_command(struct mtd_info *mtd)
int bufnum = nctrl->page & priv->bufnum_mask;
int sector_start = bufnum * chip->ecc.steps;
int sector_end = sector_start + chip->ecc.steps - 1;
- __be32 *eccstat_regs;
+ __be32 __iomem *eccstat_regs;
eccstat_regs = ifc->ifc_nand.nand_eccstat;
eccstat = ifc_in32(&eccstat_regs[sector_start / 4]);
--
2.14.1
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_AT91 enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 230311fa2cc0..1488ad0a0199 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -277,7 +277,8 @@ config MTD_NAND_CS553X
config MTD_NAND_ATMEL
tristate "Support for NAND Flash / SmartMedia on AT91"
- depends on ARCH_AT91
+ depends on ARCH_AT91 || COMPILE_TEST
+ depends on HAS_IOMEM
select MFD_ATMEL_SMC
help
Enables support for NAND Flash / Smart Media Card interface
--
2.14.1
It just makes maintainers' life easier by allowing them to compile-test
this driver without having FSL_SOC, ARCH_LAYERSCAPE or SOC_LS1021A
enabled.
We also need to add a dependency on HAS_IOMEM to make sure the
driver compiles correctly.
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/memory/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
index 8d731d6c3e54..78457ab2cbc4 100644
--- a/drivers/memory/Kconfig
+++ b/drivers/memory/Kconfig
@@ -116,7 +116,8 @@ config FSL_CORENET_CF
config FSL_IFC
bool
- depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A
+ depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST
+ depends on HAS_IOMEM
config JZ4780_NEMC
bool "Ingenic JZ4780 SoC NEMC driver"
--
2.14.1
On Mon, 9 Jul 2018 22:35:56 +0200
Arnd Bergmann <[email protected]> wrote:
> On Mon, Jul 9, 2018 at 10:09 PM, Boris Brezillon
> <[email protected]> wrote:
> > Fixes the following smatch warning:
> >
> > drivers/mtd/nand/raw/sunxi_nand.c:551 sunxi_nfc_read_byte() error: uninitialized symbol 'ret'.
> >
> > Signed-off-by: Boris Brezillon <[email protected]>
> > ---
> > drivers/mtd/nand/raw/sunxi_nand.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
> > index 99043c3a4fa7..4b11cd4a79be 100644
> > --- a/drivers/mtd/nand/raw/sunxi_nand.c
> > +++ b/drivers/mtd/nand/raw/sunxi_nand.c
> > @@ -544,7 +544,7 @@ static void sunxi_nfc_write_buf(struct mtd_info *mtd, const uint8_t *buf,
> >
> > static uint8_t sunxi_nfc_read_byte(struct mtd_info *mtd)
> > {
> > - uint8_t ret;
> > + uint8_t ret = 0;
> >
> > sunxi_nfc_read_buf(mtd, &ret, 1);
> >
>
> Should there perhaps be a warning when no data was returned after a timeout?
We're planning to move this driver to ->exec_op() soon, and with
->exec_op() errors are properly propagated to the core. I guess we can
live with this lack of dev_warn() for a bit longer :-).
It just makes maintainers' life easier by allowing them to compile-test
this driver without having MACH_JZ4780 enabled.
We also need to add a dependency on HAS_IOMEM to make sure the
driver compiles correctly.
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/memory/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
index 78457ab2cbc4..a642552dfdc9 100644
--- a/drivers/memory/Kconfig
+++ b/drivers/memory/Kconfig
@@ -122,7 +122,8 @@ config FSL_IFC
config JZ4780_NEMC
bool "Ingenic JZ4780 SoC NEMC driver"
default y
- depends on MACH_JZ4780
+ depends on MACH_JZ4780 || COMPILE_TEST
+ depends on HAS_IOMEM
help
This driver is for the NAND/External Memory Controller (NEMC) in
the Ingenic JZ4780. This controller is used to handle external
--
2.14.1
On Wed, Jul 11, 2018 at 1:16 PM, Boris Brezillon
<[email protected]> wrote:
> On Mon, 9 Jul 2018 22:09:25 +0200
> Boris Brezillon <[email protected]> wrote:
>
>> It just makes NAND maintainers' life easier by allowing them to
>> compile-test this driver without having ARCH_S3C24XX or ARCH_S3C64XX
>> enabled.
>>
>> We add a dependency on HAS_IOMEM to make sure the driver compiles
>> correctly, and a dependency on !IA64 because the {read,write}s{bwl}()
>> accessors are not defined for this architecture.
>
> I see that SPARC does not define those accessors either. So I guess we
> should add depends on !SPARC.
>
> Arnd, any other way to know when the platform implements
> {read,write}s{bwl}() accessors?
I'd just consider that a bug, and send a patch to fix sparc64 if it's broken.
sparc32 appears to have these, and when Thierry sent the patch
to implement them everywhere[1], he said that he tested sparc64 as
well, so either something regressed since then, or his testing
was incomplete. Either way, the correct answer IMHO would be to
make it work rather than to add infrastructure around the broken
configurations.
Arnd
[1] https://lwn.net/Articles/604819/
Fixes the "warning: large integer implicitly truncated to unsigned type
[-Woverflow]" warning when compiled for x86.
This is needed in order to allow compiling this driver when
COMPILE_TEST=y.
Reported-by: Stephen Rothwell <[email protected]>
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/sunxi_nand.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index d831a141a196..99043c3a4fa7 100644
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -127,7 +127,7 @@
#define NFC_CMD_TYPE_MSK GENMASK(31, 30)
#define NFC_NORMAL_OP (0 << 30)
#define NFC_ECC_OP (1 << 30)
-#define NFC_PAGE_OP (2 << 30)
+#define NFC_PAGE_OP (2U << 30)
/* define bit use in NFC_RCMD_SET */
#define NFC_READ_CMD_MSK GENMASK(7, 0)
--
2.14.1
On Wed, Jul 11, 2018 at 1:32 PM, Boris Brezillon
<[email protected]> wrote:
> On Wed, 11 Jul 2018 13:27:53 +0200
> Arnd Bergmann <[email protected]> wrote:
>
>> On Wed, Jul 11, 2018 at 1:16 PM, Boris Brezillon
>> <[email protected]> wrote:
>> > On Mon, 9 Jul 2018 22:09:25 +0200
>> > Boris Brezillon <[email protected]> wrote:
>> >
>> >> It just makes NAND maintainers' life easier by allowing them to
>> >> compile-test this driver without having ARCH_S3C24XX or ARCH_S3C64XX
>> >> enabled.
>> >>
>> >> We add a dependency on HAS_IOMEM to make sure the driver compiles
>> >> correctly, and a dependency on !IA64 because the {read,write}s{bwl}()
>> >> accessors are not defined for this architecture.
>> >
>> > I see that SPARC does not define those accessors either. So I guess we
>> > should add depends on !SPARC.
>> >
>> > Arnd, any other way to know when the platform implements
>> > {read,write}s{bwl}() accessors?
>>
>> I'd just consider that a bug, and send a patch to fix sparc64 if it's broken.
>> sparc32 appears to have these, and when Thierry sent the patch
>> to implement them everywhere[1], he said that he tested sparc64 as
>> well, so either something regressed since then, or his testing
>> was incomplete. Either way, the correct answer IMHO would be to
>> make it work rather than to add infrastructure around the broken
>> configurations.
>
> I guess the same goes for IA64 then.
Right. FWIW, I just tried it out and sent the respective arch patches.
Arnd
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having MACH_JZ4740 enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index f4bbc90ee250..7b5e97719c25 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -492,7 +492,8 @@ config MTD_NAND_NUC900
config MTD_NAND_JZ4740
tristate "Support for JZ4740 SoC NAND controller"
- depends on MACH_JZ4740
+ depends on MACH_JZ4740 || COMPILE_TEST
+ depends on HAS_IOMEM
help
Enables support for NAND Flash on JZ4740 SoC based boards.
--
2.14.1
When casting a pointer to an unsigned in, uintptr_t should be used to
cope with the pointer size differences between 32-bit and 64-bit
architectures.
This is needed if we want to allow compilation of this driver when
COMPILE_TEST=y.
Reported-by: Stephen Rothwell <[email protected]>
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/atmel/nand-controller.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
index e686fe73159e..e8f7549d0354 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -2050,7 +2050,7 @@ atmel_smc_nand_controller_init(struct atmel_smc_nand_controller *nc)
return ret;
}
- nc->ebi_csa_offs = (unsigned int)match->data;
+ nc->ebi_csa_offs = (uintptr_t)match->data;
/*
* The at91sam9263 has 2 EBIs, if the NAND controller is under EBI1
--
2.14.1
Fixes the following smatch warning:
drivers/mtd/nand/raw/sunxi_nand.c:551 sunxi_nfc_read_byte() error: uninitialized symbol 'ret'.
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/sunxi_nand.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index 99043c3a4fa7..4b11cd4a79be 100644
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -544,7 +544,7 @@ static void sunxi_nfc_write_buf(struct mtd_info *mtd, const uint8_t *buf,
static uint8_t sunxi_nfc_read_byte(struct mtd_info *mtd)
{
- uint8_t ret;
+ uint8_t ret = 0;
sunxi_nfc_read_buf(mtd, &ret, 1);
--
2.14.1
uintptr_t should be used when casting a pointer to an unsigned int so
that the code compiles without warnings even on 64-bit architectures.
This is needed if we want to allow selection of this driver when
COMPILE_TEST=y.
Reported-by: Stephen Rothwell <[email protected]>
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/davinci_nand.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c
index 9cd36a750965..e79ed0f60ade 100644
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -318,7 +318,7 @@ static int nand_davinci_correct_4bit(struct mtd_info *mtd,
/* Unpack ten bytes into eight 10 bit values. We know we're
* little-endian, and use type punning for less shifting/masking.
*/
- if (WARN_ON(0x01 & (unsigned) ecc_code))
+ if (WARN_ON(0x01 & (uintptr_t)ecc_code))
return -EINVAL;
ecc16 = (unsigned short *)ecc_code;
@@ -440,9 +440,9 @@ static void nand_davinci_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
{
struct nand_chip *chip = mtd_to_nand(mtd);
- if ((0x03 & ((unsigned)buf)) == 0 && (0x03 & len) == 0)
+ if ((0x03 & ((uintptr_t)buf)) == 0 && (0x03 & len) == 0)
ioread32_rep(chip->IO_ADDR_R, buf, len >> 2);
- else if ((0x01 & ((unsigned)buf)) == 0 && (0x01 & len) == 0)
+ else if ((0x01 & ((uintptr_t)buf)) == 0 && (0x01 & len) == 0)
ioread16_rep(chip->IO_ADDR_R, buf, len >> 1);
else
ioread8_rep(chip->IO_ADDR_R, buf, len);
@@ -453,9 +453,9 @@ static void nand_davinci_write_buf(struct mtd_info *mtd,
{
struct nand_chip *chip = mtd_to_nand(mtd);
- if ((0x03 & ((unsigned)buf)) == 0 && (0x03 & len) == 0)
+ if ((0x03 & ((uintptr_t)buf)) == 0 && (0x03 & len) == 0)
iowrite32_rep(chip->IO_ADDR_R, buf, len >> 2);
- else if ((0x01 & ((unsigned)buf)) == 0 && (0x01 & len) == 0)
+ else if ((0x01 & ((uintptr_t)buf)) == 0 && (0x01 & len) == 0)
iowrite16_rep(chip->IO_ADDR_R, buf, len >> 1);
else
iowrite8_rep(chip->IO_ADDR_R, buf, len);
--
2.14.1
gen_pool_dma_alloc() return type is void *, while internally, the
memory region exposed by the sram driver has been mapped with
ioremap().
Add a void * to void __iomem * cast to make sparse happy.
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/atmel/nand-controller.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
index e8f7549d0354..30dae4c9d439 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -2219,9 +2219,9 @@ atmel_hsmc_nand_controller_init(struct atmel_hsmc_nand_controller *nc)
return -ENOMEM;
}
- nc->sram.virt = gen_pool_dma_alloc(nc->sram.pool,
- ATMEL_NFC_SRAM_SIZE,
- &nc->sram.dma);
+ nc->sram.virt = (void __iomem *)gen_pool_dma_alloc(nc->sram.pool,
+ ATMEL_NFC_SRAM_SIZE,
+ &nc->sram.dma);
if (!nc->sram.virt) {
dev_err(nc->base.dev,
"Could not allocate memory from the NFC SRAM pool\n");
--
2.14.1
On Wed, 11 Jul 2018 14:09:19 +0200
Arnd Bergmann <[email protected]> wrote:
> On Wed, Jul 11, 2018 at 1:32 PM, Boris Brezillon
> <[email protected]> wrote:
> > On Wed, 11 Jul 2018 13:27:53 +0200
> > Arnd Bergmann <[email protected]> wrote:
> >
> >> On Wed, Jul 11, 2018 at 1:16 PM, Boris Brezillon
> >> <[email protected]> wrote:
> >> > On Mon, 9 Jul 2018 22:09:25 +0200
> >> > Boris Brezillon <[email protected]> wrote:
> >> >
> >> >> It just makes NAND maintainers' life easier by allowing them to
> >> >> compile-test this driver without having ARCH_S3C24XX or ARCH_S3C64XX
> >> >> enabled.
> >> >>
> >> >> We add a dependency on HAS_IOMEM to make sure the driver compiles
> >> >> correctly, and a dependency on !IA64 because the {read,write}s{bwl}()
> >> >> accessors are not defined for this architecture.
> >> >
> >> > I see that SPARC does not define those accessors either. So I guess we
> >> > should add depends on !SPARC.
> >> >
> >> > Arnd, any other way to know when the platform implements
> >> > {read,write}s{bwl}() accessors?
> >>
> >> I'd just consider that a bug, and send a patch to fix sparc64 if it's broken.
> >> sparc32 appears to have these, and when Thierry sent the patch
> >> to implement them everywhere[1], he said that he tested sparc64 as
> >> well, so either something regressed since then, or his testing
> >> was incomplete. Either way, the correct answer IMHO would be to
> >> make it work rather than to add infrastructure around the broken
> >> configurations.
> >
> > I guess the same goes for IA64 then.
>
> Right. FWIW, I just tried it out and sent the respective arch patches.
Cool! Thanks for doing that.
Hi PrasannaKumar,
On Tue, 10 Jul 2018 22:16:50 +0530
PrasannaKumar Muralidharan <[email protected]> wrote:
> Hi Boris,
>
> On 10 July 2018 at 01:39, Boris Brezillon <[email protected]>
> wrote:
>
> > This MACH_JZ4780 dependency is taken care of by JZ4780_NEMC, no need
> > to repeat it here.
> >
> > Signed-off-by: Boris Brezillon <[email protected]>
> > ---
> > drivers/mtd/nand/raw/Kconfig | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
> > index 7b5e97719c25..d9cd9608bc2d 100644
> > --- a/drivers/mtd/nand/raw/Kconfig
> > +++ b/drivers/mtd/nand/raw/Kconfig
> > @@ -499,7 +499,7 @@ config MTD_NAND_JZ4740
> >
> > config MTD_NAND_JZ4780
> > tristate "Support for NAND on JZ4780 SoC"
> > - depends on MACH_JZ4780 && JZ4780_NEMC
> > + depends on JZ4780_NEMC
> > help
> > Enables support for NAND Flash connected to the NEMC on JZ4780
> > SoC
> > based boards, using the BCH controller for hardware error
> > correction.
> > --
> > 2.14.1
> >
> >
> >
> JZ4780 has MLC NAND.
Hm, the NAND controller supports both MLC and SLC NANDs. Maybe there
are only boards with MLC NANDs, but that doesn't mean we should remove
the driver for the controller.
> As MLC NAND is not supported in mainline do you think
> this patch is required? Even wondering if the driver is required at all.
The fact that MLC NANDs are not supported by UBI is not necessarily
definitive. I have a branch with all the work we've done to add MLC
support to UBI [1]. If you have time to invest in it, feel free to take
over this work.
Anyway, the decision to remove this driver is not mine, and this patch
allows me to at least compile-test this driver.
Regards,
Boris
[1]https://github.com/bbrezillon/linux/commits/nand/mlc
On 10 July 2018 at 22:40, Boris Brezillon <[email protected]> wrote:
> Hi PrasannaKumar,
>
> On Tue, 10 Jul 2018 22:16:50 +0530
> PrasannaKumar Muralidharan <[email protected]> wrote:
>
>> Hi Boris,
>>
>> On 10 July 2018 at 01:39, Boris Brezillon <[email protected]>
>> wrote:
>>
>> > This MACH_JZ4780 dependency is taken care of by JZ4780_NEMC, no need
>> > to repeat it here.
>> >
>> > Signed-off-by: Boris Brezillon <[email protected]>
>> > ---
>> > drivers/mtd/nand/raw/Kconfig | 2 +-
>> > 1 file changed, 1 insertion(+), 1 deletion(-)
>> >
>> > diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
>> > index 7b5e97719c25..d9cd9608bc2d 100644
>> > --- a/drivers/mtd/nand/raw/Kconfig
>> > +++ b/drivers/mtd/nand/raw/Kconfig
>> > @@ -499,7 +499,7 @@ config MTD_NAND_JZ4740
>> >
>> > config MTD_NAND_JZ4780
>> > tristate "Support for NAND on JZ4780 SoC"
>> > - depends on MACH_JZ4780 && JZ4780_NEMC
>> > + depends on JZ4780_NEMC
>> > help
>> > Enables support for NAND Flash connected to the NEMC on JZ4780
>> > SoC
>> > based boards, using the BCH controller for hardware error
>> > correction.
>> > --
>> > 2.14.1
>> >
>> >
>> >
>> JZ4780 has MLC NAND.
>
> Hm, the NAND controller supports both MLC and SLC NANDs. Maybe there
> are only boards with MLC NANDs, but that doesn't mean we should remove
> the driver for the controller.
Creator CI20 board which uses JZ4780 SoC is supported by upstream as
of now. It has MLC NAND.
But I agree that removing the driver is too extreme.
>> As MLC NAND is not supported in mainline do you think
>> this patch is required? Even wondering if the driver is required at all.
>
> The fact that MLC NANDs are not supported by UBI is not necessarily
> definitive. I have a branch with all the work we've done to add MLC
> support to UBI [1]. If you have time to invest in it, feel free to take
> over this work.
I am afraid I don't have time as well as knowledge to work on it yet.
> Anyway, the decision to remove this driver is not mine, and this patch
> allows me to at least compile-test this driver.
>
> Regards,
>
> Boris
>
> [1]https://github.com/bbrezillon/linux/commits/nand/mlc
Thanks,
PrasannaKumar
On Mon, Jul 9, 2018 at 10:09 PM, Boris Brezillon
<[email protected]> wrote:
> Hello,
>
> This is an attempt at adding "depends || COMPILE_TEST" to all NAND
> drivers that have no compile-time dependencies on arch
> features/headers.
>
> This will hopefully help us (NAND/MTD maintainers) in detecting build
> issues earlier. Unfortunately we still have a few drivers that can't
> easily be modified to be arch independent.
>
> I tried to put all patches that only touch the NAND subsystem first,
> so that they can be applied even if other patches are being discussed.
>
> Don't hesitate to point any missing dependencies when compiled with
> COMPILE_TEST. I didn't have any problem when compiling, but that might
> be because the dependencies were already selected.
Looks good to me overall.
> In this v2, I tried to fix all warnings/errors reported by kbuild/0day
> robots. The only remaining ones are those in omap_elm.c which seems to
> do some weird cpu_to_be32() conversions. I guess I could replace those
> by iowrite32be() calls (or just add (__force __u32)), but I don't want
> to risk a regression on this driver, so I'm just leaving it for someone
> else to fix :P.
Agreed, this is definedly very odd code. It looks like the intention
is to write all the bits in reverse order, but four bytes at a time. I'm
fairly sure the current implementation cannot work on big-endian,
in particularly this line:
val = cpu_to_be32(*(u32 *) &ecc[0]) >> 12;
Since shifting a number after the byteswap is not well-defined.
It's probably correct on little-endian, but it's not clear what the
best way would be to write this is an endian-neutral way.
Arnd
On Mon, 9 Jul 2018 22:09:25 +0200
Boris Brezillon <[email protected]> wrote:
> It just makes NAND maintainers' life easier by allowing them to
> compile-test this driver without having ARCH_S3C24XX or ARCH_S3C64XX
> enabled.
>
> We add a dependency on HAS_IOMEM to make sure the driver compiles
> correctly, and a dependency on !IA64 because the {read,write}s{bwl}()
> accessors are not defined for this architecture.
I see that SPARC does not define those accessors either. So I guess we
should add depends on !SPARC.
Arnd, any other way to know when the platform implements
{read,write}s{bwl}() accessors?
>
> Signed-off-by: Boris Brezillon <[email protected]>
> ---
> drivers/mtd/nand/raw/Kconfig | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
> index 1488ad0a0199..e01b3da726c0 100644
> --- a/drivers/mtd/nand/raw/Kconfig
> +++ b/drivers/mtd/nand/raw/Kconfig
> @@ -119,7 +119,8 @@ config MTD_NAND_AU1550
>
> config MTD_NAND_S3C2410
> tristate "NAND Flash support for Samsung S3C SoCs"
> - depends on ARCH_S3C24XX || ARCH_S3C64XX
> + depends on ARCH_S3C24XX || ARCH_S3C64XX || COMPILE_TEST
> + depends on HAS_IOMEM && !IA64
> help
> This enables the NAND flash controller on the S3C24xx and S3C64xx
> SoCs
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_SUNXI enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <[email protected]>
---
drivers/mtd/nand/raw/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 539b0619f53a..ee836f7d7b8b 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -518,7 +518,8 @@ config MTD_NAND_XWAY
config MTD_NAND_SUNXI
tristate "Support for NAND on Allwinner SoCs"
- depends on ARCH_SUNXI
+ depends on ARCH_SUNXI || COMPILE_TEST
+ depends on HAS_IOMEM
help
Enables support for NAND Flash chips on Allwinner SoCs.
--
2.14.1
On Wed, 11 Jul 2018 13:27:53 +0200
Arnd Bergmann <[email protected]> wrote:
> On Wed, Jul 11, 2018 at 1:16 PM, Boris Brezillon
> <[email protected]> wrote:
> > On Mon, 9 Jul 2018 22:09:25 +0200
> > Boris Brezillon <[email protected]> wrote:
> >
> >> It just makes NAND maintainers' life easier by allowing them to
> >> compile-test this driver without having ARCH_S3C24XX or ARCH_S3C64XX
> >> enabled.
> >>
> >> We add a dependency on HAS_IOMEM to make sure the driver compiles
> >> correctly, and a dependency on !IA64 because the {read,write}s{bwl}()
> >> accessors are not defined for this architecture.
> >
> > I see that SPARC does not define those accessors either. So I guess we
> > should add depends on !SPARC.
> >
> > Arnd, any other way to know when the platform implements
> > {read,write}s{bwl}() accessors?
>
> I'd just consider that a bug, and send a patch to fix sparc64 if it's broken.
> sparc32 appears to have these, and when Thierry sent the patch
> to implement them everywhere[1], he said that he tested sparc64 as
> well, so either something regressed since then, or his testing
> was incomplete. Either way, the correct answer IMHO would be to
> make it work rather than to add infrastructure around the broken
> configurations.
I guess the same goes for IA64 then.