Fixing "Path A RX IQK failed" and "Path B RX IQK failed"
issues for rtl8192eu chips by replacing the arguments with
the ones in the updated official driver.
Signed-off-by: JunASAKA <[email protected]>
---
.../realtek/rtl8xxxu/rtl8xxxu_8192e.c | 76 +++++++++++++------
1 file changed, 54 insertions(+), 22 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
index b06508d0cd..82346500f2 100644
--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
@@ -734,6 +734,12 @@ static int rtl8192eu_iqk_path_a(struct rtl8xxxu_priv *priv)
*/
rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);
rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_UNKNOWN_DF, 0x00180);
+
+ rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_WE_LUT, 0x800a0);
+ rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x20000);
+ rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0000f);
+ rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0x07f77);
+
rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
/* Path A IQK setting */
@@ -779,11 +785,16 @@ static int rtl8192eu_rx_iqk_path_a(struct rtl8xxxu_priv *priv)
rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_WE_LUT, 0x800a0);
rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x30000);
rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0000f);
- rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xf117b);
+ rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xf1173);
+
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_WE_LUT, 0x800a0);
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_RCK_OS, 0x30000);
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G1, 0x0000f);
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G2, 0xf1173);
/* PA/PAD control by 0x56, and set = 0x0 */
rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_UNKNOWN_DF, 0x00980);
- rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_UNKNOWN_56, 0x51000);
+ rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_UNKNOWN_56, 0x511e0);
/* Enter IQK mode */
rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
@@ -798,14 +809,14 @@ static int rtl8192eu_rx_iqk_path_a(struct rtl8xxxu_priv *priv)
rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x38008c1c);
rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c);
- rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x82160c1f);
- rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x68160c1f);
+ rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x8216031f);
+ rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x6816031f);
/* LO calibration setting */
rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a911);
/* One shot, path A LOK & IQK */
- rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xfa000000);
+ rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000);
rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000);
mdelay(10);
@@ -836,11 +847,16 @@ static int rtl8192eu_rx_iqk_path_a(struct rtl8xxxu_priv *priv)
rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_WE_LUT, 0x800a0);
rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x30000);
rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0000f);
- rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xf7ffa);
+ rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xf7ff2);
+
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_WE_LUT, 0x800a0);
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_RCK_OS, 0x30000);
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G1, 0x0000f);
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G2, 0xf7ff2);
/* PA/PAD control by 0x56, and set = 0x0 */
rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_UNKNOWN_DF, 0x00980);
- rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_UNKNOWN_56, 0x51000);
+ rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_UNKNOWN_56, 0x510e0);
/* Enter IQK mode */
rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
@@ -854,14 +870,14 @@ static int rtl8192eu_rx_iqk_path_a(struct rtl8xxxu_priv *priv)
rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x38008c1c);
rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c);
- rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x82160c1f);
- rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x28160c1f);
+ rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x821608ff);
+ rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x281608ff);
/* LO calibration setting */
rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a891);
/* One shot, path A LOK & IQK */
- rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xfa000000);
+ rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000);
rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000);
mdelay(10);
@@ -891,22 +907,28 @@ static int rtl8192eu_iqk_path_b(struct rtl8xxxu_priv *priv)
rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);
rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_UNKNOWN_DF, 0x00180);
- rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
- rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_WE_LUT, 0x800a0);
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_RCK_OS, 0x20000);
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G1, 0x0000f);
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G2, 0x07f77);
+
rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
+ // rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);
+ // rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
+
/* Path B IQK setting */
rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x38008c1c);
rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c);
rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x18008c1c);
rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c);
- rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x821403e2);
+ rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x82140303);
rtl8xxxu_write32(priv, REG_RX_IQK_PI_B, 0x68160000);
/* LO calibration setting */
- rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00492911);
+ rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00462911);
/* One shot, path A LOK & IQK */
rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xfa000000);
@@ -942,11 +964,16 @@ static int rtl8192eu_rx_iqk_path_b(struct rtl8xxxu_priv *priv)
rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_WE_LUT, 0x800a0);
rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_RCK_OS, 0x30000);
rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G1, 0x0000f);
- rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G2, 0xf117b);
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G2, 0xf1173);
+
+ rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_WE_LUT, 0x800a0);
+ rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x30000);
+ rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0000f);
+ rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xf1173);
/* PA/PAD control by 0x56, and set = 0x0 */
rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_UNKNOWN_DF, 0x00980);
- rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_UNKNOWN_56, 0x51000);
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_UNKNOWN_56, 0x511e0);
/* Enter IQK mode */
rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
@@ -961,8 +988,8 @@ static int rtl8192eu_rx_iqk_path_b(struct rtl8xxxu_priv *priv)
rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x18008c1c);
rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c);
- rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x82160c1f);
- rtl8xxxu_write32(priv, REG_RX_IQK_PI_B, 0x68160c1f);
+ rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x8216031f);
+ rtl8xxxu_write32(priv, REG_RX_IQK_PI_B, 0x6816031f);
/* LO calibration setting */
rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a911);
@@ -1002,11 +1029,16 @@ static int rtl8192eu_rx_iqk_path_b(struct rtl8xxxu_priv *priv)
rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_WE_LUT, 0x800a0);
rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_RCK_OS, 0x30000);
rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G1, 0x0000f);
- rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G2, 0xf7ffa);
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G2, 0xf7ff2);
+
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_WE_LUT, 0x800a0);
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_RCK_OS, 0x30000);
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G1, 0x0000f);
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G2, 0xf7ff2);
/* PA/PAD control by 0x56, and set = 0x0 */
rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_UNKNOWN_DF, 0x00980);
- rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_UNKNOWN_56, 0x51000);
+ rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_UNKNOWN_56, 0x510e0);
/* Enter IQK mode */
rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
@@ -1020,8 +1052,8 @@ static int rtl8192eu_rx_iqk_path_b(struct rtl8xxxu_priv *priv)
rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x38008c1c);
rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x18008c1c);
- rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x82160c1f);
- rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x28160c1f);
+ rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x821608ff);
+ rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x281608ff);
/* LO calibration setting */
rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a891);
--
2.38.1
> -----Original Message-----
> From: JunASAKA <[email protected]>
> Sent: Wednesday, November 30, 2022 10:09 PM
> To: [email protected]
> Cc: [email protected]; [email protected]; [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected]; JunASAKA
> <[email protected]>
> Subject: [PATCH] wifi: rtl8xxxu: fixing IQK failures for rtl8192eu
>
> Fixing "Path A RX IQK failed" and "Path B RX IQK failed"
> issues for rtl8192eu chips by replacing the arguments with
> the ones in the updated official driver.
I think it would be better if you can point out which version you use, and
people will not modify them back to old version suddenly.
>
> Signed-off-by: JunASAKA <[email protected]>
> ---
> .../realtek/rtl8xxxu/rtl8xxxu_8192e.c | 76 +++++++++++++------
> 1 file changed, 54 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
> b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
> index b06508d0cd..82346500f2 100644
> --- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
> +++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
[...]
> @@ -891,22 +907,28 @@ static int rtl8192eu_iqk_path_b(struct rtl8xxxu_priv *priv)
>
> rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);
> rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_UNKNOWN_DF, 0x00180);
> - rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
>
> - rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);
> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_WE_LUT, 0x800a0);
> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_RCK_OS, 0x20000);
> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G1, 0x0000f);
> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G2, 0x07f77);
> +
> rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
>
> + // rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);
> + // rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
> +
I think this is a test code of vendor driver. No need them here.
> /* Path B IQK setting */
> rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x38008c1c);
> rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c);
> rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x18008c1c);
> rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c);
>
> - rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x821403e2);
> + rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x82140303);
> rtl8xxxu_write32(priv, REG_RX_IQK_PI_B, 0x68160000);
>
> /* LO calibration setting */
> - rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00492911);
> + rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00462911);
>
> /* One shot, path A LOK & IQK */
> rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xfa000000);
[...]
I have compared your patch with internal code, and they are the same.
But, I don't have a test.
Ping-Ke
On 01/12/2022 8:54 am, Ping-Ke Shih wrote:
>
>> -----Original Message-----
>> From: JunASAKA <[email protected]>
>> Sent: Wednesday, November 30, 2022 10:09 PM
>> To: [email protected]
>> Cc: [email protected]; [email protected]; [email protected]; [email protected]; [email protected];
>> [email protected]; [email protected]; [email protected]; JunASAKA
>> <[email protected]>
>> Subject: [PATCH] wifi: rtl8xxxu: fixing IQK failures for rtl8192eu
>>
>> Fixing "Path A RX IQK failed" and "Path B RX IQK failed"
>> issues for rtl8192eu chips by replacing the arguments with
>> the ones in the updated official driver.
> I think it would be better if you can point out which version you use, and
> people will not modify them back to old version suddenly.
>
>> Signed-off-by: JunASAKA <[email protected]>
>> ---
>> .../realtek/rtl8xxxu/rtl8xxxu_8192e.c | 76 +++++++++++++------
>> 1 file changed, 54 insertions(+), 22 deletions(-)
>>
>> diff --git a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
>> b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
>> index b06508d0cd..82346500f2 100644
>> --- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
>> +++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
> [...]
>
>> @@ -891,22 +907,28 @@ static int rtl8192eu_iqk_path_b(struct rtl8xxxu_priv *priv)
>>
>> rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);
>> rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_UNKNOWN_DF, 0x00180);
>> - rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
>>
>> - rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);
>> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_WE_LUT, 0x800a0);
>> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_RCK_OS, 0x20000);
>> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G1, 0x0000f);
>> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G2, 0x07f77);
>> +
>> rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
>>
>> + // rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);
>> + // rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
>> +
> I think this is a test code of vendor driver. No need them here.
>
>
>> /* Path B IQK setting */
>> rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x38008c1c);
>> rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c);
>> rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x18008c1c);
>> rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c);
>>
>> - rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x821403e2);
>> + rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x82140303);
>> rtl8xxxu_write32(priv, REG_RX_IQK_PI_B, 0x68160000);
>>
>> /* LO calibration setting */
>> - rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00492911);
>> + rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00462911);
>>
>> /* One shot, path A LOK & IQK */
>> rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xfa000000);
> [...]
>
> I have compared your patch with internal code, and they are the same.
> But, I don't have a test.
>
> Ping-Ke
I changed those arguments into the ones here:
https://github.com/Mange/rtl8192eu-linux-driver which works fine with my
rtl8192eu wifi dongle. But forgive my ignorant that I don't have enough
experience on wifi drivers, I just compared those two drivers and
figured that those codes fixing my IQK failures.
I tested it on my PC (fedora 37 with kernel v6.1.0-rc7) with my
rtl8192eu device and it works well.
Jun ASAKA.
> -----Original Message-----
> From: Jun ASAKA <[email protected]>
> Sent: Thursday, December 1, 2022 9:39 AM
> To: Ping-Ke Shih <[email protected]>; [email protected]
> Cc: [email protected]; [email protected]; [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected]
> Subject: Re: [PATCH] wifi: rtl8xxxu: fixing IQK failures for rtl8192eu
>
> On 01/12/2022 8:54 am, Ping-Ke Shih wrote:
>
> >
> >> -----Original Message-----
> >> From: JunASAKA <[email protected]>
> >> Sent: Wednesday, November 30, 2022 10:09 PM
> >> To: [email protected]
> >> Cc: [email protected]; [email protected]; [email protected]; [email protected]; [email protected];
> >> [email protected]; [email protected]; [email protected]; JunASAKA
> >> <[email protected]>
> >> Subject: [PATCH] wifi: rtl8xxxu: fixing IQK failures for rtl8192eu
> >>
> >> Fixing "Path A RX IQK failed" and "Path B RX IQK failed"
> >> issues for rtl8192eu chips by replacing the arguments with
> >> the ones in the updated official driver.
> > I think it would be better if you can point out which version you use, and
> > people will not modify them back to old version suddenly.
> >
> >> Signed-off-by: JunASAKA <[email protected]>
> >> ---
> >> .../realtek/rtl8xxxu/rtl8xxxu_8192e.c | 76 +++++++++++++------
> >> 1 file changed, 54 insertions(+), 22 deletions(-)
> >>
> >> diff --git a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
> >> b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
> >> index b06508d0cd..82346500f2 100644
> >> --- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
> >> +++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
> > [...]
> >
> >> @@ -891,22 +907,28 @@ static int rtl8192eu_iqk_path_b(struct rtl8xxxu_priv *priv)
> >>
> >> rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);
> >> rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_UNKNOWN_DF, 0x00180);
> >> - rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
> >>
> >> - rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);
> >> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_WE_LUT, 0x800a0);
> >> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_RCK_OS, 0x20000);
> >> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G1, 0x0000f);
> >> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G2, 0x07f77);
> >> +
> >> rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
> >>
> >> + // rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);
> >> + // rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
> >> +
> > I think this is a test code of vendor driver. No need them here.
> >
> >
> >> /* Path B IQK setting */
> >> rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x38008c1c);
> >> rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c);
> >> rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x18008c1c);
> >> rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c);
> >>
> >> - rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x821403e2);
> >> + rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x82140303);
> >> rtl8xxxu_write32(priv, REG_RX_IQK_PI_B, 0x68160000);
> >>
> >> /* LO calibration setting */
> >> - rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00492911);
> >> + rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00462911);
> >>
> >> /* One shot, path A LOK & IQK */
> >> rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xfa000000);
> > [...]
> >
> > I have compared your patch with internal code, and they are the same.
> > But, I don't have a test.
> >
> > Ping-Ke
>
> I changed those arguments into the ones here:
> https://github.com/Mange/rtl8192eu-linux-driver which works fine with my
> rtl8192eu wifi dongle. But forgive my ignorant that I don't have enough
> experience on wifi drivers, I just compared those two drivers and
> figured that those codes fixing my IQK failures.
I do similar things as well. :-)
The github repository mentioned
"This branch is based on Realtek's driver versioned 4.4.1. master is based on 4.3.1.1 originally."
So, we can add something to commit message:
1. https://github.com/Mange/rtl8192eu-linux-driver
2. vendor driver version: 4.3.1.1
--
Ping-Ke
On 01/12/2022 04:18, Ping-Ke Shih wrote:
>
>> -----Original Message-----
>> From: Jun ASAKA <[email protected]>
>> Sent: Thursday, December 1, 2022 9:39 AM
>> To: Ping-Ke Shih <[email protected]>; [email protected]
>> Cc: [email protected]; [email protected]; [email protected]; [email protected]; [email protected];
>> [email protected]; [email protected]; [email protected]
>> Subject: Re: [PATCH] wifi: rtl8xxxu: fixing IQK failures for rtl8192eu
>>
>> On 01/12/2022 8:54 am, Ping-Ke Shih wrote:
>>
>>>
>>>> -----Original Message-----
>>>> From: JunASAKA <[email protected]>
>>>> Sent: Wednesday, November 30, 2022 10:09 PM
>>>> To: [email protected]
>>>> Cc: [email protected]; [email protected]; [email protected]; [email protected]; [email protected];
>>>> [email protected]; [email protected]; [email protected]; JunASAKA
>>>> <[email protected]>
>>>> Subject: [PATCH] wifi: rtl8xxxu: fixing IQK failures for rtl8192eu
>>>>
>>>> Fixing "Path A RX IQK failed" and "Path B RX IQK failed"
>>>> issues for rtl8192eu chips by replacing the arguments with
>>>> the ones in the updated official driver.
>>> I think it would be better if you can point out which version you use, and
>>> people will not modify them back to old version suddenly.
>>>
>>>> Signed-off-by: JunASAKA <[email protected]>
>>>> ---
>>>> .../realtek/rtl8xxxu/rtl8xxxu_8192e.c | 76 +++++++++++++------
>>>> 1 file changed, 54 insertions(+), 22 deletions(-)
>>>>
>>>> diff --git a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
>>>> b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
>>>> index b06508d0cd..82346500f2 100644
>>>> --- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
>>>> +++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
>>> [...]
>>>
>>>> @@ -891,22 +907,28 @@ static int rtl8192eu_iqk_path_b(struct rtl8xxxu_priv *priv)
>>>>
>>>> rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);
>>>> rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_UNKNOWN_DF, 0x00180);
>>>> - rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
>>>>
>>>> - rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);
>>>> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_WE_LUT, 0x800a0);
>>>> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_RCK_OS, 0x20000);
>>>> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G1, 0x0000f);
>>>> + rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G2, 0x07f77);
>>>> +
>>>> rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
>>>>
>>>> + // rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);
>>>> + // rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);
>>>> +
>>> I think this is a test code of vendor driver. No need them here.
>>>
>>>
>>>> /* Path B IQK setting */
>>>> rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x38008c1c);
>>>> rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c);
>>>> rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x18008c1c);
>>>> rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c);
>>>>
>>>> - rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x821403e2);
>>>> + rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x82140303);
>>>> rtl8xxxu_write32(priv, REG_RX_IQK_PI_B, 0x68160000);
>>>>
>>>> /* LO calibration setting */
>>>> - rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00492911);
>>>> + rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00462911);
>>>>
>>>> /* One shot, path A LOK & IQK */
>>>> rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xfa000000);
>>> [...]
>>>
>>> I have compared your patch with internal code, and they are the same.
>>> But, I don't have a test.
>>>
>>> Ping-Ke
>>
>> I changed those arguments into the ones here:
>> https://github.com/Mange/rtl8192eu-linux-driver which works fine with my
>> rtl8192eu wifi dongle. But forgive my ignorant that I don't have enough
>> experience on wifi drivers, I just compared those two drivers and
>> figured that those codes fixing my IQK failures.
>
> I do similar things as well. :-)
>
> The github repository mentioned
> "This branch is based on Realtek's driver versioned 4.4.1. master is based on 4.3.1.1 originally."
> So, we can add something to commit message:
> 1. https://github.com/Mange/rtl8192eu-linux-driver
> 2. vendor driver version: 4.3.1.1
>
> --
> Ping-Ke
>
That repo is confusing, unfortunately. Indeed, the "master" branch seems to
contain v4.3.1.1_11320.20140505. But the last commit is from 2017.
The "realtek-4.4.x" branch is the one being actively maintained, and at some
point it was updated to v5.6.4_35685.20191108_COEX20171113-0047. README.md
was forgotten.