Kishon Vijay Abraham I ([email protected])

Number of posts: 4392 (2.23 per day)
First post: 2012-05-30 10:56:58
Last post: 2017-10-24 06:19:00

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Date List Subject
2020-12-24 11:49:18 linux-kernel [PATCH 5/7] phy: ti: j721e-wiz: Configure full rate divider for AM64
2020-12-24 11:47:38 linux-kernel [PATCH 7/7] phy: cadence-torrent: Add support to drive refclk out
2020-12-24 11:47:24 linux-kernel [PATCH 0/7] AM64: Add SERDES bindings and driver support
2020-12-24 11:46:57 linux-kernel [PATCH 2/7] dt-bindings: phy: ti,phy-j721e-wiz: Add binding for phy_en_refclk
2020-12-24 11:46:40 linux-kernel [PATCH 6/7] phy: ti: j721e-wiz: Enable reference clock output in cmn_refclk_<p/m>
2020-12-24 11:46:13 linux-kernel [PATCH 4/7] dt-bindings: ti-serdes-mux: Add defines for AM64 SoC
2020-12-24 11:45:09 linux-kernel [PATCH 3/7] dt-bindings: phy: cadence-torrent: Add binding for refclk driver
2020-12-24 11:44:45 linux-kernel [PATCH 1/7] dt-bindings: phy: ti,phy-j721e-wiz: Add bindings for AM64 SERDES Wrapper
2020-12-24 11:23:34 linux-kernel [PATCH v3 15/15] arm64: dts: ti: k3-j721e-common-proc-board: Re-name "link" name as "phy"
2020-12-24 11:22:34 linux-kernel [PATCH v3 08/15] phy: cadence: cadence-sierra: Explicitly request exclusive reset control
2020-12-24 11:21:41 linux-kernel [PATCH v3 14/15] arm64: dts: ti: k3-j721e-common-proc-board: Use external clock for SERDES
2020-12-24 11:21:41 linux-kernel [PATCH v3 13/15] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES
2020-12-24 11:21:25 linux-kernel [PATCH v3 11/15] phy: cadence: sierra: Enable pll_cmnlc and pll_cmnlc1 clocks
2020-12-24 11:20:30 linux-kernel [PATCH v3 01/15] phy: cadence: Sierra: Fix PHY power_on sequence
2020-12-24 11:20:14 linux-kernel [PATCH v3 06/15] phy: cadence: cadence-sierra: Move all clk_get_*() to a separate function
2020-12-24 11:20:13 linux-kernel [PATCH v3 12/15] arm64: dts: ti: k3-j721e-main: Add DT nodes for clocks within Sierra SERDES
2020-12-24 11:19:56 linux-kernel [PATCH v3 09/15] phy: cadence: sierra: Model reference receiver as clocks (gate clocks)
2020-12-24 11:19:54 linux-kernel [PATCH v3 00/15] PHY: Add support in Sierra to use external clock
2020-12-24 11:19:51 linux-kernel [PATCH v3 03/15] dt-bindings: phy: cadence-sierra: Add bindings for the PLLs within SERDES
2020-12-24 11:19:49 linux-kernel [PATCH v3 05/15] phy: cadence: cadence-sierra: Create PHY only for "phy" or "link" sub-nodes
2020-12-24 11:19:19 linux-kernel [PATCH v3 10/15] phy: cadence: sierra: Model PLL_CMNLC and PLL_CMNLC1 as clocks (mux clocks)
2020-12-24 11:19:06 linux-kernel [PATCH v3 07/15] phy: cadence: cadence-sierra: Move all reset_control_get*() to a separate function
2020-12-24 11:19:03 linux-kernel [PATCH v3 04/15] phy: ti: j721e-wiz: Get PHY properties only for "phy" or "link" subnode
2020-12-24 11:18:17 linux-kernel [PATCH v3 02/15] phy: ti: j721e-wiz: Invoke wiz_init() before of_platform_device_create()
2020-12-22 07:11:30 linux-kernel [PATCH v2 06/14] phy: cadence: cadence-sierra: Move all clk_get_*() to a separate function
2020-12-22 07:10:55 linux-kernel [PATCH v2 01/14] phy: cadence: Sierra: Fix PHY power_on sequence
2020-12-22 07:09:54 linux-kernel [PATCH v2 14/14] arm64: dts: ti: k3-j721e-common-proc-board: Re-name "link" name as "phy"
2020-12-22 07:09:51 linux-kernel [PATCH v2 08/14] phy: cadence: cadence-sierra: Explicitly request exclusive reset control
2020-12-22 07:09:26 linux-kernel [PATCH v2 13/14] arm64: dts: ti: k3-j721e-common-proc-board: Use external clock for SERDES
2020-12-22 07:09:15 linux-kernel [PATCH v2 12/14] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES
2020-12-22 07:09:13 linux-kernel [PATCH v2 11/14] arm64: dts: ti: k3-j721e-main: Add DT nodes for clocks within Sierra SERDES
2020-12-22 07:09:03 linux-kernel [PATCH v2 00/14] PHY: Add support in Sierra to use external clock
2020-12-22 07:08:50 linux-kernel [PATCH v2 03/14] dt-bindings: phy: cadence-sierra: Add bindings for the PLLs within SERDES
2020-12-22 07:08:44 linux-kernel [PATCH v2 10/14] phy: cadence: sierra: Enable pll_cmnlc and pll_cmnlc1 clocks
2020-12-22 07:08:30 linux-kernel [PATCH v2 07/14] phy: cadence: cadence-sierra: Move all reset_control_get*() to a separate function
2020-12-22 07:08:20 linux-kernel [PATCH v2 09/14] phy: cadence: sierra: Model reference receiver as clocks (gate clocks)
2020-12-22 07:08:19 linux-kernel [PATCH v2 05/14] phy: cadence: cadence-sierra: Create PHY only for "phy" or "link" sub-nodes
2020-12-22 07:08:05 linux-kernel [PATCH v2 02/14] phy: ti: j721e-wiz: Invoke wiz_init() before of_platform_device_create()
2020-12-22 07:07:37 linux-kernel [PATCH v2 04/14] phy: ti: j721e-wiz: Get PHY properties only for "phy" or "link" subnode
2020-12-21 03:17:36 linux-kernel Re: Correct ordering of phy_init and phy_power_on
2020-12-21 03:15:55 linux-kernel Re: [PATCH 1/9] dt-bindings: phy: cadence-sierra: Add bindings for the PLLs within SERDES
2020-12-18 14:45:47 linux-kernel Re: [PATCH v5] PCI: cadence: Retrain Link to work around Gen2 training defect.
2020-12-15 07:15:23 linux-kernel Re: [PATCH v4 1/2] dt-bindings: pci: Retrain Link to work around Gen2 training defect.
2020-12-15 07:04:56 linux-kernel [PATCH v5] PCI: cadence: Retrain Link to work around Gen2 training defect.
2020-12-14 09:47:59 linux-kernel Re: [PATCH v4 1/2] dt-bindings: pci: Retrain Link to work around Gen2 training defect.
2020-12-11 00:52:28 linux-kernel Re: [PATCH v2 0/3] PCI: J721E: Fix Broken DT w.r.t SYSCON DT
2020-12-10 13:17:27 linux-kernel [PATCH v2 4/6] arm64: dts: ti: k3-j7200-main: Add PCIe device tree node
2020-12-10 13:16:55 linux-kernel [PATCH v2 5/6] arm64: dts: ti: k3-j7200-common-proc-board: Enable SERDES0
2020-12-10 13:16:17 linux-kernel [PATCH v2 2/6] arm64: dts: ti: k3-j721e-main: Remove "syscon" nodes added for pcieX_ctrl
2020-12-10 13:13:32 linux-kernel [PATCH v2 1/6] arm64: dts: ti: k3-j721e-main: Fix supported max outbound regions
2020-12-10 13:13:24 linux-kernel [PATCH v2 6/6] arm64: dts: ti: k3-j7200-common-proc-board: Enable PCIe