2023-06-21 12:02:53

by Maxim Kochetkov

[permalink] [raw]
Subject: [PATCH 1/1] net: axienet: Move reset before DMA detection

DMA detection will fail if axinet was started before (by boot loader,
boot ROM, etc). In this state axinet will not start properly.
So move axinet reset before DMA detection.

Signed-off-by: Maxim Kochetkov <[email protected]>
---
drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index 3e310b55bce2..734822321e0a 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -2042,6 +2042,11 @@ static int axienet_probe(struct platform_device *pdev)
goto cleanup_clk;
}

+ /* Reset core now that clocks are enabled, prior to accessing MDIO */
+ ret = __axienet_device_reset(lp);
+ if (ret)
+ goto cleanup_clk;
+
/* Autodetect the need for 64-bit DMA pointers.
* When the IP is configured for a bus width bigger than 32 bits,
* writing the MSB registers is mandatory, even if they are all 0.
@@ -2096,11 +2101,6 @@ static int axienet_probe(struct platform_device *pdev)
lp->coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD;
lp->coalesce_usec_tx = XAXIDMA_DFT_TX_USEC;

- /* Reset core now that clocks are enabled, prior to accessing MDIO */
- ret = __axienet_device_reset(lp);
- if (ret)
- goto cleanup_clk;
-
ret = axienet_mdio_setup(lp);
if (ret)
dev_warn(&pdev->dev,
--
2.40.1



2023-06-21 12:57:39

by Pandey, Radhey Shyam

[permalink] [raw]
Subject: RE: [PATCH 1/1] net: axienet: Move reset before DMA detection

> -----Original Message-----
> From: Maxim Kochetkov <[email protected]>
> Sent: Wednesday, June 21, 2023 4:57 PM
> To: [email protected]
> Cc: Maxim Kochetkov <[email protected]>; Pandey, Radhey Shyam
> <[email protected]>; David S. Miller
> <[email protected]>; Eric Dumazet <[email protected]>; Jakub
> Kicinski <[email protected]>; Paolo Abeni <[email protected]>; Simek,
> Michal <[email protected]>; [email protected];
> [email protected]
> Subject: [PATCH 1/1] net: axienet: Move reset before DMA detection
>
> DMA detection will fail if axinet was started before (by boot loader, boot
> ROM, etc). In this state axinet will not start properly.
> So move axinet reset before DMA detection.

Please provide more detail on the failing testcase. In which scenario we are
seeing DMA detection failure? What is error log . Is it random?

>
> Signed-off-by: Maxim Kochetkov <[email protected]>
> ---
> drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> index 3e310b55bce2..734822321e0a 100644
> --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> @@ -2042,6 +2042,11 @@ static int axienet_probe(struct platform_device
> *pdev)
> goto cleanup_clk;
> }
>
> + /* Reset core now that clocks are enabled, prior to accessing MDIO
> */
> + ret = __axienet_device_reset(lp);
> + if (ret)
> + goto cleanup_clk;
> +
> /* Autodetect the need for 64-bit DMA pointers.
> * When the IP is configured for a bus width bigger than 32 bits,
> * writing the MSB registers is mandatory, even if they are all 0.
> @@ -2096,11 +2101,6 @@ static int axienet_probe(struct platform_device
> *pdev)
> lp->coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD;
> lp->coalesce_usec_tx = XAXIDMA_DFT_TX_USEC;
>
> - /* Reset core now that clocks are enabled, prior to accessing MDIO
> */
> - ret = __axienet_device_reset(lp);
> - if (ret)
> - goto cleanup_clk;
> -
> ret = axienet_mdio_setup(lp);
> if (ret)
> dev_warn(&pdev->dev,
> --
> 2.40.1


2023-06-21 13:50:24

by Maxim Kochetkov

[permalink] [raw]
Subject: Re: [PATCH 1/1] net: axienet: Move reset before DMA detection



On 21.06.2023 15:23, Pandey, Radhey Shyam wrote:
>> -----Original Message-----
>> From: Maxim Kochetkov <[email protected]>
>> Sent: Wednesday, June 21, 2023 4:57 PM
>> To: [email protected]
>> Cc: Maxim Kochetkov <[email protected]>; Pandey, Radhey Shyam
>> <[email protected]>; David S. Miller
>> <[email protected]>; Eric Dumazet <[email protected]>; Jakub
>> Kicinski <[email protected]>; Paolo Abeni <[email protected]>; Simek,
>> Michal <[email protected]>; [email protected];
>> [email protected]
>> Subject: [PATCH 1/1] net: axienet: Move reset before DMA detection
>>
>> DMA detection will fail if axinet was started before (by boot loader, boot
>> ROM, etc). In this state axinet will not start properly.
>> So move axinet reset before DMA detection.
>
> Please provide more detail on the failing testcase. In which scenario we are
> seeing DMA detection failure? What is error log . Is it random?
>

XAXIDMA_TX_CDESC_OFFSET + 4 register (MM2S_CURDESC_MSB) is used to
detect 64 DMA capability here. But datasheet says: When DMACR.RS is 1
(axinet is in enabled state), CURDESC_PTR becomes Read Only (RO) and is
used to fetch the first
descriptor. So iowrite32()/ioread32() trick to this register is failed.

2023-06-22 08:34:10

by Jiri Pirko

[permalink] [raw]
Subject: Re: [PATCH 1/1] net: axienet: Move reset before DMA detection

Wed, Jun 21, 2023 at 01:26:30PM CEST, [email protected] wrote:
>DMA detection will fail if axinet was started before (by boot loader,
>boot ROM, etc). In this state axinet will not start properly.
>So move axinet reset before DMA detection.
>
>Signed-off-by: Maxim Kochetkov <[email protected]>

You are missing a "Fixes:" tag here pointing out to the patch that
introduced the issue.


>---
> drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
>diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
>index 3e310b55bce2..734822321e0a 100644
>--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
>+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
>@@ -2042,6 +2042,11 @@ static int axienet_probe(struct platform_device *pdev)
> goto cleanup_clk;
> }
>
>+ /* Reset core now that clocks are enabled, prior to accessing MDIO */
>+ ret = __axienet_device_reset(lp);
>+ if (ret)
>+ goto cleanup_clk;
>+
> /* Autodetect the need for 64-bit DMA pointers.
> * When the IP is configured for a bus width bigger than 32 bits,
> * writing the MSB registers is mandatory, even if they are all 0.
>@@ -2096,11 +2101,6 @@ static int axienet_probe(struct platform_device *pdev)
> lp->coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD;
> lp->coalesce_usec_tx = XAXIDMA_DFT_TX_USEC;
>
>- /* Reset core now that clocks are enabled, prior to accessing MDIO */
>- ret = __axienet_device_reset(lp);
>- if (ret)
>- goto cleanup_clk;
>-
> ret = axienet_mdio_setup(lp);
> if (ret)
> dev_warn(&pdev->dev,
>--
>2.40.1
>
>