2020-09-29 12:00:29

by Michal Simek

Subject: [PATCH] arm64: dts: zynqmp: Fix pcie ranges description

DT schema is checking tuples which should be properly separated. The patch
is doing this separation to avoid the following warning:
..yaml: axi: pcie@fd0e0000:ranges: [[33554432, 0, 3758096384, 0,
3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0]] is not valid under
any of the given schemas (Possible causes of the failure):
...dt.yaml: axi: pcie@fd0e0000:ranges: True was expected
...dt.yaml: axi: pcie@fd0e0000:ranges:0: [33554432, 0, 3758096384, 0,
3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0] is too long

Signed-off-by: Michal Simek <[email protected]>
---

I have seen one conversation about it but don't have link which I can point
to.
---
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 771f60e0346d..98073f3223e5 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -542,8 +542,8 @@ pcie: pcie@fd0e0000 {
<0x0 0xfd480000 0x0 0x1000>,
<0x80 0x00000000 0x0 0x1000000>;
reg-names = "breg", "pcireg", "cfg";
- ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000 /* non-prefetchable memory */
- 0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
+ ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000>,/* non-prefetchable memory */
+ <0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
bus-range = <0x00 0xff>;
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
--
2.28.0

2020-10-02 02:05:31

by Laurent Pinchart

Subject: Re: [PATCH] arm64: dts: zynqmp: Fix pcie ranges description

Hi Michal,

Thank you for the patch.

On Tue, Sep 29, 2020 at 01:43:22PM +0200, Michal Simek wrote:
> DT schema is checking tuples which should be properly separated. The patch
> is doing this separation to avoid the following warning:
> ..yaml: axi: pcie@fd0e0000:ranges: [[33554432, 0, 3758096384, 0,
> 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0]] is not valid under
> any of the given schemas (Possible causes of the failure):
> ...dt.yaml: axi: pcie@fd0e0000:ranges: True was expected
> ...dt.yaml: axi: pcie@fd0e0000:ranges:0: [33554432, 0, 3758096384, 0,
> 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0] is too long

I would keep the error message unwrapped as it's a bit confusing to
read, even if it exceeds the normal 72 columns limit of commit messaged.

> Signed-off-by: Michal Simek <[email protected]>

Reviewed-by: Laurent Pinchart <[email protected]>

> ---
>
> I have seen one conversation about it but don't have link which I can point
> to.
> ---
> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 771f60e0346d..98073f3223e5 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -542,8 +542,8 @@ pcie: pcie@fd0e0000 {
> <0x0 0xfd480000 0x0 0x1000>,
> <0x80 0x00000000 0x0 0x1000000>;
> reg-names = "breg", "pcireg", "cfg";
> - ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000 /* non-prefetchable memory */
> - 0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
> + ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000>,/* non-prefetchable memory */
> + <0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
> bus-range = <0x00 0xff>;
> interrupt-map-mask = <0x0 0x0 0x0 0x7>;
> interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,

--
Regards,

Laurent Pinchart

2020-10-02 06:32:14

by Michal Simek

Subject: Re: [PATCH] arm64: dts: zynqmp: Fix pcie ranges description

Hi Laurent,

On 02. 10. 20 4:02, Laurent Pinchart wrote:
> Hi Michal,
>
> Thank you for the patch.
>
> On Tue, Sep 29, 2020 at 01:43:22PM +0200, Michal Simek wrote:
>> DT schema is checking tuples which should be properly separated. The patch
>> is doing this separation to avoid the following warning:
>> ..yaml: axi: pcie@fd0e0000:ranges: [[33554432, 0, 3758096384, 0,
>> 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0]] is not valid under
>> any of the given schemas (Possible causes of the failure):
>> ...dt.yaml: axi: pcie@fd0e0000:ranges: True was expected
>> ...dt.yaml: axi: pcie@fd0e0000:ranges:0: [33554432, 0, 3758096384, 0,
>> 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0] is too long
>
> I would keep the error message unwrapped as it's a bit confusing to
> read, even if it exceeds the normal 72 columns limit of commit messaged.

From git log I see that both ways are used.

>
>> Signed-off-by: Michal Simek <[email protected]>
>
> Reviewed-by: Laurent Pinchart <[email protected]>

Thanks,
Michal

2020-11-25 12:30:54

by Michal Simek

Subject: Re: [PATCH] arm64: dts: zynqmp: Fix pcie ranges description

út 29. 9. 2020 v 13:43 odesílatel Michal Simek <[email protected]> napsal:
>
> DT schema is checking tuples which should be properly separated. The patch
> is doing this separation to avoid the following warning:
> ..yaml: axi: pcie@fd0e0000:ranges: [[33554432, 0, 3758096384, 0,
> 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0]] is not valid under
> any of the given schemas (Possible causes of the failure):
> ...dt.yaml: axi: pcie@fd0e0000:ranges: True was expected
> ...dt.yaml: axi: pcie@fd0e0000:ranges:0: [33554432, 0, 3758096384, 0,
> 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0] is too long
>
> Signed-off-by: Michal Simek <[email protected]>
> ---
>
> I have seen one conversation about it but don't have link which I can point
> to.
> ---
> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 771f60e0346d..98073f3223e5 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -542,8 +542,8 @@ pcie: pcie@fd0e0000 {
> <0x0 0xfd480000 0x0 0x1000>,
> <0x80 0x00000000 0x0 0x1000000>;
> reg-names = "breg", "pcireg", "cfg";
> - ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000 /* non-prefetchable memory */
> - 0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
> + ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000>,/* non-prefetchable memory */
> + <0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
> bus-range = <0x00 0xff>;
> interrupt-map-mask = <0x0 0x0 0x0 0x7>;
> interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
> --
> 2.28.0
>

Applied.
M


--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: http://www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs