Add adc0 for imx8qm-mek board.
Signed-off-by: Frank Li <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
index 77ac0efdfaada..0c4972724b041 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
@@ -39,6 +39,20 @@ reg_usdhc2_vmmc: usdhc2-vmmc {
gpio = <&lsio_gpio4 19 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
+
+ reg_vref_1v8: regulator-adc-vref {
+ compatible = "regulator-fixed";
+ regulator-name = "vref_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+};
+
+&adc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_adc0>;
+ vref-supply = <®_vref_1v8>;
+ status = "okay";
};
&i2c1 {
@@ -130,6 +144,12 @@ IMX8QM_GPT0_CAPTURE_LSIO_GPIO0_IO15 0xc600004c
>;
};
+ pinctrl_adc0: adc0grp {
+ fsl,pins = <
+ IMX8QM_ADC_IN0_DMA_ADC0_IN0 0xc0000060
+ >;
+ };
+
pinctrl_fec1: fec1grp {
fsl,pins = <
IMX8QM_ENET0_MDC_CONN_ENET0_MDC 0x06000020
--
2.34.1
Add lpspi2 support for imx8qm-mek board.
Signed-off-by: Frank Li <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 30 ++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
index 0c4972724b041..800dcb67642b1 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
@@ -85,6 +85,22 @@ &lpuart3 {
status = "okay";
};
+&lpspi2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ fsl,spi-num-chipselects = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lpspi2 &pinctrl_lpspi2_cs>;
+ cs-gpios = <&lsio_gpio3 10 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ spidev0: spi@0 {
+ reg = <0>;
+ compatible = "rohm,dh2228fv";
+ spi-max-frequency = <30000000>;
+ };
+};
+
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
@@ -169,6 +185,20 @@ IMX8QM_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x06000020
>;
};
+ pinctrl_lpspi2: lpspi2grp {
+ fsl,pins = <
+ IMX8QM_SPI2_SCK_DMA_SPI2_SCK 0x06000040
+ IMX8QM_SPI2_SDO_DMA_SPI2_SDO 0x06000040
+ IMX8QM_SPI2_SDI_DMA_SPI2_SDI 0x06000040
+ >;
+ };
+
+ pinctrl_lpspi2_cs: lpspi2cs {
+ fsl,pins = <
+ IMX8QM_SPI2_CS0_LSIO_GPIO3_IO10 0x21
+ >;
+ };
+
pinctrl_lpuart0: lpuart0grp {
fsl,pins = <
IMX8QM_UART0_RX_DMA_UART0_RX 0x06000020
--
2.34.1
Add flexspi0 support for imx8qm-mek board.
Signed-off-by: Frank Li <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 38 ++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
index 800dcb67642b1..7077e394e855b 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
@@ -101,6 +101,23 @@ spidev0: spi@0 {
};
};
+&flexspi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexspi0>;
+ nxp,fspi-dll-slvdly = <4>;
+ status = "okay";
+
+ flash0: mt35xu512aba@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <133000000>;
+ spi-tx-bus-width = <8>;
+ spi-rx-bus-width = <8>;
+ };
+};
+
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
@@ -199,6 +216,27 @@ IMX8QM_SPI2_CS0_LSIO_GPIO3_IO10 0x21
>;
};
+ pinctrl_flexspi0: flexspi0grp {
+ fsl,pins = <
+ IMX8QM_QSPI0A_DATA0_LSIO_QSPI0A_DATA0 0x06000021
+ IMX8QM_QSPI0A_DATA1_LSIO_QSPI0A_DATA1 0x06000021
+ IMX8QM_QSPI0A_DATA2_LSIO_QSPI0A_DATA2 0x06000021
+ IMX8QM_QSPI0A_DATA3_LSIO_QSPI0A_DATA3 0x06000021
+ IMX8QM_QSPI0A_DQS_LSIO_QSPI0A_DQS 0x06000021
+ IMX8QM_QSPI0A_SS0_B_LSIO_QSPI0A_SS0_B 0x06000021
+ IMX8QM_QSPI0A_SS1_B_LSIO_QSPI0A_SS1_B 0x06000021
+ IMX8QM_QSPI0A_SCLK_LSIO_QSPI0A_SCLK 0x06000021
+ IMX8QM_QSPI0B_SCLK_LSIO_QSPI0B_SCLK 0x06000021
+ IMX8QM_QSPI0B_DATA0_LSIO_QSPI0B_DATA0 0x06000021
+ IMX8QM_QSPI0B_DATA1_LSIO_QSPI0B_DATA1 0x06000021
+ IMX8QM_QSPI0B_DATA2_LSIO_QSPI0B_DATA2 0x06000021
+ IMX8QM_QSPI0B_DATA3_LSIO_QSPI0B_DATA3 0x06000021
+ IMX8QM_QSPI0B_DQS_LSIO_QSPI0B_DQS 0x06000021
+ IMX8QM_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B 0x06000021
+ IMX8QM_QSPI0B_SS1_B_LSIO_QSPI0B_SS1_B 0x06000021
+ >;
+ };
+
pinctrl_lpuart0: lpuart0grp {
fsl,pins = <
IMX8QM_UART0_RX_DMA_UART0_RX 0x06000020
--
2.34.1
On Mon, Feb 26, 2024 at 5:34 PM Frank Li <[email protected]> wrote:
> +&flexspi0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexspi0>;
> + nxp,fspi-dll-slvdly = <4>;
> + status = "okay";
> +
> + flash0: mt35xu512aba@0 {
Node names should be generic.
Please run dt-schema checks. Otherwise, you will introduce more warnings.
Hi,
Am Montag, 26. Februar 2024, 21:33:57 CET schrieb Frank Li:
> Add flexspi0 support for imx8qm-mek board.
>
> Signed-off-by: Frank Li <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 38 ++++++++++++++++++++
> 1 file changed, 38 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
> index 800dcb67642b1..7077e394e855b 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
> @@ -101,6 +101,23 @@ spidev0: spi@0 {
> };
> };
>
> +&flexspi0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexspi0>;
> + nxp,fspi-dll-slvdly = <4>;
> + status = "okay";
> +
> + flash0: mt35xu512aba@0 {
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <1>;
Using '#address-cells' and '#size-cells' in mtd (and thus spi-nor )
is deprecated, please refer to Documentation/devicetree/bindings/mtd/mtd.yaml.
You need to add a partitions subnode instead:
> partitions {
> compatible = "fixed-partitions";
> #address-cells = <1>;
> #size-cells = <1>;
> };
Best regards,
Alexander
> + compatible = "jedec,spi-nor";
> + spi-max-frequency = <133000000>;
> + spi-tx-bus-width = <8>;
> + spi-rx-bus-width = <8>;
> + };
> +};
> +
> &fec1 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_fec1>;
> @@ -199,6 +216,27 @@ IMX8QM_SPI2_CS0_LSIO_GPIO3_IO10 0x21
> >;
> };
>
> + pinctrl_flexspi0: flexspi0grp {
> + fsl,pins = <
> + IMX8QM_QSPI0A_DATA0_LSIO_QSPI0A_DATA0 0x06000021
> + IMX8QM_QSPI0A_DATA1_LSIO_QSPI0A_DATA1 0x06000021
> + IMX8QM_QSPI0A_DATA2_LSIO_QSPI0A_DATA2 0x06000021
> + IMX8QM_QSPI0A_DATA3_LSIO_QSPI0A_DATA3 0x06000021
> + IMX8QM_QSPI0A_DQS_LSIO_QSPI0A_DQS 0x06000021
> + IMX8QM_QSPI0A_SS0_B_LSIO_QSPI0A_SS0_B 0x06000021
> + IMX8QM_QSPI0A_SS1_B_LSIO_QSPI0A_SS1_B 0x06000021
> + IMX8QM_QSPI0A_SCLK_LSIO_QSPI0A_SCLK 0x06000021
> + IMX8QM_QSPI0B_SCLK_LSIO_QSPI0B_SCLK 0x06000021
> + IMX8QM_QSPI0B_DATA0_LSIO_QSPI0B_DATA0 0x06000021
> + IMX8QM_QSPI0B_DATA1_LSIO_QSPI0B_DATA1 0x06000021
> + IMX8QM_QSPI0B_DATA2_LSIO_QSPI0B_DATA2 0x06000021
> + IMX8QM_QSPI0B_DATA3_LSIO_QSPI0B_DATA3 0x06000021
> + IMX8QM_QSPI0B_DQS_LSIO_QSPI0B_DQS 0x06000021
> + IMX8QM_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B 0x06000021
> + IMX8QM_QSPI0B_SS1_B_LSIO_QSPI0B_SS1_B 0x06000021
> + >;
> + };
> +
> pinctrl_lpuart0: lpuart0grp {
> fsl,pins = <
> IMX8QM_UART0_RX_DMA_UART0_RX 0x06000020
>
--
TQ-Systems GmbH | M?hlstra?e 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht M?nchen, HRB 105018
Gesch?ftsf?hrer: Detlef Schneider, R?diger Stahl, Stefan Schneider
http://www.tq-group.com/
On Mon, 26 Feb 2024 15:33:55 -0500, Frank Li wrote:
> Add adc0 for imx8qm-mek board.
>
> Signed-off-by: Frank Li <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
My bot found new DT warnings on the .dts files added or changed in this
series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not.
If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:
pip3 install dtschema --upgrade
New warnings running 'make CHECK_DTBS=y freescale/imx8qm-mek.dtb' for [email protected]:
arch/arm64/boot/dts/freescale/imx8qm-mek.dtb: system-controller: pinctrl: 'lpspi2cs' does not match any of the regexes: 'grp$', 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/firmware/fsl,scu.yaml#
arch/arm64/boot/dts/freescale/imx8qm-mek.dtb: pinctrl: 'lpspi2cs' does not match any of the regexes: 'grp$', 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/pinctrl/fsl,scu-pinctrl.yaml#
arch/arm64/boot/dts/freescale/imx8qm-mek.dtb: spi@5a020000: Unevaluated properties are not allowed ('fsl,spi-num-chipselects' was unexpected)
from schema $id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#
arch/arm64/boot/dts/freescale/imx8qm-mek.dtb: spi@5d120000: Unevaluated properties are not allowed ('nxp,fspi-dll-slvdly' was unexpected)
from schema $id: http://devicetree.org/schemas/spi/spi-nxp-fspi.yaml#
arch/arm64/boot/dts/freescale/imx8qm-mek.dtb: mt35xu512aba@0: $nodename:0: 'mt35xu512aba@0' does not match '^(flash|.*sram|nand)(@.*)?$'
from schema $id: http://devicetree.org/schemas/mtd/jedec,spi-nor.yaml#
arch/arm64/boot/dts/freescale/imx8qm-mek.dtb: mt35xu512aba@0: Unevaluated properties are not allowed ('#address-cells', '#size-cells' were unexpected)
from schema $id: http://devicetree.org/schemas/mtd/jedec,spi-nor.yaml#