2023-01-20 19:11:39

by Hawkins, Nick

Subject: [PATCH v3 2/5] dt-bindings: i2c: Add hpe,gxp-i2c

From: Nick Hawkins <[email protected]>

Document compatibility string to support I2C controller
in GXP.

Signed-off-by: Nick Hawkins <[email protected]>

---

v3:
*Provide better description with use of Phandle
v2:
*Removed uneccessary size-cells and address-cells
*Removed phandle from hpe,sysreg-phandle
*Changed hpe,i2c-max-bus-freq to clock-frequency
---
.../devicetree/bindings/i2c/hpe,gxp-i2c.yaml | 57 +++++++++++++++++++
1 file changed, 57 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml

diff --git a/Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml b/Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml
new file mode 100644
index 000000000000..63bc69e92d0e
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml
@@ -0,0 +1,57 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i2c/hpe,gxp-i2c.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: HPE GXP SoC I2C Controller
+
+maintainers:
+ - Nick Hawkins <[email protected]>
+
+allOf:
+ - $ref: /schemas/i2c/i2c-controller.yaml#
+
+properties:
+ compatible:
+ const: hpe,gxp-i2c
+
+ interrupts:
+ maxItems: 1
+
+ reg:
+ maxItems: 1
+
+ clock-frequency:
+ default: 100000
+
+ hpe,sysreg:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle to a global status and enable registers shared
+ between each I2C controller instance. Each bit of the
+ registers represents an individual I2C engine.
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ i2c@2600 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2500 0x70>;
+ interrupts = <9>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg = <&sysreg_system_controller>;
+ clock-frequency = <10000>;
+
+ eeprom@50 {
+ compatible = "atmel,24c128";
+ reg = <0x50>;
+ };
+ };
--
2.17.1

2023-01-22 14:02:59

by Krzysztof Kozlowski

Subject: Re: [PATCH v3 2/5] dt-bindings: i2c: Add hpe,gxp-i2c

On 20/01/2023 20:01, [email protected] wrote:
> From: Nick Hawkins <[email protected]>
>
> Document compatibility string to support I2C controller
> in GXP.
>
> Signed-off-by: Nick Hawkins <[email protected]>
>
> ---
>
> v3:
> *Provide better description with use of Phandle
> v2:
> *Removed uneccessary size-cells and address-cells
> *Removed phandle from hpe,sysreg-phandle
> *Changed hpe,i2c-max-bus-freq to clock-frequency
> ---
> .../devicetree/bindings/i2c/hpe,gxp-i2c.yaml | 57 +++++++++++++++++++
> 1 file changed, 57 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml
>
> diff --git a/Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml b/Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml
> new file mode 100644
> index 000000000000..63bc69e92d0e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml
> @@ -0,0 +1,57 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/i2c/hpe,gxp-i2c.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: HPE GXP SoC I2C Controller
> +
> +maintainers:
> + - Nick Hawkins <[email protected]>
> +
> +allOf:
> + - $ref: /schemas/i2c/i2c-controller.yaml#
> +
> +properties:
> + compatible:
> + const: hpe,gxp-i2c
> +
> + interrupts:
> + maxItems: 1
> +
> + reg:
> + maxItems: 1
> +
> + clock-frequency:
> + default: 100000
> +
> + hpe,sysreg:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description:
> + Phandle to a global status and enable registers shared
> + between each I2C controller instance. Each bit of the
> + registers represents an individual I2C engine.

But what is the purpose? What is it doing? Why I2C controller needs it?

> +
> +required:
> + - compatible
> + - reg
> + - interrupts

Keep the same order as in properties:


Best regards,
Krzysztof

2023-01-23 20:06:50

by Hawkins, Nick

Subject: Re: [PATCH v3 2/5] dt-bindings: i2c: Add hpe,gxp-i2c

> > + hpe,sysreg:
> > + $ref: /schemas/types.yaml#/definitions/phandle
> > + description:
> > + Phandle to a global status and enable registers shared
> > + between each I2C controller instance. Each bit of the
> > + registers represents an individual I2C engine.


> But what is the purpose? What is it doing? Why I2C controller needs it?

Here is an updated to describe the registers' purpose, and function.

description:
Phandle to the global status and enable interrupt registers shared
between each I2C engine controller instance. It enables the I2C
engine controller to act as both a master or slave by being able to
arm and respond to interrupts from its engine. Each bit in the
registers represent the respective bit position.

Thank you for your feedback,

-Nick Hawkins