2015-05-22 14:17:07

by Hai Li

[permalink] [raw]
Subject: [PATCH] drm/msm/mdp5: Always generate active-high sync signals for DSI

DSI video mode engine can only take active-high sync signals. This
change prevents MDP5 sending active-low sync signals to DSI in any
case.

Signed-off-by: Hai Li <[email protected]>
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c
index 53bb1f7..2e98ce0 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c
@@ -144,10 +144,14 @@ static void mdp5_encoder_mode_set(struct drm_encoder *encoder,
mode->type, mode->flags);

ctrl_pol = 0;
- if (mode->flags & DRM_MODE_FLAG_NHSYNC)
- ctrl_pol |= MDP5_INTF_POLARITY_CTL_HSYNC_LOW;
- if (mode->flags & DRM_MODE_FLAG_NVSYNC)
- ctrl_pol |= MDP5_INTF_POLARITY_CTL_VSYNC_LOW;
+
+ /* DSI controller cannot handle active-low sync signals. */
+ if (mdp5_encoder->intf.type != INTF_DSI) {
+ if (mode->flags & DRM_MODE_FLAG_NHSYNC)
+ ctrl_pol |= MDP5_INTF_POLARITY_CTL_HSYNC_LOW;
+ if (mode->flags & DRM_MODE_FLAG_NVSYNC)
+ ctrl_pol |= MDP5_INTF_POLARITY_CTL_VSYNC_LOW;
+ }
/* probably need to get DATA_EN polarity from panel.. */

dtv_hsync_skew = 0; /* get this from panel? */
--
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2015-05-25 05:05:35

by Archit Taneja

[permalink] [raw]
Subject: Re: [PATCH] drm/msm/mdp5: Always generate active-high sync signals for DSI


On 05/22/2015 07:46 PM, Hai Li wrote:
> DSI video mode engine can only take active-high sync signals. This
> change prevents MDP5 sending active-low sync signals to DSI in any
> case.
>
> Signed-off-by: Hai Li <[email protected]>

Tested-by: Archit Taneja <[email protected]>

> ---
> drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c | 12 ++++++++----
> 1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c
> index 53bb1f7..2e98ce0 100644
> --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c
> +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c
> @@ -144,10 +144,14 @@ static void mdp5_encoder_mode_set(struct drm_encoder *encoder,
> mode->type, mode->flags);
>
> ctrl_pol = 0;
> - if (mode->flags & DRM_MODE_FLAG_NHSYNC)
> - ctrl_pol |= MDP5_INTF_POLARITY_CTL_HSYNC_LOW;
> - if (mode->flags & DRM_MODE_FLAG_NVSYNC)
> - ctrl_pol |= MDP5_INTF_POLARITY_CTL_VSYNC_LOW;
> +
> + /* DSI controller cannot handle active-low sync signals. */
> + if (mdp5_encoder->intf.type != INTF_DSI) {
> + if (mode->flags & DRM_MODE_FLAG_NHSYNC)
> + ctrl_pol |= MDP5_INTF_POLARITY_CTL_HSYNC_LOW;
> + if (mode->flags & DRM_MODE_FLAG_NVSYNC)
> + ctrl_pol |= MDP5_INTF_POLARITY_CTL_VSYNC_LOW;
> + }
> /* probably need to get DATA_EN polarity from panel.. */
>
> dtv_hsync_skew = 0; /* get this from panel? */
>

--
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