2015-05-03 14:28:13

by Andrew

[permalink] [raw]
Subject: [PATCH v3 0/1] ARM: mvebu: dts: Add dts file for DLink DNS-327L

Rebased and fixed against 4.1-rc1
This is the resubmit of the patch with fixes based on reviews by Andrew Lunn
and Sebastian Hesselbarth

It looks like UART1 MPP defaults (mpp41, mpp42) introduced in
f8afeaea9611b5183b7919de4fb9333dedc72896 don't play well with DNS-327L and
break both ttyS1 and NAND if used.
I have fixed the mappings for DNS-327L in this patch

Changelog since last respin:
* All the style fixes
* pinctrl fixes for uart1

Fixed and updated description of the patch from my first email follows.

DNS-327L is a 2-bay NAS with the following specs:
- 512MiB RAM
- 128MiB NAND Flash
- 1 GbE interface (Marvell PHY)
- 1 rear USB 3.0 port (via PCIe USB 3.0 controller)
- 2 internal SATA ports handled by the Armada 370:
uses 2 gpios for power control
- two front 2-color leds (amber + white) for both discs,
controlled by the SoC
- One white LED handled by SoC (USB)
- 3 buttons. Power handled by weltrend, USB and
RESET (on the bottom) are wired via GPIOs
- Unidentified i2c device at address 0x13 (via i2cdetect)
- UART0 providing serial console
- Weltrend MCU serving for RTC, temperature, fan control,
and power button handling interfaced via UART1
(Handled via userspace dns320l-daemon)

Hardware notes follow:
Everything's supported, save for mysterious i2c device at
address 0x13 (any ideas what can it be?) that I couldn't even find
on the PCB.

Stock firmware performs some messing with PHY registers (that
have no public documentation) using a userspace script. Using
upstream kernel it is possible to match the stock behavior using
the following in u-boot prompt:

/* Set RGMII voltage to 1.8v, according to public docs. Nice! */
mw.l 0xd00184e0 0xa8a;
/* Some weird magic that goes into phy registers, no public docs */
phyWrite 0 16 2;
phyWrite 0 19 77;
phyWrite 0 18 5747;


Andrew Andrianov (1):
ARM: mvebu: dts: Add dts file for DLink DNS-327L

arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/armada-370-dlink-dns327l.dts | 349 ++++++++++++++++++++++++
2 files changed, 350 insertions(+)
create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts

--
1.7.10.4


2015-05-03 14:28:23

by Andrew

[permalink] [raw]
Subject: [PATCH v3 1/1] ARM: mvebu: dts: Add dts file for DLink DNS-327L

DNS-327L is a 2-bay NAS with the following specs:
- 512MiB RAM
- 128MiB NAND Flash
- 1 GbE interface (Marvell PHY)
- 1 rear USB 3.0 port (via PCIe USB 3.0 controller)
- 2 internal SATA ports handled by the Armada 370:
uses 2 gpios for power control
- two front 2-color leds (amber + white) for both discs,
controlled by the SoC
- One white LED handled by SoC (USB)
- 3 buttons. Power handled by weltrend, USB and
RESET (on the bottom) are wired via GPIOs
- Unidentified i2c device at address 0x13 (via i2cdetect)
- UART0 providing serial console
- Weltrend MCU serving for RTC, temperature, fan control,
and power button handling interfaced via UART1
(Handled via userspace dns320l-daemon)

Signed-off-by: Andrew Andrianov <[email protected]>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/armada-370-dlink-dns327l.dts | 353 ++++++++++++++++++++++++
2 files changed, 354 insertions(+)
create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 86217db..58fa9f6 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -624,6 +624,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-zybo.dtb
dtb-$(CONFIG_MACH_ARMADA_370) += \
armada-370-db.dtb \
+ armada-370-dlink-dns327l.dtb \
armada-370-mirabox.dtb \
armada-370-netgear-rn102.dtb \
armada-370-netgear-rn104.dtb \
diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
new file mode 100644
index 0000000..6ab8fab
--- /dev/null
+++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
@@ -0,0 +1,353 @@
+/*
+ * Device Tree file for D-Link DNS-327L
+ *
+ * Copyright (C) 2015, Andrew Andrianov <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/* Remaining unsolved:
+ * There's still some unknown device on i2c address 0x13
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "armada-370.dtsi"
+
+/ {
+ model = "D-Link DNS-327L";
+ compatible = "dlink,dns327l",
+ "marvell,armada370",
+ "marvell,armada-370-xp";
+
+ chosen {
+ stdout-path = &uart0;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x20000000>; /* 512 MiB */
+ };
+
+ soc {
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
+ MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
+
+ pcie-controller {
+ status = "okay";
+
+ pcie@1,0 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+ };
+
+ pcie@2,0 {
+ /* Port 1, Lane 0 */
+ status = "okay";
+ };
+ };
+
+ internal-regs {
+ sata@a0000 {
+ nr-ports = <2>;
+ status = "okay";
+ };
+
+ usb@50000 {
+ status = "okay";
+ };
+
+ nand@d0000 {
+ status = "okay";
+ num-cs = <1>;
+ marvell,nand-keep-config;
+ marvell,nand-enable-arbiter;
+ nand-on-flash-bbt;
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+
+ partition@0 {
+ label = "u-boot";
+ /* 1.0 MiB */
+ reg = <0x0000000 0x100000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "u-boot-env";
+ /* 128 KiB */
+ reg = <0x100000 0x20000>;
+ read-only;
+ };
+
+ partition@120000 {
+ label = "uImage";
+ /* 7 MiB */
+ reg = <0x120000 0x700000>;
+ };
+
+ partition@820000 {
+ label = "ubifs";
+ /* ~ 84 MiB */
+ reg = <0x820000 0x54e0000>;
+ };
+
+ /* Hardcoded into stock bootloader */
+ partition@5d00000 {
+ label = "failsafe-uImage";
+ /* 5 MiB */
+ reg = <0x5d00000 0x500000>;
+ };
+
+ partition@6200000 {
+ label = "failsafe-fs";
+ /* 29 MiB */
+ reg = <0x6200000 0x1d00000>;
+ };
+
+ partition@7f00000 {
+ label = "bbt";
+ /* 1 MiB for BBT */
+ reg = <0x7f00000 0x100000>;
+ };
+ };
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <
+ &backup_button_pin
+ &power_button_pin
+ &reset_button_pin>;
+ pinctrl-names = "default";
+
+ power-button {
+ label = "Power Button";
+ linux,code = <KEY_POWER>;
+ gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
+ };
+
+ backup-button {
+ label = "Backup Button";
+ linux,code = <KEY_COPY>;
+ gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
+ };
+
+ reset-button {
+ label = "Reset Button";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <
+ &sata_l_amber_pin
+ &sata_r_amber_pin
+ &backup_led_pin
+ /* Ensure these are managed by hardware */
+ &sata_l_white_pin
+ &sata_r_white_pin>;
+
+ pinctrl-names = "default";
+
+ sata-r-amber-pin {
+ label = "dns327l:amber:sata-r";
+ gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
+ default-state = "keep";
+ };
+
+ sata-l-amber-pin {
+ label = "dns327l:amber:sata-l";
+ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+ default-state = "keep";
+ };
+
+ backup-led-pin {
+ label = "dns327l:white:usb";
+ gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+ default-state = "keep";
+ };
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-0 = <&xhci_pwr_pin
+ &sata_l_pwr_pin
+ &sata_r_pwr_pin>;
+
+ pinctrl-names = "default";
+
+ usb_power: regulator@1 {
+ compatible = "regulator-fixed";
+ reg = <1>;
+ regulator-name = "USB3.0 Port Power";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ regulator-boot-on;
+ regulator-always-on;
+ gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+ };
+
+ sata_r_power: regulator@2 {
+ compatible = "regulator-fixed";
+ reg = <2>;
+ regulator-name = "SATA-R Power";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ startup-delay-us = <2000000>;
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+ };
+
+ sata_l_power: regulator@3 {
+ compatible = "regulator-fixed";
+ reg = <3>;
+ regulator-name = "SATA-L Power";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ startup-delay-us = <4000000>;
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&pinctrl {
+ sata_l_white_pin: sata-l-white-pin {
+ marvell,pins = "mpp57";
+ marvell,function = "sata0";
+ };
+
+ sata_r_white_pin: sata-r-white-pin {
+ marvell,pins = "mpp55";
+ marvell,function = "sata1";
+ };
+
+ sata_r_amber_pin: sata-r-amber-pin {
+ marvell,pins = "mpp52";
+ marvell,function = "gpio";
+ };
+
+
+ sata_l_amber_pin: sata-l-amber-pin {
+ marvell,pins = "mpp53";
+ marvell,function = "gpio";
+ };
+
+ backup_led_pin: backup-led-pin {
+ marvell,pins = "mpp61";
+ marvell,function = "gpo";
+ };
+
+ xhci_pwr_pin: xhci-pwr-pin {
+ marvell,pins = "mpp13";
+ marvell,function = "gpio";
+ };
+
+ sata_r_pwr_pin: sata-r-pwr-pin {
+ marvell,pins = "mpp54";
+ marvell,function = "gpio";
+ };
+
+ sata_l_pwr_pin: sata-l-pwr-pin {
+ marvell,pins = "mpp56";
+ marvell,function = "gpio";
+ };
+
+ uart1_pins: uart1-pins {
+ marvell,pins = "mpp60", "mpp61";
+ marvell,function = "uart1";
+ };
+
+ power_button_pin: power-button-pin {
+ marvell,pins = "mpp65";
+ marvell,function = "gpio";
+ };
+
+ backup_button_pin: backup-button-pin {
+ marvell,pins = "mpp63";
+ marvell,function = "gpio";
+ };
+
+ reset_button_pin: reset-button-pin {
+ marvell,pins = "mpp64";
+ marvell,function = "gpio";
+ };
+};
+
+/* Serial console */
+&uart0 {
+ status = "okay";
+};
+
+/* Connected to Weltrend MCU */
+&uart1 {
+ pinctrl-0 = <&uart1_pins>;
+ status = "okay";
+};
+
+&mdio {
+ phy0: ethernet-phy@0 { /* Marvell 88E1318 */
+ reg = <0>;
+ };
+};
+
+&eth1 {
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
+
+&i2c0 {
+ compatible = "marvell,mv64xxx-i2c";
+ clock-frequency = <100000>;
+ status = "okay";
+};
--
1.7.10.4

2015-05-03 20:55:35

by Andrew Lunn

[permalink] [raw]
Subject: Re: [PATCH v3 0/1] ARM: mvebu: dts: Add dts file for DLink DNS-327L

Hi Andrew

> DNS-327L is a 2-bay NAS with the following specs:
> - 512MiB RAM
> - 128MiB NAND Flash
> - 1 GbE interface (Marvell PHY)

...

> /* Set RGMII voltage to 1.8v, according to public docs. Nice! */
> mw.l 0xd00184e0 0xa8a;
> /* Some weird magic that goes into phy registers, no public docs */
> phyWrite 0 16 2;
> phyWrite 0 19 77;
> phyWrite 0 18 5747;

Take a look at the marvell,reg-init property. Might do what you need.

Andrew

2015-05-03 22:06:12

by Andrew

[permalink] [raw]
Subject: Re: [PATCH v3 0/1] ARM: mvebu: dts: Add dts file for DLink DNS-327L

Andrew Lunn писал 03.05.2015 23:50:
> Hi Andrew
>
>> DNS-327L is a 2-bay NAS with the following specs:
>> - 512MiB RAM
>> - 128MiB NAND Flash
>> - 1 GbE interface (Marvell PHY)
>
> ...
>
>> /* Set RGMII voltage to 1.8v, according to public docs. Nice! */
>> mw.l 0xd00184e0 0xa8a;
>> /* Some weird magic that goes into phy registers, no public docs */
>> phyWrite 0 16 2;
>> phyWrite 0 19 77;
>> phyWrite 0 18 5747;
>
> Take a look at the marvell,reg-init property. Might do what you need.
>
> Andrew

Thanks for the tip. So far I'm solving it via u-boot.
You have to set RGMII voltage there anyway if you want tftp for the
updates,
so it looks like the right place to do this kind of stuff.


I'll add the proper magic to the dts file and resend tomorrow.

--
Regards,
Andrew

2015-05-06 14:10:24

by Andrew Lunn

[permalink] [raw]
Subject: Re: [PATCH v3 0/1] ARM: mvebu: dts: Add dts file for DLink DNS-327L

> >Take a look at the marvell,reg-init property. Might do what you need.
> >
> > Andrew
>
> Thanks for the tip. So far I'm solving it via u-boot.
> You have to set RGMII voltage there anyway if you want tftp for the
> updates,
> so it looks like the right place to do this kind of stuff.

It is heard to guarantee that the bootloader does this stuff. It is
better if the kernel is more standalone.
>
> I'll add the proper magic to the dts file and resend tomorrow.

Thanks
Andrew

2015-05-19 21:11:13

by Andrew

[permalink] [raw]
Subject: [PATCH v4 0/1] ARM: mvebu: dts: Add dts file for DLink DNS-327L

Rebased against 4.1-rc1
Sorry for the long delay with the respin, I've been caught in the usual
daily routine yet again.
Hopefully everything's finally okay now.

Changelog since last respin:
* Properly initialize phy registers in dts

Andrew Andrianov (1):
ARM: mvebu: dts: Add dts file for DLink DNS-327L

arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/armada-370-dlink-dns327l.dts | 356 +++++++++++++++++++++++++
2 files changed, 357 insertions(+)
create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts

--
2.1.4

2015-05-19 21:11:16

by Andrew

[permalink] [raw]
Subject: [PATCH v4 1/1] ARM: mvebu: dts: Add dts file for DLink DNS-327L

DNS-327L is a 2-bay NAS with the following specs:
- 512MiB RAM
- 128MiB NAND Flash
- 1 GbE interface (Marvell PHY)
- 1 rear USB 3.0 port (via PCIe USB 3.0 controller)
- 2 internal SATA ports handled by the Armada 370:
uses 2 gpios for power control
- two front 2-color leds (amber + white) for both discs,
controlled by the SoC
- One white LED handled by SoC (USB)
- 3 buttons. Power handled by weltrend, USB and
RESET (on the bottom) are wired via GPIOs
- Unidentified i2c device at address 0x13 (via i2cdetect)
- UART0 providing serial console
- Weltrend MCU serving for RTC, temperature, fan control,
and power button handling interfaced via UART1
(Handled via userspace dns320l-daemon)

Signed-off-by: Andrew Andrianov <[email protected]>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/armada-370-dlink-dns327l.dts | 356 +++++++++++++++++++++++++
2 files changed, 357 insertions(+)
create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 86217db..58fa9f6 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -624,6 +624,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-zybo.dtb
dtb-$(CONFIG_MACH_ARMADA_370) += \
armada-370-db.dtb \
+ armada-370-dlink-dns327l.dtb \
armada-370-mirabox.dtb \
armada-370-netgear-rn102.dtb \
armada-370-netgear-rn104.dtb \
diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
new file mode 100644
index 0000000..0f4555c4
--- /dev/null
+++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
@@ -0,0 +1,356 @@
+/*
+ * Device Tree file for D-Link DNS-327L
+ *
+ * Copyright (C) 2015, Andrew Andrianov <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/* Remaining unsolved:
+ * There's still some unknown device on i2c address 0x13
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "armada-370.dtsi"
+
+/ {
+ model = "D-Link DNS-327L";
+ compatible = "dlink,dns327l",
+ "marvell,armada370",
+ "marvell,armada-370-xp";
+
+ chosen {
+ stdout-path = &uart0;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x20000000>; /* 512 MiB */
+ };
+
+ soc {
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
+ MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
+
+ pcie-controller {
+ status = "okay";
+
+ pcie@1,0 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+ };
+
+ pcie@2,0 {
+ /* Port 1, Lane 0 */
+ status = "okay";
+ };
+ };
+
+ internal-regs {
+ sata@a0000 {
+ nr-ports = <2>;
+ status = "okay";
+ };
+
+ usb@50000 {
+ status = "okay";
+ };
+
+ nand@d0000 {
+ status = "okay";
+ num-cs = <1>;
+ marvell,nand-keep-config;
+ marvell,nand-enable-arbiter;
+ nand-on-flash-bbt;
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+
+ partition@0 {
+ label = "u-boot";
+ /* 1.0 MiB */
+ reg = <0x0000000 0x100000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "u-boot-env";
+ /* 128 KiB */
+ reg = <0x100000 0x20000>;
+ read-only;
+ };
+
+ partition@120000 {
+ label = "uImage";
+ /* 7 MiB */
+ reg = <0x120000 0x700000>;
+ };
+
+ partition@820000 {
+ label = "ubifs";
+ /* ~ 84 MiB */
+ reg = <0x820000 0x54e0000>;
+ };
+
+ /* Hardcoded into stock bootloader */
+ partition@5d00000 {
+ label = "failsafe-uImage";
+ /* 5 MiB */
+ reg = <0x5d00000 0x500000>;
+ };
+
+ partition@6200000 {
+ label = "failsafe-fs";
+ /* 29 MiB */
+ reg = <0x6200000 0x1d00000>;
+ };
+
+ partition@7f00000 {
+ label = "bbt";
+ /* 1 MiB for BBT */
+ reg = <0x7f00000 0x100000>;
+ };
+ };
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <
+ &backup_button_pin
+ &power_button_pin
+ &reset_button_pin>;
+ pinctrl-names = "default";
+
+ power-button {
+ label = "Power Button";
+ linux,code = <KEY_POWER>;
+ gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
+ };
+
+ backup-button {
+ label = "Backup Button";
+ linux,code = <KEY_COPY>;
+ gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
+ };
+
+ reset-button {
+ label = "Reset Button";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <
+ &sata_l_amber_pin
+ &sata_r_amber_pin
+ &backup_led_pin
+ /* Ensure these are managed by hardware */
+ &sata_l_white_pin
+ &sata_r_white_pin>;
+
+ pinctrl-names = "default";
+
+ sata-r-amber-pin {
+ label = "dns327l:amber:sata-r";
+ gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
+ default-state = "keep";
+ };
+
+ sata-l-amber-pin {
+ label = "dns327l:amber:sata-l";
+ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+ default-state = "keep";
+ };
+
+ backup-led-pin {
+ label = "dns327l:white:usb";
+ gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+ default-state = "keep";
+ };
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-0 = <&xhci_pwr_pin
+ &sata_l_pwr_pin
+ &sata_r_pwr_pin>;
+
+ pinctrl-names = "default";
+
+ usb_power: regulator@1 {
+ compatible = "regulator-fixed";
+ reg = <1>;
+ regulator-name = "USB3.0 Port Power";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ regulator-boot-on;
+ regulator-always-on;
+ gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+ };
+
+ sata_r_power: regulator@2 {
+ compatible = "regulator-fixed";
+ reg = <2>;
+ regulator-name = "SATA-R Power";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ startup-delay-us = <2000000>;
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+ };
+
+ sata_l_power: regulator@3 {
+ compatible = "regulator-fixed";
+ reg = <3>;
+ regulator-name = "SATA-L Power";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ startup-delay-us = <4000000>;
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&pinctrl {
+ sata_l_white_pin: sata-l-white-pin {
+ marvell,pins = "mpp57";
+ marvell,function = "sata0";
+ };
+
+ sata_r_white_pin: sata-r-white-pin {
+ marvell,pins = "mpp55";
+ marvell,function = "sata1";
+ };
+
+ sata_r_amber_pin: sata-r-amber-pin {
+ marvell,pins = "mpp52";
+ marvell,function = "gpio";
+ };
+
+
+ sata_l_amber_pin: sata-l-amber-pin {
+ marvell,pins = "mpp53";
+ marvell,function = "gpio";
+ };
+
+ backup_led_pin: backup-led-pin {
+ marvell,pins = "mpp61";
+ marvell,function = "gpo";
+ };
+
+ xhci_pwr_pin: xhci-pwr-pin {
+ marvell,pins = "mpp13";
+ marvell,function = "gpio";
+ };
+
+ sata_r_pwr_pin: sata-r-pwr-pin {
+ marvell,pins = "mpp54";
+ marvell,function = "gpio";
+ };
+
+ sata_l_pwr_pin: sata-l-pwr-pin {
+ marvell,pins = "mpp56";
+ marvell,function = "gpio";
+ };
+
+ uart1_pins: uart1-pins {
+ marvell,pins = "mpp60", "mpp61";
+ marvell,function = "uart1";
+ };
+
+ power_button_pin: power-button-pin {
+ marvell,pins = "mpp65";
+ marvell,function = "gpio";
+ };
+
+ backup_button_pin: backup-button-pin {
+ marvell,pins = "mpp63";
+ marvell,function = "gpio";
+ };
+
+ reset_button_pin: reset-button-pin {
+ marvell,pins = "mpp64";
+ marvell,function = "gpio";
+ };
+};
+
+/* Serial console */
+&uart0 {
+ status = "okay";
+};
+
+/* Connected to Weltrend MCU */
+&uart1 {
+ pinctrl-0 = <&uart1_pins>;
+ status = "okay";
+};
+
+&mdio {
+ phy0: ethernet-phy@0 { /* Marvell 88E1318 */
+ reg = <0>;
+ marvell,reg-init = <0x0 0x16 0x0 0x2>,
+ <0x0 0x19 0x0 0x77>,
+ <0x0 0x18 0x0 0x5747>;
+ };
+};
+
+&eth1 {
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
+
+&i2c0 {
+ compatible = "marvell,mv64xxx-i2c";
+ clock-frequency = <100000>;
+ status = "okay";
+};
--
2.1.4

2015-05-20 09:05:25

by Sebastian Hesselbarth

[permalink] [raw]
Subject: Re: [PATCH v4 1/1] ARM: mvebu: dts: Add dts file for DLink DNS-327L

On 19.05.2015 23:10, Andrew Andrianov wrote:
> DNS-327L is a 2-bay NAS with the following specs:
[...]
> Signed-off-by: Andrew Andrianov <[email protected]>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/armada-370-dlink-dns327l.dts | 356 +++++++++++++++++++++++++
> 2 files changed, 357 insertions(+)
> create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts
[...]
> diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> new file mode 100644
> index 0000000..0f4555c4
> --- /dev/null
> +++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> @@ -0,0 +1,356 @@
[...]
> + regulators {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pinctrl-0 = <&xhci_pwr_pin
> + &sata_l_pwr_pin
> + &sata_r_pwr_pin>;
> +
> + pinctrl-names = "default";

Andrew,

I doubt pinctrl will not work as you expected. For regulators, unlike
gpio-keys/leds above, this node just describes the "bus" of regulators.

> +
> + usb_power: regulator@1 {
> + compatible = "regulator-fixed";
> + reg = <1>;
> + regulator-name = "USB3.0 Port Power";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + enable-active-high;
> + regulator-boot-on;
> + regulator-always-on;
> + gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;

Instead you'll have to put the corresponding pinctrl-0/names properties
in each of the regulator nodes, i.e.

pinctrl-0 = <&xhci_pwr_pin>
pinctrl-names = "default";

here and similar for the other regulator nodes.

> + };
> +
> + sata_r_power: regulator@2 {
> + compatible = "regulator-fixed";
> + reg = <2>;
> + regulator-name = "SATA-R Power";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + startup-delay-us = <2000000>;
> + enable-active-high;
> + regulator-always-on;
> + regulator-boot-on;
> + gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
> + };
> +
> + sata_l_power: regulator@3 {
> + compatible = "regulator-fixed";
> + reg = <3>;
> + regulator-name = "SATA-L Power";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + startup-delay-us = <4000000>;
> + enable-active-high;
> + regulator-always-on;
> + regulator-boot-on;
> + gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
> + };
> + };
> +};
> +
> +&pinctrl {
> + sata_l_white_pin: sata-l-white-pin {
> + marvell,pins = "mpp57";
> + marvell,function = "sata0";
> + };
> +
> + sata_r_white_pin: sata-r-white-pin {
> + marvell,pins = "mpp55";
> + marvell,function = "sata1";
> + };
> +
> + sata_r_amber_pin: sata-r-amber-pin {
> + marvell,pins = "mpp52";
> + marvell,function = "gpio";
> + };
> +

Remove extra empty line.

> +
> + sata_l_amber_pin: sata-l-amber-pin {
> + marvell,pins = "mpp53";
> + marvell,function = "gpio";
> + };
> +
> + backup_led_pin: backup-led-pin {
> + marvell,pins = "mpp61";
> + marvell,function = "gpo";
> + };
> +
> + xhci_pwr_pin: xhci-pwr-pin {
> + marvell,pins = "mpp13";
> + marvell,function = "gpio";
> + };
> +
> + sata_r_pwr_pin: sata-r-pwr-pin {
> + marvell,pins = "mpp54";
> + marvell,function = "gpio";
> + };
> +
> + sata_l_pwr_pin: sata-l-pwr-pin {
> + marvell,pins = "mpp56";
> + marvell,function = "gpio";
> + };
> +
> + uart1_pins: uart1-pins {
> + marvell,pins = "mpp60", "mpp61";
> + marvell,function = "uart1";
> + };
> +
> + power_button_pin: power-button-pin {
> + marvell,pins = "mpp65";
> + marvell,function = "gpio";
> + };
> +
> + backup_button_pin: backup-button-pin {
> + marvell,pins = "mpp63";
> + marvell,function = "gpio";
> + };
> +
> + reset_button_pin: reset-button-pin {
> + marvell,pins = "mpp64";
> + marvell,function = "gpio";
> + };
> +};
> +
> +/* Serial console */
> +&uart0 {
> + status = "okay";
> +};
> +
> +/* Connected to Weltrend MCU */
> +&uart1 {
> + pinctrl-0 = <&uart1_pins>;

missing pinctrl-names = "default";

> + status = "okay";
> +};
> +
> +&mdio {
> + phy0: ethernet-phy@0 { /* Marvell 88E1318 */
> + reg = <0>;
> + marvell,reg-init = <0x0 0x16 0x0 0x2>,
> + <0x0 0x19 0x0 0x77>,
> + <0x0 0x18 0x0 0x5747>;

nit: if you are at it, you could prepend the mdio reg data with 0, i.e.
<0x0 0x16 0x0 0x0002>.

If you address the comments and stick with this version, i.e. do not add
any new stuff now - you can add my

Acked-by: Sebastian Hesselbarth <[email protected]>

Thanks!

> + };
> +};
> +
> +&eth1 {
> + phy = <&phy0>;
> + phy-mode = "rgmii-id";
> + status = "okay";
> +};
> +
> +&i2c0 {
> + compatible = "marvell,mv64xxx-i2c";
> + clock-frequency = <100000>;
> + status = "okay";
> +};
>

2015-05-20 10:21:05

by Andrew

[permalink] [raw]
Subject: Re: [PATCH v4 1/1] ARM: mvebu: dts: Add dts file for DLink DNS-327L

Sebastian Hesselbarth писал 20.05.2015 12:05:
> On 19.05.2015 23:10, Andrew Andrianov wrote:
>> DNS-327L is a 2-bay NAS with the following specs:
> [...]
>> Signed-off-by: Andrew Andrianov <[email protected]>
>> ---
>> arch/arm/boot/dts/Makefile | 1 +
>> arch/arm/boot/dts/armada-370-dlink-dns327l.dts | 356
>> +++++++++++++++++++++++++
>> 2 files changed, 357 insertions(+)
>> create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> [...]
>> diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>> b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>> new file mode 100644
>> index 0000000..0f4555c4
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>> @@ -0,0 +1,356 @@
> [...]
>> + regulators {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + pinctrl-0 = <&xhci_pwr_pin
>> + &sata_l_pwr_pin
>> + &sata_r_pwr_pin>;
>> +
>> + pinctrl-names = "default";
>
> Andrew,
>
> I doubt pinctrl will not work as you expected. For regulators, unlike
> gpio-keys/leds above, this node just describes the "bus" of regulators.

Are you sure about this moment? FYI: I've taken
armada-370-synology-ds213j.dts
as the reference which happens to list regulator pinctrl (As of 4.1-rc1)
just the same way:

compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin>;
pinctrl-names = "default";
...

If that's erroneous we should fix armada-370-synology-ds213j.dts as
well.

>
>> +
>> + usb_power: regulator@1 {
>> + compatible = "regulator-fixed";
>> + reg = <1>;
>> + regulator-name = "USB3.0 Port Power";
>> + regulator-min-microvolt = <5000000>;
>> + regulator-max-microvolt = <5000000>;
>> + enable-active-high;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
>
> Instead you'll have to put the corresponding pinctrl-0/names properties
> in each of the regulator nodes, i.e.
>
> pinctrl-0 = <&xhci_pwr_pin>
> pinctrl-names = "default";
>
> here and similar for the other regulator nodes.
>
>> + };
>> +
>> + sata_r_power: regulator@2 {
>> + compatible = "regulator-fixed";
>> + reg = <2>;
>> + regulator-name = "SATA-R Power";
>> + regulator-min-microvolt = <5000000>;
>> + regulator-max-microvolt = <5000000>;
>> + startup-delay-us = <2000000>;
>> + enable-active-high;
>> + regulator-always-on;
>> + regulator-boot-on;
>> + gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
>> + };
>> +
>> + sata_l_power: regulator@3 {
>> + compatible = "regulator-fixed";
>> + reg = <3>;
>> + regulator-name = "SATA-L Power";
>> + regulator-min-microvolt = <5000000>;
>> + regulator-max-microvolt = <5000000>;
>> + startup-delay-us = <4000000>;
>> + enable-active-high;
>> + regulator-always-on;
>> + regulator-boot-on;
>> + gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
>> + };
>> + };
>> +};
>> +
>> +&pinctrl {
>> + sata_l_white_pin: sata-l-white-pin {
>> + marvell,pins = "mpp57";
>> + marvell,function = "sata0";
>> + };
>> +
>> + sata_r_white_pin: sata-r-white-pin {
>> + marvell,pins = "mpp55";
>> + marvell,function = "sata1";
>> + };
>> +
>> + sata_r_amber_pin: sata-r-amber-pin {
>> + marvell,pins = "mpp52";
>> + marvell,function = "gpio";
>> + };
>> +
>
> Remove extra empty line.
>
>> +
>> + sata_l_amber_pin: sata-l-amber-pin {
>> + marvell,pins = "mpp53";
>> + marvell,function = "gpio";
>> + };
>> +
>> + backup_led_pin: backup-led-pin {
>> + marvell,pins = "mpp61";
>> + marvell,function = "gpo";
>> + };
>> +
>> + xhci_pwr_pin: xhci-pwr-pin {
>> + marvell,pins = "mpp13";
>> + marvell,function = "gpio";
>> + };
>> +
>> + sata_r_pwr_pin: sata-r-pwr-pin {
>> + marvell,pins = "mpp54";
>> + marvell,function = "gpio";
>> + };
>> +
>> + sata_l_pwr_pin: sata-l-pwr-pin {
>> + marvell,pins = "mpp56";
>> + marvell,function = "gpio";
>> + };
>> +
>> + uart1_pins: uart1-pins {
>> + marvell,pins = "mpp60", "mpp61";
>> + marvell,function = "uart1";
>> + };
>> +
>> + power_button_pin: power-button-pin {
>> + marvell,pins = "mpp65";
>> + marvell,function = "gpio";
>> + };
>> +
>> + backup_button_pin: backup-button-pin {
>> + marvell,pins = "mpp63";
>> + marvell,function = "gpio";
>> + };
>> +
>> + reset_button_pin: reset-button-pin {
>> + marvell,pins = "mpp64";
>> + marvell,function = "gpio";
>> + };
>> +};
>> +
>> +/* Serial console */
>> +&uart0 {
>> + status = "okay";
>> +};
>> +
>> +/* Connected to Weltrend MCU */
>> +&uart1 {
>> + pinctrl-0 = <&uart1_pins>;
>
> missing pinctrl-names = "default";
>
>> + status = "okay";
>> +};
>> +
>> +&mdio {
>> + phy0: ethernet-phy@0 { /* Marvell 88E1318 */
>> + reg = <0>;
>> + marvell,reg-init = <0x0 0x16 0x0 0x2>,
>> + <0x0 0x19 0x0 0x77>,
>> + <0x0 0x18 0x0 0x5747>;
>
> nit: if you are at it, you could prepend the mdio reg data with 0, i.e.
> <0x0 0x16 0x0 0x0002>.
>
> If you address the comments and stick with this version, i.e. do not
> add
> any new stuff now - you can add my
>
> Acked-by: Sebastian Hesselbarth <[email protected]>
>
> Thanks!
>
>> + };
>> +};
>> +
>> +&eth1 {
>> + phy = <&phy0>;
>> + phy-mode = "rgmii-id";
>> + status = "okay";
>> +};
>> +
>> +&i2c0 {
>> + compatible = "marvell,mv64xxx-i2c";
>> + clock-frequency = <100000>;
>> + status = "okay";
>> +};
>>

--
Regards,
Andrew

2015-05-20 11:00:14

by Sebastian Hesselbarth

[permalink] [raw]
Subject: Re: [PATCH v4 1/1] ARM: mvebu: dts: Add dts file for DLink DNS-327L

On 20.05.2015 12:20, Andrew wrote:
> Sebastian Hesselbarth писал 20.05.2015 12:05:
>> On 19.05.2015 23:10, Andrew Andrianov wrote:
>>> DNS-327L is a 2-bay NAS with the following specs:
>> [...]
>>> Signed-off-by: Andrew Andrianov <[email protected]>
>>> ---
>>> arch/arm/boot/dts/Makefile | 1 +
>>> arch/arm/boot/dts/armada-370-dlink-dns327l.dts | 356
>>> +++++++++++++++++++++++++
>>> 2 files changed, 357 insertions(+)
>>> create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>> [...]
>>> diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>>> b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>>> new file mode 100644
>>> index 0000000..0f4555c4
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>>> @@ -0,0 +1,356 @@
>> [...]
>>> + regulators {
>>> + compatible = "simple-bus";
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + pinctrl-0 = <&xhci_pwr_pin
>>> + &sata_l_pwr_pin
>>> + &sata_r_pwr_pin>;
>>> +
>>> + pinctrl-names = "default";
>>
>> I doubt pinctrl will not work as you expected. For regulators, unlike
>> gpio-keys/leds above, this node just describes the "bus" of regulators.
>
> Are you sure about this moment? FYI: I've taken
> armada-370-synology-ds213j.dts
> as the reference which happens to list regulator pinctrl (As of 4.1-rc1)
> just the same way:
>
> compatible = "simple-bus";
> #address-cells = <1>;
> #size-cells = <0>;
> pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin>;
> pinctrl-names = "default";
> ...

Well, even if it works the pinctrl should be claimed by the device that
actually depends on it, i.e. the regulator itself.

> If that's erroneous we should fix armada-370-synology-ds213j.dts as well.

Most likely nobody ever noticed if that didn't work because (a) usually
gpio functions are setup by the bootloader or (b) gpio is default reset
value of the pinctrl registers anyway.

I'd say move the pinctrl properties to regulator nodes for dns-327l now
and we move the properties for ds213j in a separate patch.

Sebastian

>>> +
>>> + usb_power: regulator@1 {
>>> + compatible = "regulator-fixed";
>>> + reg = <1>;
>>> + regulator-name = "USB3.0 Port Power";
>>> + regulator-min-microvolt = <5000000>;
>>> + regulator-max-microvolt = <5000000>;
>>> + enable-active-high;
>>> + regulator-boot-on;
>>> + regulator-always-on;
>>> + gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
>>
>> Instead you'll have to put the corresponding pinctrl-0/names properties
>> in each of the regulator nodes, i.e.
>>
>> pinctrl-0 = <&xhci_pwr_pin>
>> pinctrl-names = "default";
>>
>> here and similar for the other regulator nodes.
>>
>>> + };
>>> +
>>> + sata_r_power: regulator@2 {
>>> + compatible = "regulator-fixed";
>>> + reg = <2>;
>>> + regulator-name = "SATA-R Power";
>>> + regulator-min-microvolt = <5000000>;
>>> + regulator-max-microvolt = <5000000>;
>>> + startup-delay-us = <2000000>;
>>> + enable-active-high;
>>> + regulator-always-on;
>>> + regulator-boot-on;
>>> + gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
>>> + };
>>> +
>>> + sata_l_power: regulator@3 {
>>> + compatible = "regulator-fixed";
>>> + reg = <3>;
>>> + regulator-name = "SATA-L Power";
>>> + regulator-min-microvolt = <5000000>;
>>> + regulator-max-microvolt = <5000000>;
>>> + startup-delay-us = <4000000>;
>>> + enable-active-high;
>>> + regulator-always-on;
>>> + regulator-boot-on;
>>> + gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
>>> + };
>>> + };
>>> +};

2015-05-25 11:17:41

by Gregory CLEMENT

[permalink] [raw]
Subject: Re: [PATCH v4 1/1] ARM: mvebu: dts: Add dts file for DLink DNS-327L

Hi Andrew,

On 20/05/2015 13:00, Sebastian Hesselbarth wrote:
> On 20.05.2015 12:20, Andrew wrote:
>> Sebastian Hesselbarth писал 20.05.2015 12:05:
>>> On 19.05.2015 23:10, Andrew Andrianov wrote:
>>>> DNS-327L is a 2-bay NAS with the following specs:
>>> [...]
>>>> Signed-off-by: Andrew Andrianov <[email protected]>
>>>> ---
>>>> arch/arm/boot/dts/Makefile | 1 +
>>>> arch/arm/boot/dts/armada-370-dlink-dns327l.dts | 356
>>>> +++++++++++++++++++++++++
>>>> 2 files changed, 357 insertions(+)
>>>> create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>>> [...]
>>>> diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>>>> b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>>>> new file mode 100644
>>>> index 0000000..0f4555c4
>>>> --- /dev/null
>>>> +++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>>>> @@ -0,0 +1,356 @@
>>> [...]
>>>> + regulators {
>>>> + compatible = "simple-bus";
>>>> + #address-cells = <1>;
>>>> + #size-cells = <0>;
>>>> + pinctrl-0 = <&xhci_pwr_pin
>>>> + &sata_l_pwr_pin
>>>> + &sata_r_pwr_pin>;
>>>> +
>>>> + pinctrl-names = "default";
>>>
>>> I doubt pinctrl will not work as you expected. For regulators, unlike
>>> gpio-keys/leds above, this node just describes the "bus" of regulators.
>>
>> Are you sure about this moment? FYI: I've taken
>> armada-370-synology-ds213j.dts
>> as the reference which happens to list regulator pinctrl (As of 4.1-rc1)
>> just the same way:
>>
>> compatible = "simple-bus";
>> #address-cells = <1>;
>> #size-cells = <0>;
>> pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin>;
>> pinctrl-names = "default";
>> ...
>
> Well, even if it works the pinctrl should be claimed by the device that
> actually depends on it, i.e. the regulator itself.
>
>> If that's erroneous we should fix armada-370-synology-ds213j.dts as well.
>
> Most likely nobody ever noticed if that didn't work because (a) usually
> gpio functions are setup by the bootloader or (b) gpio is default reset
> value of the pinctrl registers anyway.
>
> I'd say move the pinctrl properties to regulator nodes for dns-327l now
> and we move the properties for ds213j in a separate patch.

Usually the merge windows for arm-soc is closed when the rc6 is released which should
happen at the end of this week. If you manged to send a new version this week, then I
will apply it on mvebu/dt and it should be part of our next pull request.

Thanks,

Gregory



>
> Sebastian
>
>>>> +
>>>> + usb_power: regulator@1 {
>>>> + compatible = "regulator-fixed";
>>>> + reg = <1>;
>>>> + regulator-name = "USB3.0 Port Power";
>>>> + regulator-min-microvolt = <5000000>;
>>>> + regulator-max-microvolt = <5000000>;
>>>> + enable-active-high;
>>>> + regulator-boot-on;
>>>> + regulator-always-on;
>>>> + gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
>>>
>>> Instead you'll have to put the corresponding pinctrl-0/names properties
>>> in each of the regulator nodes, i.e.
>>>
>>> pinctrl-0 = <&xhci_pwr_pin>
>>> pinctrl-names = "default";
>>>
>>> here and similar for the other regulator nodes.
>>>
>>>> + };
>>>> +
>>>> + sata_r_power: regulator@2 {
>>>> + compatible = "regulator-fixed";
>>>> + reg = <2>;
>>>> + regulator-name = "SATA-R Power";
>>>> + regulator-min-microvolt = <5000000>;
>>>> + regulator-max-microvolt = <5000000>;
>>>> + startup-delay-us = <2000000>;
>>>> + enable-active-high;
>>>> + regulator-always-on;
>>>> + regulator-boot-on;
>>>> + gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
>>>> + };
>>>> +
>>>> + sata_l_power: regulator@3 {
>>>> + compatible = "regulator-fixed";
>>>> + reg = <3>;
>>>> + regulator-name = "SATA-L Power";
>>>> + regulator-min-microvolt = <5000000>;
>>>> + regulator-max-microvolt = <5000000>;
>>>> + startup-delay-us = <4000000>;
>>>> + enable-active-high;
>>>> + regulator-always-on;
>>>> + regulator-boot-on;
>>>> + gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
>>>> + };
>>>> + };
>>>> +};
>
>


--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

2015-05-26 15:56:26

by Andrew Lunn

[permalink] [raw]
Subject: Re: [PATCH v5 1/1] ARM: mvebu: dts: Add dts file for DLink DNS-327L

On Tue, May 26, 2015 at 06:51:11PM +0300, Andrew Andrianov wrote:
> DNS-327L is a 2-bay NAS with the following specs:
> - 512MiB RAM
> - 128MiB NAND Flash
> - 1 GbE interface (Marvell PHY)
> - 1 rear USB 3.0 port (via PCIe USB 3.0 controller)
> - 2 internal SATA ports handled by the Armada 370:
> uses 2 gpios for power control
> - two front 2-color leds (amber + white) for both discs,
> controlled by the SoC
> - One white LED handled by SoC (USB)
> - 3 buttons. Power handled by weltrend, USB and
> RESET (on the bottom) are wired via GPIOs
> - Unidentified i2c device at address 0x13 (via i2cdetect)
> - UART0 providing serial console
> - Weltrend MCU serving for RTC, temperature, fan control,
> and power button handling interfaced via UART1
> (Handled via userspace dns320l-daemon)
>
> Signed-off-by: Andrew Andrianov <[email protected]>
> Acked-by: Sebastian Hesselbarth <[email protected]>

Acked-by: Andrew Lunn <[email protected]>

Andrew

> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/armada-370-dlink-dns327l.dts | 357 +++++++++++++++++++++++++
> 2 files changed, 358 insertions(+)
> create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 86217db..58fa9f6 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -624,6 +624,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
> zynq-zybo.dtb
> dtb-$(CONFIG_MACH_ARMADA_370) += \
> armada-370-db.dtb \
> + armada-370-dlink-dns327l.dtb \
> armada-370-mirabox.dtb \
> armada-370-netgear-rn102.dtb \
> armada-370-netgear-rn104.dtb \
> diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> new file mode 100644
> index 0000000..af4dc54
> --- /dev/null
> +++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> @@ -0,0 +1,357 @@
> +/*
> + * Device Tree file for D-Link DNS-327L
> + *
> + * Copyright (C) 2015, Andrew Andrianov <[email protected]>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/* Remaining unsolved:
> + * There's still some unknown device on i2c address 0x13
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include "armada-370.dtsi"
> +
> +/ {
> + model = "D-Link DNS-327L";
> + compatible = "dlink,dns327l",
> + "marvell,armada370",
> + "marvell,armada-370-xp";
> +
> + chosen {
> + stdout-path = &uart0;
> + };
> +
> + memory {
> + device_type = "memory";
> + reg = <0x00000000 0x20000000>; /* 512 MiB */
> + };
> +
> + soc {
> + ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
> + MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
> +
> + pcie-controller {
> + status = "okay";
> +
> + pcie@1,0 {
> + /* Port 0, Lane 0 */
> + status = "okay";
> + };
> +
> + pcie@2,0 {
> + /* Port 1, Lane 0 */
> + status = "okay";
> + };
> + };
> +
> + internal-regs {
> + sata@a0000 {
> + nr-ports = <2>;
> + status = "okay";
> + };
> +
> + usb@50000 {
> + status = "okay";
> + };
> +
> + nand@d0000 {
> + status = "okay";
> + num-cs = <1>;
> + marvell,nand-keep-config;
> + marvell,nand-enable-arbiter;
> + nand-on-flash-bbt;
> + nand-ecc-strength = <4>;
> + nand-ecc-step-size = <512>;
> +
> + partition@0 {
> + label = "u-boot";
> + /* 1.0 MiB */
> + reg = <0x0000000 0x100000>;
> + read-only;
> + };
> +
> + partition@100000 {
> + label = "u-boot-env";
> + /* 128 KiB */
> + reg = <0x100000 0x20000>;
> + read-only;
> + };
> +
> + partition@120000 {
> + label = "uImage";
> + /* 7 MiB */
> + reg = <0x120000 0x700000>;
> + };
> +
> + partition@820000 {
> + label = "ubifs";
> + /* ~ 84 MiB */
> + reg = <0x820000 0x54e0000>;
> + };
> +
> + /* Hardcoded into stock bootloader */
> + partition@5d00000 {
> + label = "failsafe-uImage";
> + /* 5 MiB */
> + reg = <0x5d00000 0x500000>;
> + };
> +
> + partition@6200000 {
> + label = "failsafe-fs";
> + /* 29 MiB */
> + reg = <0x6200000 0x1d00000>;
> + };
> +
> + partition@7f00000 {
> + label = "bbt";
> + /* 1 MiB for BBT */
> + reg = <0x7f00000 0x100000>;
> + };
> + };
> + };
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> + pinctrl-0 = <
> + &backup_button_pin
> + &power_button_pin
> + &reset_button_pin>;
> + pinctrl-names = "default";
> +
> + power-button {
> + label = "Power Button";
> + linux,code = <KEY_POWER>;
> + gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
> + };
> +
> + backup-button {
> + label = "Backup Button";
> + linux,code = <KEY_COPY>;
> + gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
> + };
> +
> + reset-button {
> + label = "Reset Button";
> + linux,code = <KEY_RESTART>;
> + gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> + gpio-leds {
> + compatible = "gpio-leds";
> + pinctrl-0 = <
> + &sata_l_amber_pin
> + &sata_r_amber_pin
> + &backup_led_pin
> + /* Ensure these are managed by hardware */
> + &sata_l_white_pin
> + &sata_r_white_pin>;
> +
> + pinctrl-names = "default";
> +
> + sata-r-amber-pin {
> + label = "dns327l:amber:sata-r";
> + gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
> + default-state = "keep";
> + };
> +
> + sata-l-amber-pin {
> + label = "dns327l:amber:sata-l";
> + gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
> + default-state = "keep";
> + };
> +
> + backup-led-pin {
> + label = "dns327l:white:usb";
> + gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
> + default-state = "keep";
> + };
> + };
> +
> + regulators {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + usb_power: regulator@1 {
> + compatible = "regulator-fixed";
> + reg = <1>;
> + pinctrl-0 = <&xhci_pwr_pin>;
> + pinctrl-names = "default";
> + regulator-name = "USB3.0 Port Power";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + enable-active-high;
> + regulator-boot-on;
> + regulator-always-on;
> + gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
> + };
> +
> + sata_r_power: regulator@2 {
> + compatible = "regulator-fixed";
> + reg = <2>;
> + pinctrl-0 = <&sata_r_pwr_pin>;
> + pinctrl-names = "default";
> + regulator-name = "SATA-R Power";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + startup-delay-us = <2000000>;
> + enable-active-high;
> + regulator-always-on;
> + regulator-boot-on;
> + gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
> + };
> +
> + sata_l_power: regulator@3 {
> + compatible = "regulator-fixed";
> + reg = <3>;
> + pinctrl-0 = <&sata_l_pwr_pin>;
> + pinctrl-names = "default";
> + regulator-name = "SATA-L Power";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + startup-delay-us = <4000000>;
> + enable-active-high;
> + regulator-always-on;
> + regulator-boot-on;
> + gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
> + };
> + };
> +};
> +
> +&pinctrl {
> + sata_l_white_pin: sata-l-white-pin {
> + marvell,pins = "mpp57";
> + marvell,function = "sata0";
> + };
> +
> + sata_r_white_pin: sata-r-white-pin {
> + marvell,pins = "mpp55";
> + marvell,function = "sata1";
> + };
> +
> + sata_r_amber_pin: sata-r-amber-pin {
> + marvell,pins = "mpp52";
> + marvell,function = "gpio";
> + };
> +
> + sata_l_amber_pin: sata-l-amber-pin {
> + marvell,pins = "mpp53";
> + marvell,function = "gpio";
> + };
> +
> + backup_led_pin: backup-led-pin {
> + marvell,pins = "mpp61";
> + marvell,function = "gpo";
> + };
> +
> + xhci_pwr_pin: xhci-pwr-pin {
> + marvell,pins = "mpp13";
> + marvell,function = "gpio";
> + };
> +
> + sata_r_pwr_pin: sata-r-pwr-pin {
> + marvell,pins = "mpp54";
> + marvell,function = "gpio";
> + };
> +
> + sata_l_pwr_pin: sata-l-pwr-pin {
> + marvell,pins = "mpp56";
> + marvell,function = "gpio";
> + };
> +
> + uart1_pins: uart1-pins {
> + marvell,pins = "mpp60", "mpp61";
> + marvell,function = "uart1";
> + };
> +
> + power_button_pin: power-button-pin {
> + marvell,pins = "mpp65";
> + marvell,function = "gpio";
> + };
> +
> + backup_button_pin: backup-button-pin {
> + marvell,pins = "mpp63";
> + marvell,function = "gpio";
> + };
> +
> + reset_button_pin: reset-button-pin {
> + marvell,pins = "mpp64";
> + marvell,function = "gpio";
> + };
> +};
> +
> +/* Serial console */
> +&uart0 {
> + status = "okay";
> +};
> +
> +/* Connected to Weltrend MCU */
> +&uart1 {
> + pinctrl-0 = <&uart1_pins>;
> + pinctrl-names = "default";
> + status = "okay";
> +};
> +
> +&mdio {
> + phy0: ethernet-phy@0 { /* Marvell 88E1318 */
> + reg = <0>;
> + marvell,reg-init = <0x0 0x16 0x0 0x0002>,
> + <0x0 0x19 0x0 0x0077>,
> + <0x0 0x18 0x0 0x5747>;
> + };
> +};
> +
> +&eth1 {
> + phy = <&phy0>;
> + phy-mode = "rgmii-id";
> + status = "okay";
> +};
> +
> +&i2c0 {
> + compatible = "marvell,mv64xxx-i2c";
> + clock-frequency = <100000>;
> + status = "okay";
> +};
> --
> 2.1.4
>

2015-05-26 15:52:04

by Andrew

[permalink] [raw]
Subject: [PATCH v5 0/1] ARM: mvebu: dts: Add dts file for DLink DNS-327L

Sorry for delays, nothing new inside, all stuff that was noted
previously now fixed.

Andrew Andrianov (1):
ARM: mvebu: dts: Add dts file for DLink DNS-327L

arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/armada-370-dlink-dns327l.dts | 357 +++++++++++++++++++++++++
2 files changed, 358 insertions(+)
create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts

--
2.1.4

2015-05-26 15:52:37

by Andrew

[permalink] [raw]
Subject: [PATCH v5 1/1] ARM: mvebu: dts: Add dts file for DLink DNS-327L

DNS-327L is a 2-bay NAS with the following specs:
- 512MiB RAM
- 128MiB NAND Flash
- 1 GbE interface (Marvell PHY)
- 1 rear USB 3.0 port (via PCIe USB 3.0 controller)
- 2 internal SATA ports handled by the Armada 370:
uses 2 gpios for power control
- two front 2-color leds (amber + white) for both discs,
controlled by the SoC
- One white LED handled by SoC (USB)
- 3 buttons. Power handled by weltrend, USB and
RESET (on the bottom) are wired via GPIOs
- Unidentified i2c device at address 0x13 (via i2cdetect)
- UART0 providing serial console
- Weltrend MCU serving for RTC, temperature, fan control,
and power button handling interfaced via UART1
(Handled via userspace dns320l-daemon)

Signed-off-by: Andrew Andrianov <[email protected]>
Acked-by: Sebastian Hesselbarth <[email protected]>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/armada-370-dlink-dns327l.dts | 357 +++++++++++++++++++++++++
2 files changed, 358 insertions(+)
create mode 100644 arch/arm/boot/dts/armada-370-dlink-dns327l.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 86217db..58fa9f6 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -624,6 +624,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-zybo.dtb
dtb-$(CONFIG_MACH_ARMADA_370) += \
armada-370-db.dtb \
+ armada-370-dlink-dns327l.dtb \
armada-370-mirabox.dtb \
armada-370-netgear-rn102.dtb \
armada-370-netgear-rn104.dtb \
diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
new file mode 100644
index 0000000..af4dc54
--- /dev/null
+++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
@@ -0,0 +1,357 @@
+/*
+ * Device Tree file for D-Link DNS-327L
+ *
+ * Copyright (C) 2015, Andrew Andrianov <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/* Remaining unsolved:
+ * There's still some unknown device on i2c address 0x13
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "armada-370.dtsi"
+
+/ {
+ model = "D-Link DNS-327L";
+ compatible = "dlink,dns327l",
+ "marvell,armada370",
+ "marvell,armada-370-xp";
+
+ chosen {
+ stdout-path = &uart0;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x20000000>; /* 512 MiB */
+ };
+
+ soc {
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
+ MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
+
+ pcie-controller {
+ status = "okay";
+
+ pcie@1,0 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+ };
+
+ pcie@2,0 {
+ /* Port 1, Lane 0 */
+ status = "okay";
+ };
+ };
+
+ internal-regs {
+ sata@a0000 {
+ nr-ports = <2>;
+ status = "okay";
+ };
+
+ usb@50000 {
+ status = "okay";
+ };
+
+ nand@d0000 {
+ status = "okay";
+ num-cs = <1>;
+ marvell,nand-keep-config;
+ marvell,nand-enable-arbiter;
+ nand-on-flash-bbt;
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+
+ partition@0 {
+ label = "u-boot";
+ /* 1.0 MiB */
+ reg = <0x0000000 0x100000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "u-boot-env";
+ /* 128 KiB */
+ reg = <0x100000 0x20000>;
+ read-only;
+ };
+
+ partition@120000 {
+ label = "uImage";
+ /* 7 MiB */
+ reg = <0x120000 0x700000>;
+ };
+
+ partition@820000 {
+ label = "ubifs";
+ /* ~ 84 MiB */
+ reg = <0x820000 0x54e0000>;
+ };
+
+ /* Hardcoded into stock bootloader */
+ partition@5d00000 {
+ label = "failsafe-uImage";
+ /* 5 MiB */
+ reg = <0x5d00000 0x500000>;
+ };
+
+ partition@6200000 {
+ label = "failsafe-fs";
+ /* 29 MiB */
+ reg = <0x6200000 0x1d00000>;
+ };
+
+ partition@7f00000 {
+ label = "bbt";
+ /* 1 MiB for BBT */
+ reg = <0x7f00000 0x100000>;
+ };
+ };
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <
+ &backup_button_pin
+ &power_button_pin
+ &reset_button_pin>;
+ pinctrl-names = "default";
+
+ power-button {
+ label = "Power Button";
+ linux,code = <KEY_POWER>;
+ gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
+ };
+
+ backup-button {
+ label = "Backup Button";
+ linux,code = <KEY_COPY>;
+ gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
+ };
+
+ reset-button {
+ label = "Reset Button";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <
+ &sata_l_amber_pin
+ &sata_r_amber_pin
+ &backup_led_pin
+ /* Ensure these are managed by hardware */
+ &sata_l_white_pin
+ &sata_r_white_pin>;
+
+ pinctrl-names = "default";
+
+ sata-r-amber-pin {
+ label = "dns327l:amber:sata-r";
+ gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
+ default-state = "keep";
+ };
+
+ sata-l-amber-pin {
+ label = "dns327l:amber:sata-l";
+ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+ default-state = "keep";
+ };
+
+ backup-led-pin {
+ label = "dns327l:white:usb";
+ gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+ default-state = "keep";
+ };
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usb_power: regulator@1 {
+ compatible = "regulator-fixed";
+ reg = <1>;
+ pinctrl-0 = <&xhci_pwr_pin>;
+ pinctrl-names = "default";
+ regulator-name = "USB3.0 Port Power";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ regulator-boot-on;
+ regulator-always-on;
+ gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+ };
+
+ sata_r_power: regulator@2 {
+ compatible = "regulator-fixed";
+ reg = <2>;
+ pinctrl-0 = <&sata_r_pwr_pin>;
+ pinctrl-names = "default";
+ regulator-name = "SATA-R Power";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ startup-delay-us = <2000000>;
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+ };
+
+ sata_l_power: regulator@3 {
+ compatible = "regulator-fixed";
+ reg = <3>;
+ pinctrl-0 = <&sata_l_pwr_pin>;
+ pinctrl-names = "default";
+ regulator-name = "SATA-L Power";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ startup-delay-us = <4000000>;
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&pinctrl {
+ sata_l_white_pin: sata-l-white-pin {
+ marvell,pins = "mpp57";
+ marvell,function = "sata0";
+ };
+
+ sata_r_white_pin: sata-r-white-pin {
+ marvell,pins = "mpp55";
+ marvell,function = "sata1";
+ };
+
+ sata_r_amber_pin: sata-r-amber-pin {
+ marvell,pins = "mpp52";
+ marvell,function = "gpio";
+ };
+
+ sata_l_amber_pin: sata-l-amber-pin {
+ marvell,pins = "mpp53";
+ marvell,function = "gpio";
+ };
+
+ backup_led_pin: backup-led-pin {
+ marvell,pins = "mpp61";
+ marvell,function = "gpo";
+ };
+
+ xhci_pwr_pin: xhci-pwr-pin {
+ marvell,pins = "mpp13";
+ marvell,function = "gpio";
+ };
+
+ sata_r_pwr_pin: sata-r-pwr-pin {
+ marvell,pins = "mpp54";
+ marvell,function = "gpio";
+ };
+
+ sata_l_pwr_pin: sata-l-pwr-pin {
+ marvell,pins = "mpp56";
+ marvell,function = "gpio";
+ };
+
+ uart1_pins: uart1-pins {
+ marvell,pins = "mpp60", "mpp61";
+ marvell,function = "uart1";
+ };
+
+ power_button_pin: power-button-pin {
+ marvell,pins = "mpp65";
+ marvell,function = "gpio";
+ };
+
+ backup_button_pin: backup-button-pin {
+ marvell,pins = "mpp63";
+ marvell,function = "gpio";
+ };
+
+ reset_button_pin: reset-button-pin {
+ marvell,pins = "mpp64";
+ marvell,function = "gpio";
+ };
+};
+
+/* Serial console */
+&uart0 {
+ status = "okay";
+};
+
+/* Connected to Weltrend MCU */
+&uart1 {
+ pinctrl-0 = <&uart1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&mdio {
+ phy0: ethernet-phy@0 { /* Marvell 88E1318 */
+ reg = <0>;
+ marvell,reg-init = <0x0 0x16 0x0 0x0002>,
+ <0x0 0x19 0x0 0x0077>,
+ <0x0 0x18 0x0 0x5747>;
+ };
+};
+
+&eth1 {
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
+
+&i2c0 {
+ compatible = "marvell,mv64xxx-i2c";
+ clock-frequency = <100000>;
+ status = "okay";
+};
--
2.1.4