2015-12-18 21:38:00

by Jon Mason

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Subject: [PATCH 1/3] ARM: dts: bcm5301x: Add TWD WD Support to DT

Add support for the ARM TWD Watchdog to the bcm5301x device tree. The
ARM TWD timer allocated the register space for the WDT, so this patch
necessitated shrinking that. Also, the GIC masks were added for these.

Signed-off-by: Jon Mason <[email protected]>
---
arch/arm/boot/dts/bcm5301x.dtsi | 15 ++++++++++++---
1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index 65a1309..c31fafe 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -66,10 +66,19 @@
clocks = <&periph_clk>;
};

- local-timer@20600 {
+ twd-timer@20600 {
compatible = "arm,cortex-a9-twd-timer";
- reg = <0x20600 0x100>;
- interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0x20600 0x20>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&periph_clk>;
+ };
+
+ twd-watchdog@20620 {
+ compatible = "arm,cortex-a9-twd-wdt";
+ reg = <0x20620 0x20>;
+ interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
+ IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&periph_clk>;
};

--
1.9.1


2015-12-18 21:38:03

by Jon Mason

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Subject: [PATCH 2/3] ARM: dts: bcm5301x: Add I2C support to the DT

Add I2C support to the bcm5301x Device Tree. Since no driver changes
are needed to enable this hardware, only the device tree changes are
required to make this functional.

Signed-off-by: Jon Mason <[email protected]>
---
arch/arm/boot/dts/bcm5301x.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index c31fafe..553b2ec 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -218,6 +218,15 @@
};
};

+ i2c0: i2c@18009000 {
+ compatible = "brcm,iproc-i2c";
+ reg = <0x18009000 0x50>;
+ interrupts = <GIC_SPI 121 IRQ_TYPE_NONE>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <100000>;
+ };
+
lcpll0: lcpll0@1800c100 {
#clock-cells = <1>;
compatible = "brcm,nsp-lcpll0";
--
1.9.1

2015-12-18 21:38:35

by Jon Mason

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Subject: [PATCH 3/3] arm: dts: bcm5301x: Add syscon based reboot in DT

Add the ability to reboot via a reset of the processor. This is
achieved via a write of 0x39 to the CRU Reset Register. Unfortunately,
this only resets the core and not the other IP blocks. So if possible,
other methods should be used on the individual boards.

Signed-off-by: Jon Mason <[email protected]>
---
arch/arm/boot/dts/bcm5301x.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index 553b2ec..2a482ec 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -246,6 +246,18 @@
"sata2";
};

+ cru: cru@1800c184 {
+ compatible = "syscon";
+ reg = <0x1800c184 0xc>;
+ };
+
+ reboot@1800c184 {
+ compatible ="syscon-reboot";
+ regmap = <&cru>;
+ offset = <0>;
+ mask = <0x39>;
+ };
+
nand: nand@18028000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
--
1.9.1

2015-12-18 21:45:04

by Arnd Bergmann

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Subject: Re: [PATCH 3/3] arm: dts: bcm5301x: Add syscon based reboot in DT

On Friday 18 December 2015 16:37:56 Jon Mason wrote:
> + cru: cru@1800c184 {
> + compatible = "syscon";
> + reg = <0x1800c184 0xc>;
> + };

It's unusual for a device to start at such an odd address. Are you sure
it's not a larger device starting at 0x1800c000 or 0x18000000?

Also, please provide a more specific compatible string based on the
name of the device in the data sheet. The node name in contrast should
be more generic, e.g.

cru: system-controller@1800c000 {
compatible = "brcm,bcm53010-cru", "syscon";
reg = <0x1800c000 0x400>; /* whatever the data sheet says */
};


Arnd

2015-12-18 21:51:34

by Sergei Shtylyov

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Subject: Re: [PATCH 1/3] ARM: dts: bcm5301x: Add TWD WD Support to DT

Hello.

On 12/19/2015 12:37 AM, Jon Mason wrote:

> Add support for the ARM TWD Watchdog to the bcm5301x device tree. The
> ARM TWD timer allocated the register space for the WDT, so this patch
> necessitated shrinking that. Also, the GIC masks were added for these.
>
> Signed-off-by: Jon Mason <[email protected]>
> ---
> arch/arm/boot/dts/bcm5301x.dtsi | 15 ++++++++++++---
> 1 file changed, 12 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
> index 65a1309..c31fafe 100644
> --- a/arch/arm/boot/dts/bcm5301x.dtsi
> +++ b/arch/arm/boot/dts/bcm5301x.dtsi
> @@ -66,10 +66,19 @@
> clocks = <&periph_clk>;
> };
>
> - local-timer@20600 {
> + twd-timer@20600 {

Please just "timer". The node names should be very generic, according to
the ePAPR standard.

> compatible = "arm,cortex-a9-twd-timer";
> - reg = <0x20600 0x100>;
> - interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
> + reg = <0x20600 0x20>;
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
> + IRQ_TYPE_LEVEL_HIGH)>;
> + clocks = <&periph_clk>;
> + };
> +
> + twd-watchdog@20620 {

Please, just "watchdog".

MBR, Sergei