When the kernel is configured to use the Thumb-2 instruction set
"suspend-to-memory" fails to resume while in ARM mode it works as
expected.
(I used imx_v6_v7_defconfig and deselected ARCH_MULTI_V6 and selected
THUMB2_KERNEL)
The system prints what is expected when suspending but an event of a
wakeup source does give no output.
root@colibri-imx6ull:~# echo mem > /sys/power/state
[ 58.610809] PM: suspend entry (deep)
[ 58.629354] Filesystems sync: 0.014 seconds
[ 58.653411] Freezing user space processes ... (elapsed 0.001 seconds) done.
[ 58.661941] OOM killer disabled.
[ 58.665176] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
[ 58.674028] printk: Suspending console(s) (use no_console_suspend to debug)
-> trigger wakeup event, no reaction.
It looks like the CPU resumes unconditionally in ARM instruction mode
and then chokes on the presented Thumb-2 code it should execute on resume.
With the following code change resume succeeds.
--- a/arch/arm/mach-imx/suspend-imx6.S
+++ b/arch/arm/mach-imx/suspend-imx6.S
@@ -287,11 +286,20 @@ rbc_loop:
bne rbc_loop
/* Zzz, enter stop mode */
wfi
+#ifdef CONFIG_THUMB2_KERNEL
+ /* i.MX CPUs seem to leave stop mode set to ARM instruction set */
+ .arm
+#endif
nop
nop
nop
nop
+#ifdef CONFIG_THUMB2_KERNEL
+ /* switch to Thumb2 mode */
+ sub pc, pc, #3
+ .thumb
+#endif
/*
I propose however to compile the whole file in ARM mode and have the
linker taking care of the ARM/Thumb-2 switching. This would also keep
the code working if a i.MX CPU variant exists that resumes in the same
mode in which it went to sleep.
Max Krummenacher (1):
ARM: imx: build suspend-imx6.S with arm instruction set
arch/arm/mach-imx/suspend-imx6.S | 1 +
1 file changed, 1 insertion(+)
--
2.26.2
When the kernel is configured to use the Thumb-2 instruction set
"suspend-to-memory" fails to resume. Observed on a Colibri iMX6ULL
(i.MX 6ULL) and Apalis iMX6 (i.MX 6Q).
It looks like the CPU resumes unconditionally in ARM instruction mode
and then chokes on the presented Thumb-2 code it should execute.
Fix this by using the arm instruction set for all code in
suspend-imx6.S.
Signed-off-by: Max Krummenacher <[email protected]>
---
arch/arm/mach-imx/suspend-imx6.S | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S
index 1eabf2d2834be..e06f946b75b96 100644
--- a/arch/arm/mach-imx/suspend-imx6.S
+++ b/arch/arm/mach-imx/suspend-imx6.S
@@ -67,6 +67,7 @@
#define MX6Q_CCM_CCR 0x0
.align 3
+ .arm
.macro sync_l2_cache
--
2.26.2
On Mon, Jan 11, 2021 at 5:20 PM Max Krummenacher <[email protected]> wrote:
>
> When the kernel is configured to use the Thumb-2 instruction set
> "suspend-to-memory" fails to resume. Observed on a Colibri iMX6ULL
> (i.MX 6ULL) and Apalis iMX6 (i.MX 6Q).
>
> It looks like the CPU resumes unconditionally in ARM instruction mode
> and then chokes on the presented Thumb-2 code it should execute.
>
> Fix this by using the arm instruction set for all code in
> suspend-imx6.S.
>
> Signed-off-by: Max Krummenacher <[email protected]>
Acked-by: Oleksandr Suvorov <[email protected]>
>
> ---
>
> arch/arm/mach-imx/suspend-imx6.S | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S
> index 1eabf2d2834be..e06f946b75b96 100644
> --- a/arch/arm/mach-imx/suspend-imx6.S
> +++ b/arch/arm/mach-imx/suspend-imx6.S
> @@ -67,6 +67,7 @@
> #define MX6Q_CCM_CCR 0x0
>
> .align 3
> + .arm
>
> .macro sync_l2_cache
>
> --
> 2.26.2
>
--
Best regards
Oleksandr Suvorov
[email protected]
Resent due to gmail adding HTML, sorry for the noise.
Am Montag, den 11.01.2021, 18:49 +0100 schrieb
Ahmad Fatoum:
>
> On 11.01.21 16:17, Max Krummenacher wrote:
> > When the kernel is configured to use the Thumb-2 instruction set
> > "suspend-to-memory" fails to resume. Observed on a Colibri iMX6ULL
> > (i.MX 6ULL) and Apalis iMX6 (i.MX 6Q).
> >
> > It looks like the CPU resumes unconditionally in ARM instruction mode
> > and then chokes on the presented Thumb-2 code it should execute.
> >
> > Fix this by using the arm instruction set for all code in
> > suspend-imx6.S.
> >
> > Signed-off-by: Max Krummenacher <[email protected]>
> >
> > ---
> >
> > arch/arm/mach-imx/suspend-imx6.S | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S
> > index 1eabf2d2834be..e06f946b75b96 100644
> > --- a/arch/arm/mach-imx/suspend-imx6.S
> > +++ b/arch/arm/mach-imx/suspend-imx6.S
> > @@ -67,6 +67,7 @@
> > #define MX6Q_CCM_CCR 0x0
> >
> > .align 3
> > + .arm
>
> You had a return to thumb at the end of this subroutine in the cover letter,
> yet here it's omitted. Why?
Now the whole subroutine is compiled for ARM and the return address has bit
0 set so that on jumping back to the caller the CPU will switch back to
Thumb-2.
Probably the return to Thumb-2 isn't needed in the cover letter solution
and it would also work to finish the subroutine in ARM instruction set.
However it looks strange to me if a function which begins with the ARM
instruction set would come to the return in Thumb-2.
>
> >
> > .macro sync_l2_cache
> >
> >
On 11.01.21 16:17, Max Krummenacher wrote:
> When the kernel is configured to use the Thumb-2 instruction set
> "suspend-to-memory" fails to resume. Observed on a Colibri iMX6ULL
> (i.MX 6ULL) and Apalis iMX6 (i.MX 6Q).
>
> It looks like the CPU resumes unconditionally in ARM instruction mode
> and then chokes on the presented Thumb-2 code it should execute.
>
> Fix this by using the arm instruction set for all code in
> suspend-imx6.S.
>
> Signed-off-by: Max Krummenacher <[email protected]>
>
> ---
>
> arch/arm/mach-imx/suspend-imx6.S | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S
> index 1eabf2d2834be..e06f946b75b96 100644
> --- a/arch/arm/mach-imx/suspend-imx6.S
> +++ b/arch/arm/mach-imx/suspend-imx6.S
> @@ -67,6 +67,7 @@
> #define MX6Q_CCM_CCR 0x0
>
> .align 3
> + .arm
You had a return to thumb at the end of this subroutine in the cover letter,
yet here it's omitted. Why?
>
> .macro sync_l2_cache
>
>
--
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On Mon, Jan 11, 2021 at 04:17:04PM +0100, Max Krummenacher wrote:
> When the kernel is configured to use the Thumb-2 instruction set
> "suspend-to-memory" fails to resume. Observed on a Colibri iMX6ULL
> (i.MX 6ULL) and Apalis iMX6 (i.MX 6Q).
>
> It looks like the CPU resumes unconditionally in ARM instruction mode
> and then chokes on the presented Thumb-2 code it should execute.
>
> Fix this by using the arm instruction set for all code in
> suspend-imx6.S.
>
> Signed-off-by: Max Krummenacher <[email protected]>
Applied, thanks.