These patches add dmac, i2s nodes, and disable mailbox.
Jianqun Xu (3):
arm64: dts: rockchip: add amba node support for RK3368 SoCs
arm64: dts: rockchip: add i2s nodes support for RK3368 SoCs
arm64: dts: rockchip: disable mailbox of RK3368 SoCs defaultly
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 70 ++++++++++++++++++++++++++++++++
1 file changed, 70 insertions(+)
--
1.9.1
Default to disable mailbox in rk3368 core dts file.
Signed-off-by: Jianqun Xu <[email protected]>
---
changes since v1:
- none
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 74fbcc2..eeb31f1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -662,6 +662,7 @@
clocks = <&cru PCLK_MAILBOX>;
clock-names = "pclk_mailbox";
#mbox-cells = <1>;
+ status = "disabled";
};
pmugrf: syscon@ff738000 {
--
1.9.1
There are two dmacs found on RK3368 SoCs, peripher dmac and bus dmac,
and the dmacs are same as previous SoCs' dmac.
Signed-off-by: Jianqun Xu <[email protected]>
---
changes since v1:
- none
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index a635adc..c9be1b2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -204,6 +204,37 @@
<&cpu_b2>, <&cpu_b3>;
};
+ amba {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ dmac_peri: dma-controller@ff250000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x0 0xff250000 0x0 0x4000>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ clocks = <&cru ACLK_DMAC_PERI>;
+ clock-names = "apb_pclk";
+ arm,pl330-broken-no-flushp;
+ peripherals-req-type-burst;
+ };
+
+ dmac_bus: dma-controller@ff600000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x0 0xff600000 0x0 0x4000>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ clocks = <&cru ACLK_DMAC_BUS>;
+ clock-names = "apb_pclk";
+ arm,pl330-broken-no-flushp;
+ peripherals-req-type-burst;
+ };
+ };
+
psci {
compatible = "arm,psci-0.2";
method = "smc";
--
1.9.1
I2S of RK3368 SoCs keep same as RK3066 SoCs found on Rockchip,
add nodes to support them.
Signed-off-by: Jianqun Xu <[email protected]>
---
changes since v1:
- fix compile error caused by dumplicate label 'i2s1'
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 38 ++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index c9be1b2..74fbcc2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -715,6 +715,30 @@
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
};
+ i2s_2ch: i2s-2ch@ff890000 {
+ compatible = "rockchip,rk3368-i2s", "rockchip,rk3066-i2s";
+ reg = <0x0 0xff890000 0x0 0x1000>;
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&dmac_bus 6>, <&dmac_bus 7>;
+ dma-names = "tx", "rx";
+ clock-names = "i2s_clk", "i2s_hclk";
+ clocks = <&cru SCLK_I2S_2CH>, <&cru HCLK_I2S_2CH>;
+ status = "disabled";
+ };
+
+ i2s_8ch: i2s-8ch@ff898000 {
+ compatible = "rockchip,rk3368-i2s", "rockchip,rk3066-i2s";
+ reg = <0x0 0xff898000 0x0 0x1000>;
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&dmac_bus 0>, <&dmac_bus 1>;
+ dma-names = "tx", "rx";
+ clock-names = "i2s_clk", "i2s_hclk";
+ clocks = <&cru SCLK_I2S_8CH>, <&cru HCLK_I2S_8CH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s_8ch_bus>;
+ status = "disabled";
+ };
+
gic: interrupt-controller@ffb71000 {
compatible = "arm,gic-400";
interrupt-controller;
@@ -917,6 +941,20 @@
};
};
+ i2s {
+ i2s_8ch_bus: i2s-8ch-bus {
+ rockchip,pins = <2 12 RK_FUNC_1 &pcfg_pull_none>,
+ <2 13 RK_FUNC_1 &pcfg_pull_none>,
+ <2 14 RK_FUNC_1 &pcfg_pull_none>,
+ <2 15 RK_FUNC_1 &pcfg_pull_none>,
+ <2 16 RK_FUNC_1 &pcfg_pull_none>,
+ <2 17 RK_FUNC_1 &pcfg_pull_none>,
+ <2 18 RK_FUNC_1 &pcfg_pull_none>,
+ <2 19 RK_FUNC_1 &pcfg_pull_none>,
+ <2 20 RK_FUNC_1 &pcfg_pull_none>;
+ };
+ };
+
pwm0 {
pwm0_pin: pwm0-pin {
rockchip,pins = <3 8 RK_FUNC_2 &pcfg_pull_none>;
--
1.9.1
Am Freitag, 17. M?rz 2017, 11:32:43 CET schrieb Jianqun Xu:
> I2S of RK3368 SoCs keep same as RK3066 SoCs found on Rockchip,
> add nodes to support them.
>
> Signed-off-by: Jianqun Xu <[email protected]>
applied for 4.12 after moving the clocks property above "dma*"
Thanks
Heiko
Am Freitag, 17. M?rz 2017, 11:32:44 CET schrieb Jianqun Xu:
> Default to disable mailbox in rk3368 core dts file.
>
> Signed-off-by: Jianqun Xu <[email protected]>
applied for 4.12
Thanks
Heiko
Am Freitag, 17. M?rz 2017, 11:32:42 CET schrieb Jianqun Xu:
> There are two dmacs found on RK3368 SoCs, peripher dmac and bus dmac,
> and the dmacs are same as previous SoCs' dmac.
>
> Signed-off-by: Jianqun Xu <[email protected]>
I've picked the identical patch from Huibin Hong instead, as he was here first.
Heiko