This series add support for usb3 controller on RK3328 SoCs.
This series don't include usb3 phy patches, and I will try
to submit usb3 phy patches individually later.
Tested on RK3328 evaluation board.
William Wu (3):
dt-bindings: usb: add DT binding for RK3328 dwc3 controller
arm64: dts: rockchip: add usb3 controller node for RK3328 SoCs
arm64: dts: rockchip: enable usb3 for RK3328 evaluation board
.../devicetree/bindings/usb/rockchip,dwc3.txt | 4 +++-
arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 9 ++++++++
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 27 ++++++++++++++++++++++
3 files changed, 39 insertions(+), 1 deletion(-)
--
2.0.0
Adds the device tree bindings description for RK3328 and
compatible USB DWC3 controller.
Signed-off-by: William Wu <[email protected]>
---
Changes in v3:
- Add this for separate usb dt-bindings patch.
Changes in v2:
- None
Documentation/devicetree/bindings/usb/rockchip,dwc3.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt b/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
index 0536a93..d6b2e47 100644
--- a/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
@@ -1,7 +1,9 @@
Rockchip SuperSpeed DWC3 USB SoC controller
Required properties:
-- compatible: should contain "rockchip,rk3399-dwc3" for rk3399 SoC
+- compatible: should be one of the following:
+ - "rockchip,rk3399-dwc3": for rk3399 SoC
+ - "rockchip,rk3328-dwc3", "rockchip,rk3399-dwc3": for rk3328 SoC
- clocks: A list of phandle + clock-specifier pairs for the
clocks listed in clock-names
- clock-names: Should contain the following:
--
2.0.0
Rockchip's RK3328 evaluation board has one USB 3.0 OTG controller,
we enable it and set it act as static xHCI host controller to
support USB 3.0 HOST on RK3328 evaluation board.
Signed-off-by: William Wu <[email protected]>
---
Changes in v3:
- None
Changes in v2:
- None
arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
index 86605ae..68e1b424 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -219,3 +219,12 @@
&usb_host0_ohci {
status = "okay";
};
+
+&usbdrd3 {
+ status = "okay";
+};
+
+&usbdrd_dwc3 {
+ dr_mode = "host";
+ status = "okay";
+};
--
2.0.0
RK3328 has one USB 3.0 OTG controller which uses DWC_USB3
core's general architecture. It can act as static xHCI host
controller, static device controller, USB 3.0/2.0 OTG basing
on ID of USB3.0 PHY.
Signed-off-by: William Wu <[email protected]>
---
Changes in v3:
- Move dt-binding changes to a separate patch.
Changes in v2:
- Modify the dwc3 quirk "snps,tx-ipgap-linecheck-dis-quirk" to
"snps,dis-tx-ipgap-linecheck-quirk"
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index e23d936..e121cfd 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -700,6 +700,33 @@
status = "disabled";
};
+ usbdrd3: usb@ff600000 {
+ compatible = "rockchip,rk3328-dwc3", "rockchip,rk3399-dwc3";
+ clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
+ <&cru ACLK_USB3OTG>;
+ clock-names = "ref_clk", "suspend_clk",
+ "bus_clk";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ usbdrd_dwc3: dwc3@ff600000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0xff600000 0x0 0x100000>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ dr_mode = "otg";
+ phy_type = "utmi_wide";
+ snps,dis_enblslpm_quirk;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ snps,dis-del-phy-power-chg-quirk;
+ snps,dis-tx-ipgap-linecheck-quirk;
+ status = "disabled";
+ };
+ };
+
gic: interrupt-controller@ff811000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
--
2.0.0
Dear Balbi & Gregkh,
在 2017年08月21日 21:36, William Wu 写道:
> Adds the device tree bindings description for RK3328 and
> compatible USB DWC3 controller.
>
> Signed-off-by: William Wu <[email protected]>
> ---
> Changes in v3:
> - Add this for separate usb dt-bindings patch.
>
> Changes in v2:
> - None
>
> Documentation/devicetree/bindings/usb/rockchip,dwc3.txt | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt b/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
> index 0536a93..d6b2e47 100644
> --- a/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
> +++ b/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
> @@ -1,7 +1,9 @@
> Rockchip SuperSpeed DWC3 USB SoC controller
>
> Required properties:
> -- compatible: should contain "rockchip,rk3399-dwc3" for rk3399 SoC
> +- compatible: should be one of the following:
> + - "rockchip,rk3399-dwc3": for rk3399 SoC
> + - "rockchip,rk3328-dwc3", "rockchip,rk3399-dwc3": for rk3328 SoC
> - clocks: A list of phandle + clock-specifier pairs for the
> clocks listed in clock-names
> - clock-names: Should contain the following:
Could you help to reviewed this patch? According to Heiko's
suggestion, this patch
need to be submitted to usb tree or at least get an Ack from you.
Thank you!
--
吴良峰 William.Wu
福建省福州市铜盘路软件大道89号软件园A区21号楼
No.21 Building, A District, No.89,software Boulevard Fuzhou,Fujian, PRC
手机: 13685012275
座机: 0591-83991906-8520
邮件:[email protected]
On Mon, Aug 21, 2017 at 09:36:04PM +0800, William Wu wrote:
> Adds the device tree bindings description for RK3328 and
> compatible USB DWC3 controller.
>
> Signed-off-by: William Wu <[email protected]>
> ---
> Changes in v3:
> - Add this for separate usb dt-bindings patch.
>
> Changes in v2:
> - None
>
> Documentation/devicetree/bindings/usb/rockchip,dwc3.txt | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
Acked-by: Rob Herring <[email protected]>