2017-12-12 20:54:43

by Megha Dey

[permalink] [raw]
Subject: Re: [PATCH V2 2/3] perf/x86/intel/bm.c: Add Intel Branch Monitoring support

On Mon, 2017-11-20 at 12:57 +0100, Peter Zijlstra wrote:
> On Fri, Nov 17, 2017 at 05:54:05PM -0800, Megha Dey wrote:
> > + mutex_lock(&bm_counter_mutex);
> > + for (i = 0; i < BM_MAX_COUNTERS; i++) {
> > + if (bm_counter_owner[i] == NULL) {
> > + counter_to_use = i;
> > + bm_counter_owner[i] = event;
> > + break;
> > + }
> > + }
> > + mutex_unlock(&bm_counter_mutex);
> > +
> > + if (counter_to_use == -1)
> > + return -EBUSY;
>
> > +static struct pmu intel_bm_pmu = {
> > + .task_ctx_nr = perf_sw_context,
> > + .attr_groups = intel_bm_attr_groups,
> > + .event_init = intel_bm_event_init,
> > + .add = intel_bm_event_add,
> > + .del = intel_bm_event_del,
> > +};
>
> Still horrid.. still no.

It seems like perf_invalid_context does not support per task monitoring:
find_get_context():
ctxn = pmu->task_ctx_nr;
if (ctxn < 0)
goto errout;

Also, perf_hw_context is to be used only for core PMU, correct?

That leaves us with only perf_sw_context to be used. Not sure if a new
context needs to be implemented.



2017-12-12 22:33:22

by Peter Zijlstra

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Subject: Re: [PATCH V2 2/3] perf/x86/intel/bm.c: Add Intel Branch Monitoring support

On Tue, Dec 12, 2017 at 01:10:57PM -0800, Megha Dey wrote:
> On Mon, 2017-11-20 at 12:57 +0100, Peter Zijlstra wrote:
> > On Fri, Nov 17, 2017 at 05:54:05PM -0800, Megha Dey wrote:
> > > + mutex_lock(&bm_counter_mutex);
> > > + for (i = 0; i < BM_MAX_COUNTERS; i++) {
> > > + if (bm_counter_owner[i] == NULL) {
> > > + counter_to_use = i;
> > > + bm_counter_owner[i] = event;
> > > + break;
> > > + }
> > > + }
> > > + mutex_unlock(&bm_counter_mutex);
> > > +
> > > + if (counter_to_use == -1)
> > > + return -EBUSY;
> >
> > > +static struct pmu intel_bm_pmu = {
> > > + .task_ctx_nr = perf_sw_context,
> > > + .attr_groups = intel_bm_attr_groups,
> > > + .event_init = intel_bm_event_init,
> > > + .add = intel_bm_event_add,
> > > + .del = intel_bm_event_del,
> > > +};
> >
> > Still horrid.. still no.
>
> It seems like perf_invalid_context does not support per task monitoring:
> find_get_context():
> ctxn = pmu->task_ctx_nr;
> if (ctxn < 0)
> goto errout;
>
> Also, perf_hw_context is to be used only for core PMU, correct?
>
> That leaves us with only perf_sw_context to be used. Not sure if a new
> context needs to be implemented.

There's work on the way to allow multiple HW PMUs. You'll either have to
wait for that or help in making that happen. What you do not do is
silently hack around it.

2017-12-12 22:51:48

by Megha Dey

[permalink] [raw]
Subject: Re: [PATCH V2 2/3] perf/x86/intel/bm.c: Add Intel Branch Monitoring support

On Tue, 2017-12-12 at 23:32 +0100, Peter Zijlstra wrote:
> On Tue, Dec 12, 2017 at 01:10:57PM -0800, Megha Dey wrote:
> > On Mon, 2017-11-20 at 12:57 +0100, Peter Zijlstra wrote:
> > > On Fri, Nov 17, 2017 at 05:54:05PM -0800, Megha Dey wrote:
> > > > + mutex_lock(&bm_counter_mutex);
> > > > + for (i = 0; i < BM_MAX_COUNTERS; i++) {
> > > > + if (bm_counter_owner[i] == NULL) {
> > > > + counter_to_use = i;
> > > > + bm_counter_owner[i] = event;
> > > > + break;
> > > > + }
> > > > + }
> > > > + mutex_unlock(&bm_counter_mutex);
> > > > +
> > > > + if (counter_to_use == -1)
> > > > + return -EBUSY;
> > >
> > > > +static struct pmu intel_bm_pmu = {
> > > > + .task_ctx_nr = perf_sw_context,
> > > > + .attr_groups = intel_bm_attr_groups,
> > > > + .event_init = intel_bm_event_init,
> > > > + .add = intel_bm_event_add,
> > > > + .del = intel_bm_event_del,
> > > > +};
> > >
> > > Still horrid.. still no.
> >
> > It seems like perf_invalid_context does not support per task monitoring:
> > find_get_context():
> > ctxn = pmu->task_ctx_nr;
> > if (ctxn < 0)
> > goto errout;
> >
> > Also, perf_hw_context is to be used only for core PMU, correct?
> >
> > That leaves us with only perf_sw_context to be used. Not sure if a new
> > context needs to be implemented.
>
> There's work on the way to allow multiple HW PMUs. You'll either have to
> wait for that or help in making that happen. What you do not do is
> silently hack around it.

Could I get a pointer to the code implementing this?

I assume that this patch cannot be accepted until there is a way to
allow multiple HW PMUs even if appropriate comments are added?

2017-12-13 07:22:28

by Peter Zijlstra

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Subject: Re: [PATCH V2 2/3] perf/x86/intel/bm.c: Add Intel Branch Monitoring support

On Tue, Dec 12, 2017 at 03:08:00PM -0800, Megha Dey wrote:
> >
> > There's work on the way to allow multiple HW PMUs. You'll either have to
> > wait for that or help in making that happen. What you do not do is
> > silently hack around it.
>
> Could I get a pointer to the code implementing this?
>

There isn't much code now; but it could be build on top of the stuff
here:

git://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git perf/core

It was mostly Mark I think who wanted this for big litte stuffs.

2017-12-20 21:07:28

by Megha Dey

[permalink] [raw]
Subject: Re: [PATCH V2 2/3] perf/x86/intel/bm.c: Add Intel Branch Monitoring support

On Wed, 2017-12-13 at 08:21 +0100, Peter Zijlstra wrote:
> On Tue, Dec 12, 2017 at 03:08:00PM -0800, Megha Dey wrote:
> > >
> > > There's work on the way to allow multiple HW PMUs. You'll either have to
> > > wait for that or help in making that happen. What you do not do is
> > > silently hack around it.
> >
> > Could I get a pointer to the code implementing this?
> >
>
> There isn't much code now; but it could be build on top of the stuff
> here:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git perf/core
>
> It was mostly Mark I think who wanted this for big litte stuffs.

Could you give us an estimate on the amount of time it could take to
implement this?

I am not sure what the current status is or if Mark has been working on
it.


2018-04-04 21:18:03

by Megha Dey

[permalink] [raw]
Subject: Re: [PATCH V2 2/3] perf/x86/intel/bm.c: Add Intel Branch Monitoring support

On Wed, 2017-12-20 at 13:23 -0800, Megha Dey wrote:
> On Wed, 2017-12-13 at 08:21 +0100, Peter Zijlstra wrote:
> > On Tue, Dec 12, 2017 at 03:08:00PM -0800, Megha Dey wrote:
> > > >
> > > > There's work on the way to allow multiple HW PMUs. You'll either have to
> > > > wait for that or help in making that happen. What you do not do is
> > > > silently hack around it.
> > >
> > > Could I get a pointer to the code implementing this?
> > >
> >
> > There isn't much code now; but it could be build on top of the stuff
> > here:
> >
> > git://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git perf/core
> >
> > It was mostly Mark I think who wanted this for big litte stuffs.
>
> Could you give us an estimate on the amount of time it could take to
> implement this?
>
> I am not sure what the current status is or if Mark has been working on
> it.
>

Hi Peter,

Is there anyone currently working on this?