From: Sean Wang <[email protected]>
document the binding for enabling SCPSYS on MediaTek MT7623 and MT7623A
SoC. Where MT7623 SoC has the same definition about power domains with
MT2701, so it's fine to using MT2701 ones as MT7623's fallback.
Signed-off-by: Sean Wang <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
Documentation/devicetree/bindings/soc/mediatek/scpsys.txt | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
index 76bf45b..d6fe16f 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
+++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
@@ -21,6 +21,8 @@ Required properties:
- "mediatek,mt2712-scpsys"
- "mediatek,mt6797-scpsys"
- "mediatek,mt7622-scpsys"
+ - "mediatek,mt7623-scpsys", "mediatek,mt2701-scpsys": For MT7623 SoC
+ - "mediatek,mt7623a-scpsys": For MT7623A SoC
- "mediatek,mt8173-scpsys"
- #power-domain-cells: Must be 1
- reg: Address range of the SCPSYS unit
@@ -28,10 +30,11 @@ Required properties:
- clock, clock-names: clocks according to the common clock binding.
These are clocks which hardware needs to be
enabled before enabling certain power domains.
- Required clocks for MT2701: "mm", "mfg", "ethif"
+ Required clocks for MT2701 or MT7623: "mm", "mfg", "ethif"
Required clocks for MT2712: "mm", "mfg", "venc", "jpgdec", "audio", "vdec"
Required clocks for MT6797: "mm", "mfg", "vdec"
Required clocks for MT7622: "hif_sel"
+ Required clocks for MT7622A: "ethif"
Required clocks for MT8173: "mm", "mfg", "venc", "venc_lt"
Optional properties:
--
2.7.4
From: Sean Wang <[email protected]>
Add SCPSYS power domain driver for MT7623A SoC. The MT7623A's power
domains are the subset of MT7623 SoC's ones. As MT7623 SoC has full
features whereas MT7623A is being designed just for router applications.
Thus, MT7623A doesn't include those power domains multimedia function
belongs to. In order to avoid certain errors undoubtedly happening at
registering those power domains on MT7623A SoC using the existing MT7623
SCPSYS driver, it's required to define another setup specifically for
MT7623A SoC.
Signed-off-by: Sean Wang <[email protected]>
---
drivers/soc/mediatek/mtk-scpsys.c | 55 +++++++++++++++++++++++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c
index 5346f33..fc55faa 100644
--- a/drivers/soc/mediatek/mtk-scpsys.c
+++ b/drivers/soc/mediatek/mtk-scpsys.c
@@ -24,6 +24,7 @@
#include <dt-bindings/power/mt2712-power.h>
#include <dt-bindings/power/mt6797-power.h>
#include <dt-bindings/power/mt7622-power.h>
+#include <dt-bindings/power/mt7623a-power.h>
#include <dt-bindings/power/mt8173-power.h>
#define SPM_VDE_PWR_CON 0x0210
@@ -795,6 +796,47 @@ static const struct scp_domain_data scp_domain_data_mt7622[] = {
};
/*
+ * MT7623A power domain support
+ */
+
+static const struct scp_domain_data scp_domain_data_mt7623a[] = {
+ [MT7623A_POWER_DOMAIN_CONN] = {
+ .name = "conn",
+ .sta_mask = PWR_STATUS_CONN,
+ .ctl_offs = SPM_CONN_PWR_CON,
+ .bus_prot_mask = MT2701_TOP_AXI_PROT_EN_CONN_M |
+ MT2701_TOP_AXI_PROT_EN_CONN_S,
+ .clk_id = {CLK_NONE},
+ .active_wakeup = true,
+ },
+ [MT7623A_POWER_DOMAIN_ETH] = {
+ .name = "eth",
+ .sta_mask = PWR_STATUS_ETH,
+ .ctl_offs = SPM_ETH_PWR_CON,
+ .sram_pdn_bits = GENMASK(11, 8),
+ .sram_pdn_ack_bits = GENMASK(15, 12),
+ .clk_id = {CLK_ETHIF},
+ .active_wakeup = true,
+ },
+ [MT7623A_POWER_DOMAIN_HIF] = {
+ .name = "hif",
+ .sta_mask = PWR_STATUS_HIF,
+ .ctl_offs = SPM_HIF_PWR_CON,
+ .sram_pdn_bits = GENMASK(11, 8),
+ .sram_pdn_ack_bits = GENMASK(15, 12),
+ .clk_id = {CLK_ETHIF},
+ .active_wakeup = true,
+ },
+ [MT7623A_POWER_DOMAIN_IFR_MSC] = {
+ .name = "ifr_msc",
+ .sta_mask = PWR_STATUS_IFR_MSC,
+ .ctl_offs = SPM_IFR_MSC_PWR_CON,
+ .clk_id = {CLK_NONE},
+ .active_wakeup = true,
+ },
+};
+
+/*
* MT8173 power domain support
*/
@@ -935,6 +977,16 @@ static const struct scp_soc_data mt7622_data = {
.bus_prot_reg_update = true,
};
+static const struct scp_soc_data mt7623a_data = {
+ .domains = scp_domain_data_mt7623a,
+ .num_domains = ARRAY_SIZE(scp_domain_data_mt7623a),
+ .regs = {
+ .pwr_sta_offs = SPM_PWR_STATUS,
+ .pwr_sta2nd_offs = SPM_PWR_STATUS_2ND
+ },
+ .bus_prot_reg_update = true,
+};
+
static const struct scp_soc_data mt8173_data = {
.domains = scp_domain_data_mt8173,
.num_domains = ARRAY_SIZE(scp_domain_data_mt8173),
@@ -965,6 +1017,9 @@ static const struct of_device_id of_scpsys_match_tbl[] = {
.compatible = "mediatek,mt7622-scpsys",
.data = &mt7622_data,
}, {
+ .compatible = "mediatek,mt7623a-scpsys",
+ .data = &mt7623a_data,
+ }, {
.compatible = "mediatek,mt8173-scpsys",
.data = &mt8173_data,
}, {
--
2.7.4
From: Sean Wang <[email protected]>
use a meaningful definition for bus_prot_mask instead of just hardcoded
for it.
Signed-off-by: Sean Wang <[email protected]>
---
drivers/soc/mediatek/mtk-scpsys.c | 5 +++--
include/linux/soc/mediatek/infracfg.h | 4 ++++
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c
index 435ce5e..5346f33 100644
--- a/drivers/soc/mediatek/mtk-scpsys.c
+++ b/drivers/soc/mediatek/mtk-scpsys.c
@@ -518,7 +518,8 @@ static const struct scp_domain_data scp_domain_data_mt2701[] = {
.name = "conn",
.sta_mask = PWR_STATUS_CONN,
.ctl_offs = SPM_CONN_PWR_CON,
- .bus_prot_mask = 0x0104,
+ .bus_prot_mask = MT2701_TOP_AXI_PROT_EN_CONN_M |
+ MT2701_TOP_AXI_PROT_EN_CONN_S,
.clk_id = {CLK_NONE},
.active_wakeup = true,
},
@@ -528,7 +529,7 @@ static const struct scp_domain_data scp_domain_data_mt2701[] = {
.ctl_offs = SPM_DIS_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
.clk_id = {CLK_MM},
- .bus_prot_mask = 0x0002,
+ .bus_prot_mask = MT2701_TOP_AXI_PROT_EN_MM_M0,
.active_wakeup = true,
},
[MT2701_POWER_DOMAIN_MFG] = {
diff --git a/include/linux/soc/mediatek/infracfg.h b/include/linux/soc/mediatek/infracfg.h
index b0a507d..fd25f01 100644
--- a/include/linux/soc/mediatek/infracfg.h
+++ b/include/linux/soc/mediatek/infracfg.h
@@ -21,6 +21,10 @@
#define MT8173_TOP_AXI_PROT_EN_MFG_M1 BIT(22)
#define MT8173_TOP_AXI_PROT_EN_MFG_SNOOP_OUT BIT(23)
+#define MT2701_TOP_AXI_PROT_EN_MM_M0 BIT(1)
+#define MT2701_TOP_AXI_PROT_EN_CONN_M BIT(2)
+#define MT2701_TOP_AXI_PROT_EN_CONN_S BIT(8)
+
#define MT7622_TOP_AXI_PROT_EN_ETHSYS (BIT(3) | BIT(17))
#define MT7622_TOP_AXI_PROT_EN_HIF0 (BIT(24) | BIT(25))
#define MT7622_TOP_AXI_PROT_EN_HIF1 (BIT(26) | BIT(27) | \
--
2.7.4
From: Sean Wang <[email protected]>
Add relevant header files required for dt-bindings of SCPSYS power domain
control for subsystems found on MT7623A SoC.
v1 -> v2: fix typos and treat the patch as a dt-binding patch
Signed-off-by: Sean Wang <[email protected]>
Cc: Rob Herring <[email protected]>
---
include/dt-bindings/power/mt7623a-power.h | 10 ++++++++++
1 file changed, 10 insertions(+)
create mode 100644 include/dt-bindings/power/mt7623a-power.h
diff --git a/include/dt-bindings/power/mt7623a-power.h b/include/dt-bindings/power/mt7623a-power.h
new file mode 100644
index 0000000..2544822
--- /dev/null
+++ b/include/dt-bindings/power/mt7623a-power.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _DT_BINDINGS_POWER_MT7623A_POWER_H
+#define _DT_BINDINGS_POWER_MT7623A_POWER_H
+
+#define MT7623A_POWER_DOMAIN_CONN 0
+#define MT7623A_POWER_DOMAIN_ETH 1
+#define MT7623A_POWER_DOMAIN_HIF 2
+#define MT7623A_POWER_DOMAIN_IFR_MSC 3
+
+#endif /* _DT_BINDINGS_POWER_MT7623A_POWER_H */
--
2.7.4
On 7 February 2018 at 11:22, <[email protected]> wrote:
> From: Sean Wang <[email protected]>
>
> document the binding for enabling SCPSYS on MediaTek MT7623 and MT7623A
> SoC. Where MT7623 SoC has the same definition about power domains with
> MT2701, so it's fine to using MT2701 ones as MT7623's fallback.
>
> Signed-off-by: Sean Wang <[email protected]>
> Reviewed-by: Rob Herring <[email protected]>
For the series:
Reviewed-by: Ulf Hansson <[email protected]>
Kind regards
Uffe
> ---
> Documentation/devicetree/bindings/soc/mediatek/scpsys.txt | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
> index 76bf45b..d6fe16f 100644
> --- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
> +++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
> @@ -21,6 +21,8 @@ Required properties:
> - "mediatek,mt2712-scpsys"
> - "mediatek,mt6797-scpsys"
> - "mediatek,mt7622-scpsys"
> + - "mediatek,mt7623-scpsys", "mediatek,mt2701-scpsys": For MT7623 SoC
> + - "mediatek,mt7623a-scpsys": For MT7623A SoC
> - "mediatek,mt8173-scpsys"
> - #power-domain-cells: Must be 1
> - reg: Address range of the SCPSYS unit
> @@ -28,10 +30,11 @@ Required properties:
> - clock, clock-names: clocks according to the common clock binding.
> These are clocks which hardware needs to be
> enabled before enabling certain power domains.
> - Required clocks for MT2701: "mm", "mfg", "ethif"
> + Required clocks for MT2701 or MT7623: "mm", "mfg", "ethif"
> Required clocks for MT2712: "mm", "mfg", "venc", "jpgdec", "audio", "vdec"
> Required clocks for MT6797: "mm", "mfg", "vdec"
> Required clocks for MT7622: "hif_sel"
> + Required clocks for MT7622A: "ethif"
> Required clocks for MT8173: "mm", "mfg", "venc", "venc_lt"
>
> Optional properties:
> --
> 2.7.4
>
On Wed, Feb 07, 2018 at 06:22:48PM +0800, [email protected] wrote:
> From: Sean Wang <[email protected]>
>
> Add relevant header files required for dt-bindings of SCPSYS power domain
> control for subsystems found on MT7623A SoC.
>
> v1 -> v2: fix typos and treat the patch as a dt-binding patch
>
> Signed-off-by: Sean Wang <[email protected]>
> Cc: Rob Herring <[email protected]>
> ---
> include/dt-bindings/power/mt7623a-power.h | 10 ++++++++++
> 1 file changed, 10 insertions(+)
> create mode 100644 include/dt-bindings/power/mt7623a-power.h
Reviewed-by: Rob Herring <[email protected]>
Hi, Matthias
just a gentle ping to the four related patches
Sean
On Wed, 2018-02-07 at 18:22 +0800, [email protected] wrote:
> From: Sean Wang <[email protected]>
>
> document the binding for enabling SCPSYS on MediaTek MT7623 and MT7623A
> SoC. Where MT7623 SoC has the same definition about power domains with
> MT2701, so it's fine to using MT2701 ones as MT7623's fallback.
>
> Signed-off-by: Sean Wang <[email protected]>
> Reviewed-by: Rob Herring <[email protected]>
> ---
> Documentation/devicetree/bindings/soc/mediatek/scpsys.txt | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
> index 76bf45b..d6fe16f 100644
> --- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
> +++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
> @@ -21,6 +21,8 @@ Required properties:
> - "mediatek,mt2712-scpsys"
> - "mediatek,mt6797-scpsys"
> - "mediatek,mt7622-scpsys"
> + - "mediatek,mt7623-scpsys", "mediatek,mt2701-scpsys": For MT7623 SoC
> + - "mediatek,mt7623a-scpsys": For MT7623A SoC
> - "mediatek,mt8173-scpsys"
> - #power-domain-cells: Must be 1
> - reg: Address range of the SCPSYS unit
> @@ -28,10 +30,11 @@ Required properties:
> - clock, clock-names: clocks according to the common clock binding.
> These are clocks which hardware needs to be
> enabled before enabling certain power domains.
> - Required clocks for MT2701: "mm", "mfg", "ethif"
> + Required clocks for MT2701 or MT7623: "mm", "mfg", "ethif"
> Required clocks for MT2712: "mm", "mfg", "venc", "jpgdec", "audio", "vdec"
> Required clocks for MT6797: "mm", "mfg", "vdec"
> Required clocks for MT7622: "hif_sel"
> + Required clocks for MT7622A: "ethif"
> Required clocks for MT8173: "mm", "mfg", "venc", "venc_lt"
>
> Optional properties:
On 03/07/2018 10:17 AM, Sean Wang wrote:
> Hi, Matthias
>
> just a gentle ping to the four related patches
>
All four pushed with Ulf's reviewed-by to v4.16-next/soc
Thanks a lot!
> Sean
>
> On Wed, 2018-02-07 at 18:22 +0800, [email protected] wrote:
>> From: Sean Wang <[email protected]>
>>
>> document the binding for enabling SCPSYS on MediaTek MT7623 and MT7623A
>> SoC. Where MT7623 SoC has the same definition about power domains with
>> MT2701, so it's fine to using MT2701 ones as MT7623's fallback.
>>
>> Signed-off-by: Sean Wang <[email protected]>
>> Reviewed-by: Rob Herring <[email protected]>
>> ---
>> Documentation/devicetree/bindings/soc/mediatek/scpsys.txt | 5 ++++-
>> 1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
>> index 76bf45b..d6fe16f 100644
>> --- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
>> +++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
>> @@ -21,6 +21,8 @@ Required properties:
>> - "mediatek,mt2712-scpsys"
>> - "mediatek,mt6797-scpsys"
>> - "mediatek,mt7622-scpsys"
>> + - "mediatek,mt7623-scpsys", "mediatek,mt2701-scpsys": For MT7623 SoC
>> + - "mediatek,mt7623a-scpsys": For MT7623A SoC
>> - "mediatek,mt8173-scpsys"
>> - #power-domain-cells: Must be 1
>> - reg: Address range of the SCPSYS unit
>> @@ -28,10 +30,11 @@ Required properties:
>> - clock, clock-names: clocks according to the common clock binding.
>> These are clocks which hardware needs to be
>> enabled before enabling certain power domains.
>> - Required clocks for MT2701: "mm", "mfg", "ethif"
>> + Required clocks for MT2701 or MT7623: "mm", "mfg", "ethif"
>> Required clocks for MT2712: "mm", "mfg", "venc", "jpgdec", "audio", "vdec"
>> Required clocks for MT6797: "mm", "mfg", "vdec"
>> Required clocks for MT7622: "hif_sel"
>> + Required clocks for MT7622A: "ethif"
>> Required clocks for MT8173: "mm", "mfg", "venc", "venc_lt"
>>
>> Optional properties:
>
>