2018-07-16 15:00:14

by Ryder Lee

Subject: [PATCH v1 1/2] arm64: dts: mt7622: add some misc device nodes

Add some misc nodes support - timer and ARM CCI-400.

Signed-off-by: Ryder Lee <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt7622.dtsi | 36 ++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
index 9213c96..8cdec52 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -217,6 +217,16 @@
#reset-cells = <1>;
};

+ timer: timer@10004000 {
+ compatible = "mediatek,mt7622-timer",
+ "mediatek,mt6577-timer";
+ reg = <0 0x10004000 0 0x80>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&infracfg CLK_INFRA_APXGPT_PD>,
+ <&topckgen CLK_TOP_RTC>;
+ clock-names = "system-clk", "rtc-clk";
+ };
+
scpsys: scpsys@10006000 {
compatible = "mediatek,mt7622-scpsys",
"syscon";
@@ -317,6 +327,32 @@
<0 0x10360000 0 0x2000>;
};

+ cci: cci@10390000 {
+ compatible = "arm,cci-400";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0 0x10390000 0 0x1000>;
+ ranges = <0 0 0x10390000 0x10000>;
+
+ cci_control0: slave-if@1000 {
+ compatible = "arm,cci-400-ctrl-if";
+ interface-type = "ace-lite";
+ reg = <0x1000 0x1000>;
+ };
+
+ cci_control1: slave-if@4000 {
+ compatible = "arm,cci-400-ctrl-if";
+ interface-type = "ace";
+ reg = <0x4000 0x1000>;
+ };
+
+ cci_control2: slave-if@5000 {
+ compatible = "arm,cci-400-ctrl-if";
+ interface-type = "ace";
+ reg = <0x5000 0x1000>;
+ };
+ };
+
auxadc: adc@11001000 {
compatible = "mediatek,mt7622-auxadc";
reg = <0 0x11001000 0 0x1000>;
--
1.9.1

2018-07-16 15:00:42

by Ryder Lee

Subject: [PATCH v1 2/2] arm64: dts: mt7622: update a clock property for UART0

The input clock of UART0 should be CLK_PERI_UART0_PD.

Fixes: 13f36c326cef ("arm64: dts: mt7622: turn uart0 clock to real ones")
Signed-off-by: Ryder Lee <[email protected]>
---
change since v1:
- add Fixes tag.
---
arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
index 8cdec52..4caa9b4 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -367,7 +367,7 @@
reg = <0 0x11002000 0 0x400>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
clocks = <&topckgen CLK_TOP_UART_SEL>,
- <&pericfg CLK_PERI_UART1_PD>;
+ <&pericfg CLK_PERI_UART0_PD>;
clock-names = "baud", "bus";
status = "disabled";
};
--
1.9.1

2018-07-17 07:56:37

by Matthias Brugger

Subject: Re: [PATCH v1 1/2] arm64: dts: mt7622: add some misc device nodes

Hi Ryder,

On 16/07/18 16:59, Ryder Lee wrote:
> Add some misc nodes support - timer and ARM CCI-400.
>
> Signed-off-by: Ryder Lee <[email protected]>
> ---
> arch/arm64/boot/dts/mediatek/mt7622.dtsi | 36 ++++++++++++++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> index 9213c96..8cdec52 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> @@ -217,6 +217,16 @@
> #reset-cells = <1>;
> };
>
> + timer: timer@10004000 {
> + compatible = "mediatek,mt7622-timer",
> + "mediatek,mt6577-timer";
> + reg = <0 0x10004000 0 0x80>;
> + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&infracfg CLK_INFRA_APXGPT_PD>,
> + <&topckgen CLK_TOP_RTC>;
> + clock-names = "system-clk", "rtc-clk";
> + };
> +
> scpsys: scpsys@10006000 {
> compatible = "mediatek,mt7622-scpsys",
> "syscon";
> @@ -317,6 +327,32 @@
> <0 0x10360000 0 0x2000>;
> };
>
> + cci: cci@10390000 {
> + compatible = "arm,cci-400";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0 0x10390000 0 0x1000>;
> + ranges = <0 0 0x10390000 0x10000>;

From my understanding of the binding description ranges should hold child
address, parent address and size of the region in the child address space. I can
see in arch/arm64 two different variants using 4 ranges values (like here) and
using three values.

@Rob + Will what is the preferred way to describe this?

> +
> + cci_control0: slave-if@1000 {
> + compatible = "arm,cci-400-ctrl-if";
> + interface-type = "ace-lite";
> + reg = <0x1000 0x1000>;
> + };

Don't we need to add phandles to the cci-control-port property in the cpu nodes?

Regards,
Matthias

> +
> + cci_control1: slave-if@4000 {
> + compatible = "arm,cci-400-ctrl-if";
> + interface-type = "ace";
> + reg = <0x4000 0x1000>;
> + };
> +
> + cci_control2: slave-if@5000 {
> + compatible = "arm,cci-400-ctrl-if";
> + interface-type = "ace";
> + reg = <0x5000 0x1000>;
> + };
> + };
> +
> auxadc: adc@11001000 {
> compatible = "mediatek,mt7622-auxadc";
> reg = <0 0x11001000 0 0x1000>;
>

2018-07-17 07:58:39

by Matthias Brugger

Subject: Re: [PATCH v1 2/2] arm64: dts: mt7622: update a clock property for UART0

On 16/07/18 16:59, Ryder Lee wrote:
> The input clock of UART0 should be CLK_PERI_UART0_PD.
>
> Fixes: 13f36c326cef ("arm64: dts: mt7622: turn uart0 clock to real ones")
> Signed-off-by: Ryder Lee <[email protected]>
> ---

pused to v4.18-next/dts64

Thanks a lot!

> change since v1:
> - add Fixes tag.
> ---
> arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> index 8cdec52..4caa9b4 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> @@ -367,7 +367,7 @@
> reg = <0 0x11002000 0 0x400>;
> interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
> clocks = <&topckgen CLK_TOP_UART_SEL>,
> - <&pericfg CLK_PERI_UART1_PD>;
> + <&pericfg CLK_PERI_UART0_PD>;
> clock-names = "baud", "bus";
> status = "disabled";
> };
>

2018-07-31 08:45:04

by Ryder Lee

Subject: RE: Re: [PATCH v1 1/2] arm64: dts: mt7622: add some misc device nodes

Hi Matthias,

Sorry for the late reply.

On Tue, 2018-07-31 at 16:17 +0800, Ryder Lee (李庚諺) wrote:
> Hi Ryder,
>
> On 16/07/18 16:59, Ryder Lee wrote:
> > Add some misc nodes support - timer and ARM CCI-400.
> >
> > Signed-off-by: Ryder Lee <[email protected]>
> > ---
> > arch/arm64/boot/dts/mediatek/mt7622.dtsi | 36
> > ++++++++++++++++++++++++++++++++
> > 1 file changed, 36 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> > b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> > index 9213c96..8cdec52 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> > @@ -217,6 +217,16 @@
> > #reset-cells = <1>;
> > };
> >
> > + timer: timer@10004000 {
> > + compatible = "mediatek,mt7622-timer",
> > + "mediatek,mt6577-timer";
> > + reg = <0 0x10004000 0 0x80>;
> > + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&infracfg CLK_INFRA_APXGPT_PD>,
> > + <&topckgen CLK_TOP_RTC>;
> > + clock-names = "system-clk", "rtc-clk";
> > + };
> > +
> > scpsys: scpsys@10006000 {
> > compatible = "mediatek,mt7622-scpsys",
> > "syscon";
> > @@ -317,6 +327,32 @@
> > <0 0x10360000 0 0x2000>;
> > };
> >
> > + cci: cci@10390000 {
> > + compatible = "arm,cci-400";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + reg = <0 0x10390000 0 0x1000>;
> > + ranges = <0 0 0x10390000 0x10000>;
>
> From my understanding of the binding description ranges should hold child address, parent address and size of the region in the child address space. I can see in arch/arm64 two different variants using 4 ranges values (like here) and using three values.
>
> @Rob + Will what is the preferred way to describe this?

Hmmm... it's just a copy-paste (I take zynqmp.dtsi as an example).
> > +
> > + cci_control0: slave-if@1000 {
> > + compatible = "arm,cci-400-ctrl-if";
> > + interface-type = "ace-lite";
> > + reg = <0x1000 0x1000>;
> > + };
>
> Don't we need to add phandles to the cci-control-port property in the cpu nodes?
>
> Regards,
> Matthias

MT7622 use cci-400 to improve performance (DMA IO coherence) for
high-speed IPs. (i.e., ETH/WIFI/SATA/...)

I added it early but actually the related features have not supported in
mainline yet.

Ryder

2018-07-31 09:52:28

by Ryder Lee

Subject: RE: Re: [PATCH v1 1/2] arm64: dts: mt7622: add some misc device nodes

On Tue, 2018-07-31 at 16:43 +0800, Ryder Lee wrote:
> Hi Matthias,
>
> Sorry for the late reply.
>
> On Tue, 2018-07-31 at 16:17 +0800, Ryder Lee (李庚諺) wrote:
> > Hi Ryder,
> >
> > On 16/07/18 16:59, Ryder Lee wrote:
> > > Add some misc nodes support - timer and ARM CCI-400.
> > >
> > > Signed-off-by: Ryder Lee <[email protected]>
> > > ---
> > > arch/arm64/boot/dts/mediatek/mt7622.dtsi | 36
> > > ++++++++++++++++++++++++++++++++
> > > 1 file changed, 36 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> > > b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> > > index 9213c96..8cdec52 100644
> > > --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> > > +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> > > @@ -217,6 +217,16 @@
> > > #reset-cells = <1>;
> > > };
> > >
> > > + timer: timer@10004000 {
> > > + compatible = "mediatek,mt7622-timer",
> > > + "mediatek,mt6577-timer";
> > > + reg = <0 0x10004000 0 0x80>;
> > > + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>;
> > > + clocks = <&infracfg CLK_INFRA_APXGPT_PD>,
> > > + <&topckgen CLK_TOP_RTC>;
> > > + clock-names = "system-clk", "rtc-clk";
> > > + };
> > > +
> > > scpsys: scpsys@10006000 {
> > > compatible = "mediatek,mt7622-scpsys",
> > > "syscon";
> > > @@ -317,6 +327,32 @@
> > > <0 0x10360000 0 0x2000>;
> > > };
> > >
> > > + cci: cci@10390000 {
> > > + compatible = "arm,cci-400";
> > > + #address-cells = <1>;
> > > + #size-cells = <1>;
> > > + reg = <0 0x10390000 0 0x1000>;
> > > + ranges = <0 0 0x10390000 0x10000>;
> >
> > From my understanding of the binding description ranges should hold child address, parent address and size of the region in the child address space. I can see in arch/arm64 two different variants using 4 ranges values (like here) and using three values.
> >
> > @Rob + Will what is the preferred way to describe this?
>
> Hmmm... it's just a copy-paste (I take zynqmp.dtsi as an example).
> > > +
> > > + cci_control0: slave-if@1000 {
> > > + compatible = "arm,cci-400-ctrl-if";
> > > + interface-type = "ace-lite";
> > > + reg = <0x1000 0x1000>;
> > > + };
> >
> > Don't we need to add phandles to the cci-control-port property in the cpu nodes?

I forgot to answer this question in previous mail.

Yes, we need it. I will add the cci-control-port property in the cpu
nodes and add the child node PMU in cci-400 - somehow I forgot to add
them.

Thanks for your reminder.

> > Regards,
> > Matthias
>
> MT7622 use cci-400 to improve performance (DMA IO coherence) for
> high-speed IPs. (i.e., ETH/WIFI/SATA/...)
>
> I added it early but actually the related features have not supported in
> mainline yet.
>
> Ryder