by Rob Herring (Arm)

[permalink] [raw]

Subject: Re: [PATCH 2/7] dt-bindings: bus: add ASR8751C APB/AXI bindings

On Sat, Mar 23, 2019 at 10:01:23PM +0800, qiaozhou wrote:
> From: Qiao Zhou <[email protected]>
>
> Add binding documentation for ASR8751C AXI/APB bus that are used
> to interface with peripherals. AXI/APB bus follow standard AXI/APB
> protocols.
>
> Signed-off-by: qiaozhou <[email protected]>
> ---
> Documentation/devicetree/bindings/bus/asr,bus.txt | 42 +++++++++++++++++++++++
> 1 file changed, 42 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/bus/asr,bus.txt
>
> diff --git a/Documentation/devicetree/bindings/bus/asr,bus.txt b/Documentation/devicetree/bindings/bus/asr,bus.txt
> new file mode 100644
> index 0000000..cbb1b6e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/bus/asr,bus.txt
> @@ -0,0 +1,42 @@
> +* ASR AXI/APB Simple Bus
> +
> +This file documents core properties in ASR AXI and APB bus.
> +
> +The ASR8751C SoC has APB and AXI buses for cores to access its
> +controllers, suchas i2c, sdh, rtc, clock, power management registers

s/suchas/such as/

> +etc. Most ASR SoCs share the common architecture for buses.
> +Generally APB and AXI bus have a source clock and power control, and
> +clock rate can be changed and power can be shutdown in low power mode.

Then where are the clocks?

> +
> +Required properties for AXI bus:
> +- compatible: should be "asr,axi-bus", "simple-bus".
> +- #address-cells: could be 1, or 2
> +- #size-cells: could be 1, or 2
> +- reg: iomem address of AXI bus registers
> +- ranges: register ranges
> +
> +Example:
> + axi@d4200000 { /* AXI */
> + compatible = "asr,axi-bus", "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0 0xd4200000 0 0x00200000>;
> + ranges = <0 0 0 0xffffffff>;
> +
> + };
> +
> +Required properties for APB bus:
> +- compatible: should be "asr,apb-bus", "simple-bus".
> +- #address-cells: could be 1, or 2
> +- #size-cells: could be 1, or 2
> +- reg: iomem address of APB bus registers
> +- ranges: register ranges
> +
> +Example:
> + apb@d4000000 { /* APB */
> + compatible = "asr,apb-bus", "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0 0xd4000000 0 0x00200000>;
> + ranges = <0 0 0 0xffffffff>;
> + };
> --
> 2.7.4
>

2019-03-31 06:45:51

by Rob Herring (Arm)

[permalink] [raw]

Subject: Re: [PATCH 1/7] dt-bindings: arm: asr: add ASR8751C bindings

On Sat, Mar 23, 2019 at 10:01:22PM +0800, qiaozhou wrote:
> From: Qiao Zhou <[email protected]>
>
> Add new vendor for ASR and add binding document for ASR8751C SoC and initial
> board: aquilac-evb
>
> Signed-off-by: qiaozhou <[email protected]>
> ---
> Documentation/devicetree/bindings/arm/asr/asr-8751c.txt | 9 +++++++++
> Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
> 2 files changed, 10 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/asr/asr-8751c.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/asr/asr-8751c.txt b/Documentation/devicetree/bindings/arm/asr/asr-8751c.txt
> new file mode 100644
> index 0000000..af7f816
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/asr/asr-8751c.txt
> @@ -0,0 +1,9 @@
> +ASR 8751C Platforms Device Tree Bindings
> +----------------------------------------------------
> +ASR 8751C SoC
> +Required root node properties:
> + - compatible = ""asr,8751c";
> +
> +ASR 8751C AquilaC EVB Board
> +Required root node properties:
> + - compatible = "asr,aquilac-evb", "asr,8751c";

Please convert this to DT schema (yaml) format. Most other SoC families
are converted already.