Renesas SH7751 PCI Controller json-schema.
Signed-off-by: Yoshinori Sato <[email protected]>
---
.../bindings/pci/renesas,sh7751-pci.yaml | 150 ++++++++++++++++++
1 file changed, 150 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/renesas,sh7751-pci.yaml
diff --git a/Documentation/devicetree/bindings/pci/renesas,sh7751-pci.yaml b/Documentation/devicetree/bindings/pci/renesas,sh7751-pci.yaml
new file mode 100644
index 000000000000..45e5a19e7d0f
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/renesas,sh7751-pci.yaml
@@ -0,0 +1,150 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/renesas,sh7751-pci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas SH7751 PCI Host controller
+
+maintainers:
+ - Yoshinori Sato <[email protected]>
+
+allOf:
+ - $ref: /schemas/pci/pci-bus.yaml#
+
+properties:
+ compatible:
+ const: renesas,sh7751-pci
+
+ reg:
+ minItems: 2
+ maxItems: 2
+
+ reg-names:
+ items:
+ - const: PCI Controller
+ - const: Bus State Controller
+
+ "#interrupt-cells":
+ const: 1
+
+ "#address-cells":
+ const: 3
+
+ "#size-cells":
+ const: 2
+
+ ranges: true
+
+ dma-ranges: true
+
+ interrupt-controller: true
+
+ renesas,bus-arbit-round-robin:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: |
+ Set DMA bus arbitration to round robin.
+
+ pci-command-reg-fast-back-to-back:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: |
+ Set for PCI command register Fast Back-to-Back enable bit.
+
+ pci-command-reg-serr:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: |
+ Set for PCI command register SERR# enable.
+
+ pci-command-reg-wait-cycle-control:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: |
+ Set for PCI command register Wait cycle control bit.
+
+ pci-command-reg-parity-error-response:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: |
+ Set for PCI Command register Parity error response bit.
+
+ pci-command-reg-vga-snoop:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: |
+ Set for PCI Command register VGA palette snoop bit.
+
+ pci-command-reg-write-invalidate:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: |
+ Set for PCI Command register Memory write and invaldate enable bit.
+
+ pci-command-reg-special-cycle:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: |
+ Set for PCI Command register Special cycle bit.
+
+ pci-command-reg-bus-master:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: |
+ Set for PCI Command register Bus master bit.
+
+ pci-command-reg-memory-space:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: |
+ Set for PCI Command register Memory space bit.
+
+ pci-command-reg-io-space:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: |
+ Set for PCI Command register I/O space bit.
+
+ pci-bar:
+ $ref: /schemas/types.yaml#/definitions/uint32-matrix
+ description: Overwrite to PCI CONFIG Base Address Registers value.
+ items:
+ items:
+ - description: BAR register number
+ - description: BAR register value
+ minItems: 1
+ maxItems: 6
+
+required:
+ - compatible
+ - reg
+ - "#interrupt-cells"
+ - "#address-cells"
+ - "#size-cells"
+ - ranges
+ - interrupt-map
+ - interrupt-map-mask
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ pci@fe200000 {
+ compatible = "renesas,sh7751-pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ device_type = "pci";
+ bus-range = <0 0>;
+ ranges = <0x02000000 0 0xfd000000 0xfd000000 0 0x01000000>,
+ <0x01000000 0 0x00000000 0xfe240000 0 0x00040000>;
+ dma-ranges = <0x02000000 0 0xc000000 0x0c000000 0 0x04000000>;
+ reg = <0xfe200000 0x0400>,
+ <0xff800000 0x0100>;
+ interrupt-map = <0x0000 0 0 1 &julianintc 5>,
+ <0x0000 0 0 2 &julianintc 6>,
+ <0x0000 0 0 3 &julianintc 7>,
+ <0x0000 0 0 4 &julianintc 8>,
+ <0x0800 0 0 1 &julianintc 6>,
+ <0x0800 0 0 2 &julianintc 7>,
+ <0x0800 0 0 3 &julianintc 8>,
+ <0x0800 0 0 4 &julianintc 5>,
+ <0x1000 0 0 1 &julianintc 7>,
+ <0x1000 0 0 2 &julianintc 8>,
+ <0x1000 0 0 3 &julianintc 5>,
+ <0x1000 0 0 4 &julianintc 6>;
+ pci-bar = <0 0xab000001>, <2 0xd0000000>;
+ pci-command-reg-io-space;
+ interrupt-map-mask = <0x1800 0 0 7>;
+ };
--
2.39.2
Hi Yoshinori,
thanks for your patch!
On Tue, Jan 9, 2024 at 9:24 AM Yoshinori Sato
<[email protected]> wrote:
> Renesas SH7751 PCI Controller json-schema.
>
> Signed-off-by: Yoshinori Sato <[email protected]>
(...)
> + renesas,bus-arbit-round-robin:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description: |
> + Set DMA bus arbitration to round robin.
> +
> + pci-command-reg-fast-back-to-back:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description: |
> + Set for PCI command register Fast Back-to-Back enable bit.
> +
> + pci-command-reg-serr:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description: |
> + Set for PCI command register SERR# enable.
> +
> + pci-command-reg-wait-cycle-control:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description: |
> + Set for PCI command register Wait cycle control bit.
> +
> + pci-command-reg-parity-error-response:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description: |
> + Set for PCI Command register Parity error response bit.
> +
> + pci-command-reg-vga-snoop:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description: |
> + Set for PCI Command register VGA palette snoop bit.
> +
> + pci-command-reg-write-invalidate:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description: |
> + Set for PCI Command register Memory write and invaldate enable bit.
> +
> + pci-command-reg-special-cycle:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description: |
> + Set for PCI Command register Special cycle bit.
> +
> + pci-command-reg-bus-master:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description: |
> + Set for PCI Command register Bus master bit.
> +
> + pci-command-reg-memory-space:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description: |
> + Set for PCI Command register Memory space bit.
> +
> + pci-command-reg-io-space:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description: |
> + Set for PCI Command register I/O space bit.
Do you really need to configure all these things? It seems they are
just set to default values anyway?
Can't you just look at the compatible "renesas,sh7751-pci" and
set it to the values you know are needed for that compatible?
> + pci-bar:
> + $ref: /schemas/types.yaml#/definitions/uint32-matrix
> + description: Overwrite to PCI CONFIG Base Address Registers value.
> + items:
> + items:
> + - description: BAR register number
> + - description: BAR register value
> + minItems: 1
> + maxItems: 6
Same with this, isn't this always the same (hardcoded) values
for "renesas,sh7751-pci" if used?
> + interrupt-map = <0x0000 0 0 1 &julianintc 5>,
> + <0x0000 0 0 2 &julianintc 6>,
> + <0x0000 0 0 3 &julianintc 7>,
> + <0x0000 0 0 4 &julianintc 8>,
> + <0x0800 0 0 1 &julianintc 6>,
> + <0x0800 0 0 2 &julianintc 7>,
> + <0x0800 0 0 3 &julianintc 8>,
> + <0x0800 0 0 4 &julianintc 5>,
> + <0x1000 0 0 1 &julianintc 7>,
> + <0x1000 0 0 2 &julianintc 8>,
> + <0x1000 0 0 3 &julianintc 5>,
> + <0x1000 0 0 4 &julianintc 6>;
This interrupt-map looks very strange, usually the last cell is the polarity
flag and here it is omitted? I would expect something like:
<0x0000 0 0 1 &julianintc 5 IRQ_TYPE_LEVEL_LOW>, (...)
The interrupt-map schema in dtschema isn't really looking at this
so it is easy to get it wrong.
Yours,
Linus Walleij
On Tue, Jan 09, 2024 at 01:42:53PM +0100, Linus Walleij wrote:
> Hi Yoshinori,
>
> thanks for your patch!
>
> On Tue, Jan 9, 2024 at 9:24 AM Yoshinori Sato
> <[email protected]> wrote:
>
> > Renesas SH7751 PCI Controller json-schema.
> >
> > Signed-off-by: Yoshinori Sato <[email protected]>
> (...)
> > + renesas,bus-arbit-round-robin:
> > + $ref: /schemas/types.yaml#/definitions/flag
> > + description: |
> > + Set DMA bus arbitration to round robin.
> > +
> > + pci-command-reg-fast-back-to-back:
> > + $ref: /schemas/types.yaml#/definitions/flag
> > + description: |
> > + Set for PCI command register Fast Back-to-Back enable bit.
> > +
> > + pci-command-reg-serr:
> > + $ref: /schemas/types.yaml#/definitions/flag
> > + description: |
> > + Set for PCI command register SERR# enable.
> > +
> > + pci-command-reg-wait-cycle-control:
> > + $ref: /schemas/types.yaml#/definitions/flag
> > + description: |
> > + Set for PCI command register Wait cycle control bit.
> > +
> > + pci-command-reg-parity-error-response:
> > + $ref: /schemas/types.yaml#/definitions/flag
> > + description: |
> > + Set for PCI Command register Parity error response bit.
> > +
> > + pci-command-reg-vga-snoop:
> > + $ref: /schemas/types.yaml#/definitions/flag
> > + description: |
> > + Set for PCI Command register VGA palette snoop bit.
> > +
> > + pci-command-reg-write-invalidate:
> > + $ref: /schemas/types.yaml#/definitions/flag
> > + description: |
> > + Set for PCI Command register Memory write and invaldate enable bit.
> > +
> > + pci-command-reg-special-cycle:
> > + $ref: /schemas/types.yaml#/definitions/flag
> > + description: |
> > + Set for PCI Command register Special cycle bit.
> > +
> > + pci-command-reg-bus-master:
> > + $ref: /schemas/types.yaml#/definitions/flag
> > + description: |
> > + Set for PCI Command register Bus master bit.
> > +
> > + pci-command-reg-memory-space:
> > + $ref: /schemas/types.yaml#/definitions/flag
> > + description: |
> > + Set for PCI Command register Memory space bit.
> > +
> > + pci-command-reg-io-space:
> > + $ref: /schemas/types.yaml#/definitions/flag
> > + description: |
> > + Set for PCI Command register I/O space bit.
>
> Do you really need to configure all these things? It seems they are
> just set to default values anyway?
>
> Can't you just look at the compatible "renesas,sh7751-pci" and
> set it to the values you know are needed for that compatible?
Yes. Please drop all these.
>
> > + pci-bar:
> > + $ref: /schemas/types.yaml#/definitions/uint32-matrix
> > + description: Overwrite to PCI CONFIG Base Address Registers value.
> > + items:
> > + items:
> > + - description: BAR register number
> > + - description: BAR register value
> > + minItems: 1
> > + maxItems: 6
>
> Same with this, isn't this always the same (hardcoded) values
> for "renesas,sh7751-pci" if used?
The OpenFirmware PCI bus supplement already defines how to specify BAR
values in DT in "reg" or "assigned-addresses". If you need to specify
these, use that. Note don't expect the kernel to do anything with them.
Rob
>
> > + interrupt-map = <0x0000 0 0 1 &julianintc 5>,
> > + <0x0000 0 0 2 &julianintc 6>,
> > + <0x0000 0 0 3 &julianintc 7>,
> > + <0x0000 0 0 4 &julianintc 8>,
> > + <0x0800 0 0 1 &julianintc 6>,
> > + <0x0800 0 0 2 &julianintc 7>,
> > + <0x0800 0 0 3 &julianintc 8>,
> > + <0x0800 0 0 4 &julianintc 5>,
> > + <0x1000 0 0 1 &julianintc 7>,
> > + <0x1000 0 0 2 &julianintc 8>,
> > + <0x1000 0 0 3 &julianintc 5>,
> > + <0x1000 0 0 4 &julianintc 6>;
>
> This interrupt-map looks very strange, usually the last cell is the polarity
> flag and here it is omitted? I would expect something like:
>
> <0x0000 0 0 1 &julianintc 5 IRQ_TYPE_LEVEL_LOW>, (...)
>
> The interrupt-map schema in dtschema isn't really looking at this
> so it is easy to get it wrong.
dtc should IIRC. Maybe not in the example being incomplete.
Rob