On ARM64, when PPTT(Processor Properties Topology Table) is not
implemented in ACPI boot, we will goto 'free_ci' with the following
print:
Unable to detect cache hierarchy for CPU 0
But some other codes may still use 'num_leaves' to iterate through the
'info_list', such as get_cpu_cacheinfo_id(). If 'info_list' is NULL , it
would crash. So clear 'num_leaves' in free_cache_attributes().
Signed-off-by: Xiongfeng Wang <[email protected]>
---
v1 -> v2: Drop the Fixes tag as it doesn't fix anything in upstream.
---
drivers/base/cacheinfo.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
index bfc0959..dad2962 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c
@@ -297,6 +297,7 @@ static void free_cache_attributes(unsigned int cpu)
kfree(per_cpu_cacheinfo(cpu));
per_cpu_cacheinfo(cpu) = NULL;
+ cache_leaves(cpu) = 0;
}
int __weak init_cache_level(unsigned int cpu)
--
1.7.12.4
On Wed, Jul 14, 2021 at 09:32:55AM +0800, Xiongfeng Wang wrote:
> On ARM64, when PPTT(Processor Properties Topology Table) is not
> implemented in ACPI boot, we will goto 'free_ci' with the following
> print:
> Unable to detect cache hierarchy for CPU 0
>
> But some other codes may still use 'num_leaves' to iterate through the
> 'info_list', such as get_cpu_cacheinfo_id(). If 'info_list' is NULL , it
> would crash. So clear 'num_leaves' in free_cache_attributes().
>
Reviewed-by: Sudeep Holla <[email protected]>
--
Regards,
Sudeep