2021-11-30 16:43:21

by Kieran Bingham

[permalink] [raw]
Subject: [PATCH v5 2/2] arm64: dts: renesas: r8a779a0: falcon-cpu: Add DSI display output

Provide the display output using the sn65dsi86 MIPI DSI bridge

Reviewed-by: Laurent Pinchart <[email protected]>
Signed-off-by: Kieran Bingham <[email protected]>
---
v3:
- Fix the voltage regulator values
- No longer override the clocks
- use clk-x6 as clock node name

v4:
- No change

v5:
- Override/define dsi0_out endpoints entirely

.../boot/dts/renesas/r8a779a0-falcon-cpu.dtsi | 79 +++++++++++++++++++
1 file changed, 79 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
index cd2f0d60f21a..b82f2e53403c 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
@@ -98,6 +98,15 @@ memory@700000000 {
reg = <0x7 0x00000000 0x0 0x80000000>;
};

+ reg_1p2v: regulator-1p2v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.2V";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
@@ -115,6 +124,41 @@ reg_3p3v: regulator-3p3v {
regulator-boot-on;
regulator-always-on;
};
+
+ mini-dp-con {
+ compatible = "dp-connector";
+ label = "CN5";
+ type = "mini";
+
+ port {
+ mini_dp_con_in: endpoint {
+ remote-endpoint = <&sn65dsi86_out>;
+ };
+ };
+ };
+
+ sn65dsi86_refclk: clk-x6 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <38400000>;
+ };
+};
+
+&dsi0 {
+ status = "okay";
+
+ ports {
+ port@1 {
+ dsi0_out: endpoint {
+ remote-endpoint = <&sn65dsi86_in>;
+ data-lanes = <1 2 3 4>;
+ };
+ };
+ };
+};
+
+&du {
+ status = "okay";
};

&extal_clk {
@@ -146,6 +190,41 @@ &i2c1 {

status = "okay";
clock-frequency = <400000>;
+
+ sn65dsi86@2c {
+ compatible = "ti,sn65dsi86";
+ reg = <0x2c>;
+
+ clocks = <&sn65dsi86_refclk>;
+ clock-names = "refclk";
+
+ interrupt-parent = <&gpio1>;
+ interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
+
+ vccio-supply = <&reg_1p8v>;
+ vpll-supply = <&reg_1p8v>;
+ vcca-supply = <&reg_1p2v>;
+ vcc-supply = <&reg_1p2v>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ sn65dsi86_in: endpoint {
+ remote-endpoint = <&dsi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ sn65dsi86_out: endpoint {
+ remote-endpoint = <&mini_dp_con_in>;
+ };
+ };
+ };
+ };
};

&i2c6 {
--
2.30.2



2021-12-14 10:49:46

by Geert Uytterhoeven

[permalink] [raw]
Subject: Re: [PATCH v5 2/2] arm64: dts: renesas: r8a779a0: falcon-cpu: Add DSI display output

Hi Kieran,

On Tue, Nov 30, 2021 at 5:43 PM Kieran Bingham
<[email protected]> wrote:
> Provide the display output using the sn65dsi86 MIPI DSI bridge
>
> Reviewed-by: Laurent Pinchart <[email protected]>
> Signed-off-by: Kieran Bingham <[email protected]>

LGTM, so
Reviewed-by: Geert Uytterhoeven <[email protected]>
i.e. will queue in renesas-devel for v5.17.

> --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi

> @@ -146,6 +190,41 @@ &i2c1 {
>
> status = "okay";
> clock-frequency = <400000>;
> +
> + sn65dsi86@2c {
> + compatible = "ti,sn65dsi86";
> + reg = <0x2c>;
> +
> + clocks = <&sn65dsi86_refclk>;
> + clock-names = "refclk";
> +
> + interrupt-parent = <&gpio1>;
> + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;

Does the driver use this interrupt, and is it triggered?
If yes, as GP1_24 == IRQ0, you can switch from a GPIO to an INTC_EX IRQ,
(don't forget to configure pinctrl) and test the INTC_EX driver.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

2021-12-14 11:28:25

by Geert Uytterhoeven

[permalink] [raw]
Subject: Re: [PATCH v5 2/2] arm64: dts: renesas: r8a779a0: falcon-cpu: Add DSI display output

On Tue, Dec 14, 2021 at 11:49 AM Geert Uytterhoeven
<[email protected]> wrote:
> On Tue, Nov 30, 2021 at 5:43 PM Kieran Bingham
> <[email protected]> wrote:
> > Provide the display output using the sn65dsi86 MIPI DSI bridge
> >
> > Reviewed-by: Laurent Pinchart <[email protected]>
> > Signed-off-by: Kieran Bingham <[email protected]>
>
> LGTM, so
> Reviewed-by: Geert Uytterhoeven <[email protected]>
> i.e. will queue in renesas-devel for v5.17.

... using "bridge@2c".

> > --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
>
> > @@ -146,6 +190,41 @@ &i2c1 {
> >
> > status = "okay";
> > clock-frequency = <400000>;
> > +
> > + sn65dsi86@2c {

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

2021-12-14 14:23:46

by Kieran Bingham

[permalink] [raw]
Subject: Re: [PATCH v5 2/2] arm64: dts: renesas: r8a779a0: falcon-cpu: Add DSI display output

Quoting Geert Uytterhoeven (2021-12-14 10:49:15)
> Hi Kieran,
>
> On Tue, Nov 30, 2021 at 5:43 PM Kieran Bingham
> <[email protected]> wrote:
> > Provide the display output using the sn65dsi86 MIPI DSI bridge
> >
> > Reviewed-by: Laurent Pinchart <[email protected]>
> > Signed-off-by: Kieran Bingham <[email protected]>
>
> LGTM, so
> Reviewed-by: Geert Uytterhoeven <[email protected]>
> i.e. will queue in renesas-devel for v5.17.
>
> > --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
>
> > @@ -146,6 +190,41 @@ &i2c1 {
> >
> > status = "okay";
> > clock-frequency = <400000>;
> > +
> > + sn65dsi86@2c {
> > + compatible = "ti,sn65dsi86";
> > + reg = <0x2c>;
> > +
> > + clocks = <&sn65dsi86_refclk>;
> > + clock-names = "refclk";
> > +
> > + interrupt-parent = <&gpio1>;
> > + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
>
> Does the driver use this interrupt, and is it triggered?

No, it does not currently, but I expect it can be made to do so. Which
is likely a next development task to adapt polling hotplug to interrupt
driven hotplug detection anyway, so I'll try that then.


> If yes, as GP1_24 == IRQ0, you can switch from a GPIO to an INTC_EX IRQ,
> (don't forget to configure pinctrl) and test the INTC_EX driver.
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds