This patch set is to add bolero digital macros, WCD and maxim codecs nodes
for audio on sc7280 based platforms.
This patch set depends on:
-- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=638776
-- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=634597
-- https://patchwork.kernel.org/project/linux-clk/list/?series=637999
-- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=638002
Changes Since V11:
-- Remove output-low pinconf setting in wcd-reset-n-sleep node.
-- Update dependency list.
Changes Since V10:
-- Modify digital macro codecs pin control labels.
-- Updated dependency list.
Changes Since V9:
-- Move wcd codec and digital codec nodes to sc7280-qcard file.
-- Modify the reg property as per link number in sound node.
-- Fix the us-euro pin control usage in wcd codec node.
-- Move wcd pin control nodes to specific crd board files.
-- Sort max98360a codec node in alphabetical order.
-- Modify the commit messages.
Changes Since V8:
-- Split patches as per sc7280 CRD revision 3, 4 and 5 boards.
-- Add corresponding dt nodes for herobrine crd boards.
-- Update dai-link node names as per dt-bindings in sound node.
-- Add reg property in sound node as per dt-bindings which was removed in previous series.
-- Fix typo errors.
-- Update wcd codec pin control properties in board specific files.
Changes Since V7:
-- Remove redundant interrupt names in soundwire node.
-- Fix typo errors.
-- Remove redundant reg property in sound node.
-- Rebased on top of latest kernel tip.
Changes Since V6:
-- Modify link-names and audio routing in a sound node.
-- Move amp_en pin control node to appropriate consumer patch.
-- Split patches as per digital macro codecs and board specific codecs and sort it.
-- Modify label and node names to lpass specific.
Changes Since V5:
-- Move soc specific bolero digital codec nodes to soc specific file.
-- Bring wcd938x codec reset pin control and US/EURO HS selection nodes from other series.
-- Change node name and remove redundant status property in sound node.
Changes Since V4:
-- Update nodes in sorting order.
-- Update DTS node names as per dt-bindings.
-- Update Node properties in proper order.
-- Update missing pinctrl properties like US/EURO HS selection, wcd reset control.
-- Remove redundant labels.
-- Remove unused size cells and address cells in tx macro node.
-- Keep all same nodes at one place, which are defined in same file.
-- Add max98360a codec node to herobrine board specific targets.
Changes Since V3:
-- Move digital codec macro nodes to board specific dtsi file.
-- Update pin controls in lpass cpu node.
-- Update dependency patch list.
-- Create patches on latest kernel.
Changes Since V2:
-- Add power domains to digital codec macro nodes.
-- Change clock node usage in lpass cpu node.
-- Add codec mem clock to lpass cpu node.
-- Modify the node names to be generic.
-- Move sound and codec nodes to root node.
-- sort dai links as per reg.
-- Fix typo errors.
Changes Since V1:
-- Update the commit message of cpu node patch.
-- Add gpio control property to support Euro headset in wcd938x node.
-- Fix clock properties in lpass cpu and digital codec macro node.
Srinivasa Rao Mandadapu (12):
arm64: dts: qcom: sc7280: Add nodes for soundwire and va tx rx digital
macro codecs
arm64: dts: qcom: sc7280: Enable digital codecs and soundwire for CRD
1.0/2.0 and IDP boards
arm64: dts: qcom: sc7280: Enable digital codecs and soundwire for CRD
3.0/3.1
arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 1.0/2.0 and
IDP boards
arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 3.0/3.1
arm64: dts: qcom: sc7280: Add max98360a codec for CRD 1.0/2.0 and IDP
boards
arm64: dts: qcom: sc7280: herobrine: Add max98360a codec node
arm64: dts: qcom: sc7280: Add lpass cpu node
arm64: dts: qcom: sc7280: Enable lpass cpu node for CRD 1.0/2.0 and
IDP boards.
arm64: dts: qcom: sc7280: Enable lpass cpu node for CRD 3.0/3.1
arm64: dts: qcom: sc7280: Add sound node for CRD 1.0/2.0 and IDP
boards
arm64: dts: qcom: sc7280: Add sound node for CRD 3.0/3.1
arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts | 37 ++++
arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 150 +++++++++++++++
arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 8 +
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 217 ++++++++++++++++++++++
arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi | 74 ++++++++
arch/arm64/boot/dts/qcom/sc7280.dtsi | 190 +++++++++++++++++++
6 files changed, 676 insertions(+)
--
2.7.4
Enable lpass cpu node and add pin control and dai-links for audio on
sc7280 based platforms of rev5+ (aka CRD 3.0/3.1) boards.
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Co-developed-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Reviewed-by: Matthias Kaehlcke <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 28 +++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
index 602437f..e8a596c 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
@@ -102,6 +102,34 @@ ap_ts_pen_1v8: &i2c13 {
};
};
+&lpass_cpu {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>;
+
+ dai-link@1 {
+ reg = <MI2S_SECONDARY>;
+ qcom,playback-sd-lines = <0>;
+ };
+
+ dai-link@5 {
+ reg = <LPASS_DP_RX>;
+ };
+
+ dai-link@6 {
+ reg = <LPASS_CDC_DMA_RX0>;
+ };
+
+ dai-link@19 {
+ reg = <LPASS_CDC_DMA_TX3>;
+ };
+
+ dai-link@25 {
+ reg = <LPASS_CDC_DMA_VA_TX0>;
+ };
+};
+
&lpass_rx_macro {
status = "okay";
};
--
2.7.4
Enable rx, tx and va macro codecs and soundwire nodes on revision 3,
4 (aka CRD 1.0 and 2.0) and IDP boards.
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Co-developed-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Reviewed-by: Matthias Kaehlcke <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 35 ++++++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index 4461a07..eb61135 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -246,6 +246,19 @@
modem-init;
};
+&lpass_rx_macro {
+ status = "okay";
+};
+
+&lpass_tx_macro {
+ status = "okay";
+};
+
+&lpass_va_macro {
+ status = "okay";
+ vdd-micb-supply = <&vreg_bob>;
+};
+
&pcie1 {
status = "okay";
perst-gpio = <&tlmm 2 GPIO_ACTIVE_LOW>;
@@ -306,6 +319,28 @@
cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
};
+&swr0 {
+ status = "okay";
+
+ wcd_rx: codec@0,4 {
+ compatible = "sdw20217010d00";
+ reg = <0 4>;
+ #sound-dai-cells = <1>;
+ qcom,rx-port-mapping = <1 2 3 4 5>;
+ };
+};
+
+&swr1 {
+ status = "okay";
+
+ wcd_tx: codec@0,3 {
+ compatible = "sdw20217010d00";
+ reg = <0 3>;
+ #sound-dai-cells = <1>;
+ qcom,tx-port-mapping = <1 2 3 4>;
+ };
+};
+
&uart5 {
compatible = "qcom,geni-debug-uart";
status = "okay";
--
2.7.4
Add dt nodes for sound card support on revision 3, 4
(aka CRD 1.0 and 2.0) and IDP boards, which is using WCD9385 headset
playback, capture, I2S speaker playback and DMICs via VA macro.
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Co-developed-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Reviewed-by: Matthias Kaehlcke <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts | 23 +++++++
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 98 ++++++++++++++++++++++++++++++
2 files changed, 121 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts b/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
index 9c21207..dddb505 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
@@ -87,6 +87,29 @@ ap_ts_pen_1v8: &i2c13 {
pins = "gpio51";
};
+&sound {
+ audio-routing =
+ "IN1_HPHL", "HPHL_OUT",
+ "IN2_HPHR", "HPHR_OUT",
+ "AMIC1", "MIC BIAS1",
+ "AMIC2", "MIC BIAS2",
+ "VA DMIC0", "MIC BIAS1",
+ "VA DMIC1", "MIC BIAS1",
+ "VA DMIC2", "MIC BIAS3",
+ "VA DMIC3", "MIC BIAS3",
+ "TX SWR_ADC0", "ADC1_OUTPUT",
+ "TX SWR_ADC1", "ADC2_OUTPUT",
+ "TX SWR_ADC2", "ADC3_OUTPUT",
+ "TX SWR_DMIC0", "DMIC1_OUTPUT",
+ "TX SWR_DMIC1", "DMIC2_OUTPUT",
+ "TX SWR_DMIC2", "DMIC3_OUTPUT",
+ "TX SWR_DMIC3", "DMIC4_OUTPUT",
+ "TX SWR_DMIC4", "DMIC5_OUTPUT",
+ "TX SWR_DMIC5", "DMIC6_OUTPUT",
+ "TX SWR_DMIC6", "DMIC7_OUTPUT",
+ "TX SWR_DMIC7", "DMIC8_OUTPUT";
+};
+
&wcd9385 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>;
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index 10f646d..ec2b6c9 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -85,6 +85,104 @@
pinctrl-names = "default";
pinctrl-0 = <&nvme_pwren>;
};
+
+ sound: sound {
+ compatible = "google,sc7280-herobrine";
+ model = "sc7280-wcd938x-max98360a-1mic";
+
+ audio-routing =
+ "IN1_HPHL", "HPHL_OUT",
+ "IN2_HPHR", "HPHR_OUT",
+ "AMIC1", "MIC BIAS1",
+ "AMIC2", "MIC BIAS2",
+ "VA DMIC0", "MIC BIAS3",
+ "VA DMIC1", "MIC BIAS3",
+ "VA DMIC2", "MIC BIAS1",
+ "VA DMIC3", "MIC BIAS1",
+ "TX SWR_ADC0", "ADC1_OUTPUT",
+ "TX SWR_ADC1", "ADC2_OUTPUT",
+ "TX SWR_ADC2", "ADC3_OUTPUT",
+ "TX SWR_DMIC0", "DMIC1_OUTPUT",
+ "TX SWR_DMIC1", "DMIC2_OUTPUT",
+ "TX SWR_DMIC2", "DMIC3_OUTPUT",
+ "TX SWR_DMIC3", "DMIC4_OUTPUT",
+ "TX SWR_DMIC4", "DMIC5_OUTPUT",
+ "TX SWR_DMIC5", "DMIC6_OUTPUT",
+ "TX SWR_DMIC6", "DMIC7_OUTPUT",
+ "TX SWR_DMIC7", "DMIC8_OUTPUT";
+
+ qcom,msm-mbhc-hphl-swh = <1>;
+ qcom,msm-mbhc-gnd-swh = <1>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #sound-dai-cells = <0>;
+
+ dai-link@0 {
+ link-name = "MAX98360A";
+ reg = <0>;
+
+ cpu {
+ sound-dai = <&lpass_cpu MI2S_SECONDARY>;
+ };
+
+ codec {
+ sound-dai = <&max98360a>;
+ };
+ };
+
+ dai-link@1 {
+ link-name = "DisplayPort";
+ reg = <1>;
+
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_DP_RX>;
+ };
+
+ codec {
+ sound-dai = <&mdss_dp>;
+ };
+ };
+
+ dai-link@2 {
+ link-name = "WCD9385 Playback";
+ reg = <2>;
+
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
+ };
+
+ codec {
+ sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>;
+ };
+ };
+
+ dai-link@3 {
+ link-name = "WCD9385 Capture";
+ reg = <3>;
+
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
+ };
+
+ codec {
+ sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>;
+ };
+ };
+
+ dai-link@4 {
+ link-name = "DMIC";
+ reg = <4>;
+
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
+ };
+
+ codec {
+ sound-dai = <&lpass_va_macro 0>;
+ };
+ };
+ };
};
&apps_rsc {
--
2.7.4
SC7280 has VA, TX and RX macros with SoundWire Controllers to attach with
external codecs using soundwire masters. Add these nodes for sc7280 based
platforms audio use case.
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Co-developed-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Reviewed-by: Matthias Kaehlcke <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 128 +++++++++++++++++++++++++++++++++++
1 file changed, 128 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index c5fed9e..1b4210d 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2176,6 +2176,114 @@
#clock-cells = <1>;
};
+ lpass_rx_macro: codec@3200000 {
+ compatible = "qcom,sc7280-lpass-rx-macro";
+ reg = <0 0x03200000 0 0x1000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&lpass_rx_swr_clk>, <&lpass_rx_swr_data>;
+
+ clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
+ <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
+ <&lpass_va_macro>;
+ clock-names = "mclk", "npl", "fsgen";
+
+ power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
+ <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
+ power-domain-names = "macro", "dcodec";
+
+ #clock-cells = <0>;
+ #sound-dai-cells = <1>;
+
+ status = "disabled";
+ };
+
+ swr0: soundwire@3210000 {
+ compatible = "qcom,soundwire-v1.6.0";
+ reg = <0 0x03210000 0 0x2000>;
+
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&lpass_rx_macro>;
+ clock-names = "iface";
+
+ qcom,din-ports = <0>;
+ qcom,dout-ports = <5>;
+
+ resets = <&lpass_audiocc LPASS_AUDIO_SWR_RX_CGCR>;
+ reset-names = "swr_audio_cgcr";
+
+ qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff>;
+ qcom,ports-sinterval-low = /bits/ 8 <0x03 0x3f 0x1f 0x03 0x03>;
+ qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x01 0x01>;
+ qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00>;
+ qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>;
+ qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff>;
+ qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff>;
+ qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff>;
+ qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00>;
+
+ #sound-dai-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ };
+
+ lpass_tx_macro: codec@3220000 {
+ compatible = "qcom,sc7280-lpass-tx-macro";
+ reg = <0 0x03220000 0 0x1000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&lpass_tx_swr_clk>, <&lpass_tx_swr_data>;
+
+ clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
+ <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
+ <&lpass_va_macro>;
+ clock-names = "mclk", "npl", "fsgen";
+
+ power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
+ <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
+ power-domain-names = "macro", "dcodec";
+
+ #clock-cells = <0>;
+ #sound-dai-cells = <1>;
+
+ status = "disabled";
+ };
+
+ swr1: soundwire@3230000 {
+ compatible = "qcom,soundwire-v1.6.0";
+ reg = <0 0x03230000 0 0x2000>;
+
+ interrupts-extended = <&intc GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
+ <&pdc 130 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&lpass_tx_macro>;
+ clock-names = "iface";
+
+ qcom,din-ports = <3>;
+ qcom,dout-ports = <0>;
+
+ resets = <&lpass_audiocc LPASS_AUDIO_SWR_TX_CGCR>;
+ reset-names = "swr_audio_cgcr";
+
+ qcom,ports-sinterval-low = /bits/ 8 <0x01 0x03 0x03>;
+ qcom,ports-offset1 = /bits/ 8 <0x01 0x00 0x02>;
+ qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x00>;
+ qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff>;
+ qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff>;
+ qcom,ports-word-length = /bits/ 8 <0xff 0x00 0xff>;
+ qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0xff>;
+ qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff>;
+ qcom,ports-lane-control = /bits/ 8 <0x00 0x01 0x00>;
+ qcom,port-offset = <1>;
+
+ #sound-dai-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ };
+
lpass_audiocc: clock-controller@3300000 {
compatible = "qcom,sc7280-lpassaudiocc";
reg = <0 0x03300000 0 0x30000>;
@@ -2187,6 +2295,26 @@
#power-domain-cells = <1>;
};
+ lpass_va_macro: codec@3370000 {
+ compatible = "qcom,sc7280-lpass-va-macro";
+ reg = <0 0x03370000 0 0x1000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&lpass_dmic01_clk>, <&lpass_dmic01_data>;
+
+ clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>;
+ clock-names = "mclk";
+
+ power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>,
+ <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
+ power-domain-names = "macro", "dcodec";
+
+ #clock-cells = <0>;
+ #sound-dai-cells = <1>;
+
+ status = "disabled";
+ };
+
lpass_aon: clock-controller@3380000 {
compatible = "qcom,sc7280-lpassaoncc";
reg = <0 0x03380000 0 0x30000>;
--
2.7.4
Add max98360a codec node for audio use case on all herobrine boards.
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Co-developed-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Reviewed-by: Matthias Kaehlcke <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
index 9cb1bc8..1098916 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
@@ -295,6 +295,14 @@
/* BOARD-SPECIFIC TOP LEVEL NODES */
+ max98360a: audio-codec-0 {
+ compatible = "maxim,max98360a";
+ pinctrl-names = "default";
+ pinctrl-0 = <&_en>;
+ sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
+ #sound-dai-cells = <0>;
+ };
+
pwmleds {
compatible = "pwm-leds";
status = "disabled";
--
2.7.4
Add wcd9385 codec node for audio use case on sc7280 based platforms
of revision 3, 4 (aka CRD 1.0 and 2.0) and IDP boards.
Add tlmm gpio property for switching CTIA/OMTP Headset.
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Co-developed-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Reviewed-by: Matthias Kaehlcke <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts | 14 ++++++++++
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 42 ++++++++++++++++++++++++++++++
2 files changed, 56 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts b/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
index 344338a..9c21207 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
@@ -87,6 +87,13 @@ ap_ts_pen_1v8: &i2c13 {
pins = "gpio51";
};
+&wcd9385 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>;
+ pinctrl-1 = <&wcd_reset_n_sleep>, <&us_euro_hs_sel>;
+ us-euro-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
+};
+
&tlmm {
tp_int_odl: tp-int-odl {
pins = "gpio7";
@@ -105,4 +112,11 @@ ap_ts_pen_1v8: &i2c13 {
function = "gpio";
bias-disable;
};
+
+ us_euro_hs_sel: us-euro-hs-sel {
+ pins = "gpio81";
+ function = "gpio";
+ bias-pull-down;
+ drive-strength = <2>;
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index eb61135..0025a78 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -20,6 +20,34 @@
serial1 = &uart7;
};
+ wcd9385: audio-codec-1 {
+ compatible = "qcom,wcd9385-codec";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&wcd_reset_n>;
+ pinctrl-1 = <&wcd_reset_n_sleep>;
+
+ reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>;
+
+ qcom,rx-device = <&wcd_rx>;
+ qcom,tx-device = <&wcd_tx>;
+
+ vdd-rxtx-supply = <&vreg_l18b_1p8>;
+ vdd-io-supply = <&vreg_l18b_1p8>;
+ vdd-buck-supply = <&vreg_l17b_1p8>;
+ vdd-mic-bias-supply = <&vreg_bob>;
+
+ qcom,micbias1-microvolt = <1800000>;
+ qcom,micbias2-microvolt = <1800000>;
+ qcom,micbias3-microvolt = <1800000>;
+ qcom,micbias4-microvolt = <1800000>;
+
+ qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000
+ 500000 500000 500000>;
+ qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
+ qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
+ #sound-dai-cells = <1>;
+ };
+
gpio-keys {
compatible = "gpio-keys";
label = "gpio-keys";
@@ -670,6 +698,20 @@
function = "gpio";
bias-pull-down;
};
+
+ wcd_reset_n: wcd-reset-n {
+ pins = "gpio83";
+ function = "gpio";
+ drive-strength = <8>;
+ output-high;
+ };
+
+ wcd_reset_n_sleep: wcd-reset-n-sleep {
+ pins = "gpio83";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-disable;
+ };
};
&remoteproc_wpss {
--
2.7.4
Enable lpass cpu node and add pin control and dai-links for audio on sc7280
based platforms of revision 3, 4 (aka CRD 1.0 and 2.0) and IDP boards.
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Co-developed-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Reviewed-by: Matthias Kaehlcke <[email protected]>
Reviewed-by: Stephen Boyd <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index ccdbad4a..10f646d 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -282,6 +282,34 @@
modem-init;
};
+&lpass_cpu {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>;
+
+ dai-link@1 {
+ reg = <MI2S_SECONDARY>;
+ qcom,playback-sd-lines = <0>;
+ };
+
+ dai-link@5 {
+ reg = <LPASS_DP_RX>;
+ };
+
+ dai-link@6 {
+ reg = <LPASS_CDC_DMA_RX0>;
+ };
+
+ dai-link@19 {
+ reg = <LPASS_CDC_DMA_TX3>;
+ };
+
+ dai-link@25 {
+ reg = <LPASS_CDC_DMA_VA_TX0>;
+ };
+};
+
&lpass_rx_macro {
status = "okay";
};
--
2.7.4
Enable rx, tx and va macro codecs and soundwire nodes for
CRD rev5+ (aka CRD 3.0/3.1) boards.
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Co-developed-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Reviewed-by: Matthias Kaehlcke <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 20 ++++++++++++++++++++
arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi | 22 ++++++++++++++++++++++
2 files changed, 42 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
index 0ed8e7d..51b9e17 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
@@ -102,6 +102,18 @@ ap_ts_pen_1v8: &i2c13 {
};
};
+&lpass_rx_macro {
+ status = "okay";
+};
+
+&lpass_tx_macro {
+ status = "okay";
+};
+
+&lpass_va_macro {
+ status = "okay";
+};
+
&mdss_edp {
status = "okay";
};
@@ -134,6 +146,14 @@ ap_ts_pen_1v8: &i2c13 {
status = "okay";
};
+&swr0 {
+ status = "okay";
+};
+
+&swr1 {
+ status = "okay";
+};
+
/* PINCTRL - BOARD-SPECIFIC */
/*
diff --git a/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi b/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi
index d59002d..e933ebf 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi
@@ -303,6 +303,10 @@
modem-init;
};
+&lpass_va_macro {
+ vdd-micb-supply = <&vreg_bob>;
+};
+
/* NOTE: Not all Qcards have eDP connector stuffed */
&mdss_edp {
vdda-0p9-supply = <&vdd_a_edp_0_0p9>;
@@ -375,6 +379,24 @@
no-sdio;
};
+&swr0 {
+ wcd_rx: codec@0,4 {
+ compatible = "sdw20217010d00";
+ reg = <0 4>;
+ #sound-dai-cells = <1>;
+ qcom,rx-port-mapping = <1 2 3 4 5>;
+ };
+};
+
+&swr1 {
+ wcd_tx: codec@0,3 {
+ compatible = "sdw20217010d00";
+ reg = <0 3>;
+ #sound-dai-cells = <1>;
+ qcom,tx-port-mapping = <1 2 3 4>;
+ };
+};
+
uart_dbg: &uart5 {
compatible = "qcom,geni-debug-uart";
status = "okay";
--
2.7.4
Add wcd9385 codec node for audio use case on CRD rev5+ (aka CRD 3.0/3.1)
boards. Add tlmm gpio property for switching CTIA/OMTP Headset.
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Co-developed-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Reviewed-by: Matthias Kaehlcke <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 4 ++
arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi | 52 +++++++++++++++++++++++
2 files changed, 56 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
index 51b9e17..602437f 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
@@ -154,6 +154,10 @@ ap_ts_pen_1v8: &i2c13 {
status = "okay";
};
+&wcd9385 {
+ status = "okay";
+};
+
/* PINCTRL - BOARD-SPECIFIC */
/*
diff --git a/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi b/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi
index e933ebf..efa6787 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi
@@ -30,6 +30,37 @@
serial1 = &uart7;
};
+ wcd9385: audio-codec-1 {
+ compatible = "qcom,wcd9385-codec";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>;
+ pinctrl-1 = <&wcd_reset_n_sleep>, <&us_euro_hs_sel>;
+
+ reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>;
+ us-euro-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
+
+ qcom,rx-device = <&wcd_rx>;
+ qcom,tx-device = <&wcd_tx>;
+
+ vdd-rxtx-supply = <&vreg_l18b_1p8>;
+ vdd-io-supply = <&vreg_l18b_1p8>;
+ vdd-buck-supply = <&vreg_l17b_1p8>;
+ vdd-mic-bias-supply = <&vreg_bob>;
+
+ qcom,micbias1-microvolt = <1800000>;
+ qcom,micbias2-microvolt = <1800000>;
+ qcom,micbias3-microvolt = <1800000>;
+ qcom,micbias4-microvolt = <1800000>;
+
+ qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000
+ 500000 500000 500000>;
+ qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
+ qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
+ #sound-dai-cells = <1>;
+
+ status = "disabled";
+ };
+
pm8350c_pwm_backlight: backlight {
compatible = "pwm-backlight";
status = "disabled";
@@ -629,4 +660,25 @@ mos_bt_uart: &uart7 {
bias-pull-up;
drive-strength = <2>;
};
+
+ us_euro_hs_sel: us-euro-hs-sel {
+ pins = "gpio81";
+ function = "gpio";
+ bias-pull-down;
+ drive-strength = <2>;
+ };
+
+ wcd_reset_n: wcd-reset-n {
+ pins = "gpio83";
+ function = "gpio";
+ drive-strength = <8>;
+ output-high;
+ };
+
+ wcd_reset_n_sleep: wcd-reset-n-sleep {
+ pins = "gpio83";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-disable;
+ };
};
--
2.7.4
On Fri, May 20, 2022 at 05:48:32PM +0530, Srinivasa Rao Mandadapu wrote:
> This patch set is to add bolero digital macros, WCD and maxim codecs nodes
> for audio on sc7280 based platforms.
>
> This patch set depends on:
> -- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=638776
> -- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=634597
> -- https://patchwork.kernel.org/project/linux-clk/list/?series=637999
> -- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=638002
Another dependency (at least in terms of functionality) is:
ASoC: qcom: soundwire: Add support for controlling audio CGCR from HLOS
https://patchwork.kernel.org/patch/12853622/
And then there is this:
arm64: dts: qcom: sc7280: Add lpasscore & lpassaudio clock controllers
https://patchwork.kernel.org/project/linux-arm-msm/patch/[email protected]/
A previous version (v3) of that patch already landed (9499240d15f2
"arm64: dts: qcom: sc7280: Add lpasscore & lpassaudio clock controllers"),
it is not clear to me why it is still evolving as if that weren't the
case.
From the newer version of the patch at least marking the 'lpasscc' node
as disabled is needed.
On 6/7/2022 3:02 AM, Matthias Kaehlcke wrote:
Thanks for your time Matthias!!!
> On Fri, May 20, 2022 at 05:48:32PM +0530, Srinivasa Rao Mandadapu wrote:
>> This patch set is to add bolero digital macros, WCD and maxim codecs nodes
>> for audio on sc7280 based platforms.
>>
>> This patch set depends on:
>> -- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=638776
>> -- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=634597
>> -- https://patchwork.kernel.org/project/linux-clk/list/?series=637999
>> -- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=638002
> Another dependency (at least in terms of functionality) is:
>
> ASoC: qcom: soundwire: Add support for controlling audio CGCR from HLOS
> https://patchwork.kernel.org/patch/12853622/
This is landed today.
>
> And then there is this:
>
> arm64: dts: qcom: sc7280: Add lpasscore & lpassaudio clock controllers
> https://patchwork.kernel.org/project/linux-arm-msm/patch/[email protected]/
>
> A previous version (v3) of that patch already landed (9499240d15f2
> "arm64: dts: qcom: sc7280: Add lpasscore & lpassaudio clock controllers"),
> it is not clear to me why it is still evolving as if that weren't the
> case.
I too have same doubt. the changes should be incremental and new patch.
May be Taniya considered
the status in patchwork.kernel org, where still it's showing new.
>
> From the newer version of the patch at least marking the 'lpasscc' node
> as disabled is needed.
yes, agree. And the node name changed to lpasscore to lpass_core.
Included Taniya in the mail chain for further discussion.
On Fri, 20 May 2022 17:48:32 +0530, Srinivasa Rao Mandadapu wrote:
> This patch set is to add bolero digital macros, WCD and maxim codecs nodes
> for audio on sc7280 based platforms.
>
> This patch set depends on:
> -- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=638776
> -- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=634597
> -- https://patchwork.kernel.org/project/linux-clk/list/?series=637999
> -- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=638002
>
> [...]
Applied, thanks!
[01/12] arm64: dts: qcom: sc7280: Add nodes for soundwire and va tx rx digital macro codecs
commit: 12ef689f09abb50f0862c8e08138dd45cbf27233
[02/12] arm64: dts: qcom: sc7280: Enable digital codecs and soundwire for CRD 1.0/2.0 and IDP boards
commit: d3219de8bcebe4057696a2f99ce90c8812114c78
[03/12] arm64: dts: qcom: sc7280: Enable digital codecs and soundwire for CRD 3.0/3.1
commit: d5a959f96be1b27c81d6197d66624cd6cc146fe6
[04/12] arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 1.0/2.0 and IDP boards
commit: f8b4eb64f2003e0a1fa5011009955d46f90af285
[05/12] arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 3.0/3.1
commit: 0a3a56a93fd96cb3e3d42778f275e91750c242a7
[06/12] arm64: dts: qcom: sc7280: Add max98360a codec for CRD 1.0/2.0 and IDP boards
commit: d6c006f510d9f29ff78761bb3ef50f14ebc05b7b
[07/12] arm64: dts: qcom: sc7280: herobrine: Add max98360a codec node
commit: 14afeaf917375967bb84b4347cd8e4156b84c470
[08/12] arm64: dts: qcom: sc7280: Add lpass cpu node
commit: aee6873edb93a3919706f70884e55880d8c727a5
[09/12] arm64: dts: qcom: sc7280: Enable lpass cpu node for CRD 1.0/2.0 and IDP boards.
commit: 8cf4133bc1fbb6fbc695e4398b940caf3ec59ba5
[10/12] arm64: dts: qcom: sc7280: Enable lpass cpu node for CRD 3.0/3.1
commit: f10c73ac6e90ca2343fc4f06b61ce8c1824c9bfd
[11/12] arm64: dts: qcom: sc7280: Add sound node for CRD 1.0/2.0 and IDP boards
commit: ece7d81f2447f4fd4f5d5345e921036871babf2b
[12/12] arm64: dts: qcom: sc7280: Add sound node for CRD 3.0/3.1
commit: 29e0b604f040ef794cd36d43b97bd9c040ed99e6
Best regards,
--
Bjorn Andersson <[email protected]>