This patch set is to add lpass pin control support for Audio over I2S,
wcd codec and digital mics.
Changes Since V14:
-- Move secondary MI2S pinmux specifications to new file.
-- Add qcom,adsp-bypass-mode boolean property in lpass_tlmm Node.
Changes Since V13:
-- Remove redundant properties in lpass lpi pin control nodes.
-- Sort lpass lpi pin control nodes.
Changes Since V12:
-- Split common lpass lpi pin control nodes to functionality specific nodes.
-- Move common pin control properties to corresponding default nodes.
Changes Since V11:
-- Move CRD specific pinmux nodes to crd specific file.
Changes Since V10:
-- Add lpass lpi pinmux and MI2S pinmux support for rev5+ boards.
-- Remove dependency patches link in the cover-letter as it is merged.
Changes Since V9:
-- Remove redundant prefix in node name.
Changes Since V8:
-- Modify label and node names to lpass specific.
-- Sort nodes as per node names and kind of nodes like pinctrl and device nodes.
Changes Since V7:
-- Sort mi2s pincontrol nodes as per node name.
-- Fix typo errors.
Changes Since V6:
-- Move amp_en node to corresponding consumer patch.
-- Update label and node names.
-- Remove redundant drive-strengths.
-- Remove herobrine crd specific mi2s configuration.
Changes Since V5:
-- Remove redundant function property in amp_en node.
-- Move board specific properties of lpass pin control node to board specific file.
-- Remove redundant properties in pin control nodes.
-- Move wcd938x codec reset and CTIA/OMTP pin control patches to other series.
Changes Since V4:
-- Add primary and secondary I2S pinmux nodes for herobrine specific targets.
Changes Since V3:
-- Add pinctrl nodes for wcd codec reset and CTIA/OMTP headset selection.
Changes Since V2:
-- Move lpass pin control node to main dtsi file.
-- Sort nodes alphabetically.
-- Remove redundant wcd reset gpio nodes.
-- Remove redundant input-enable field in dmic pin control nodes.
-- Update amp_en node.
-- Fix typo errors.
-- Modify node names.
-- Create patches on latest kernel.
Changes Since V1:
-- Merge pinmux and pinconf properties in amp_en and wcd pin reset node.
-- Split common i2s pin control nodes to functionality specific nodes.
-- Move board specific properties to board specific dtsi file.
-- Update dmic pin control node name.
Srinivasa Rao Mandadapu (4):
arm64: dts: qcom: sc7280: Add pinmux for I2S speaker and Headset
arm64: dts: qcom: sc7280: Add secondary MI2S pinmux specifications for
CRD 3.0/3.1
arm64: dts: qcom: sc7280: add lpass lpi pin controller node
arm64: dts: qcom: sc7280-herobrine: Add lpi pinmux properties for CRD
3.0/3.1
.../dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi | 20 ++++
arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 62 ++++++++++
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 76 ++++++++++++
arch/arm64/boot/dts/qcom/sc7280.dtsi | 132 +++++++++++++++++++++
4 files changed, 290 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi
--
2.7.4
Add drive strength property for secondary MI2S on
sc7280 based platforms of rev5+ (aka CRD 3.0/3.1) boards.
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Co-developed-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Reviewed-by: Matthias Kaehlcke <[email protected]>
---
.../dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi | 20 ++++++++++++++++++++
arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 1 +
2 files changed, 21 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi
new file mode 100644
index 0000000..32a1e78
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * sc7280 device tree source for boards using Max98360 and wcd9385 codec
+ *
+ * Copyright (c) 2022, The Linux Foundation. All rights reserved.
+ */
+
+&mi2s1_data0 {
+ drive-strength = <6>;
+ bias-disable;
+};
+
+&mi2s1_sclk {
+ drive-strength = <6>;
+ bias-disable;
+};
+
+&mi2s1_ws {
+ drive-strength = <6>;
+};
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
index a4ac33c..53feaed 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
@@ -8,6 +8,7 @@
/dts-v1/;
#include "sc7280-herobrine.dtsi"
+#include "sc7280-herobrine-audio-wcd9385.dtsi"
/ {
model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev5+)";
--
2.7.4
Add pinmux nodes for primary and secondary I2S for SC7280 based platforms.
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Co-developed-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Reviewed-by: Matthias Kaehlcke <[email protected]>
Reviewed-by: Stephen Boyd <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 14 +++++++++++
arch/arm64/boot/dts/qcom/sc7280.dtsi | 40 ++++++++++++++++++++++++++++++++
2 files changed, 54 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index 5eb6689..acf407a 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -367,6 +367,20 @@
bias-disable;
};
+&mi2s1_data0 {
+ drive-strength = <6>;
+ bias-disable;
+};
+
+&mi2s1_sclk {
+ drive-strength = <6>;
+ bias-disable;
+};
+
+&mi2s1_ws {
+ drive-strength = <6>;
+};
+
&pm7325_gpios {
key_vol_up_default: key-vol-up-default {
pins = "gpio6";
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index e66fc67..fde55c3 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -3898,6 +3898,46 @@
function = "edp_hot";
};
+ mi2s0_data0: mi2s0-data0 {
+ pins = "gpio98";
+ function = "mi2s0_data0";
+ };
+
+ mi2s0_data1: mi2s0-data1 {
+ pins = "gpio99";
+ function = "mi2s0_data1";
+ };
+
+ mi2s0_mclk: mi2s0-mclk {
+ pins = "gpio96";
+ function = "pri_mi2s";
+ };
+
+ mi2s0_sclk: mi2s0-sclk {
+ pins = "gpio97";
+ function = "mi2s0_sck";
+ };
+
+ mi2s0_ws: mi2s0-ws {
+ pins = "gpio100";
+ function = "mi2s0_ws";
+ };
+
+ mi2s1_data0: mi2s1-data0 {
+ pins = "gpio107";
+ function = "mi2s1_data0";
+ };
+
+ mi2s1_sclk: mi2s1-sclk {
+ pins = "gpio106";
+ function = "mi2s1_sck";
+ };
+
+ mi2s1_ws: mi2s1-ws {
+ pins = "gpio108";
+ function = "mi2s1_ws";
+ };
+
pcie1_clkreq_n: pcie1-clkreq-n {
pins = "gpio79";
function = "pcie1_clkreqn";
--
2.7.4
Add LPASS LPI pinctrl properties, which are required for Audio
functionality on herobrine based platforms of rev5+
(aka CRD 3.0/3.1) boards.
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Co-developed-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Reviewed-by: Matthias Kaehlcke <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 61 +++++++++++++++++++++++
1 file changed, 61 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
index 53feaed..d92575e 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
@@ -144,6 +144,67 @@ ap_ts_pen_1v8: &i2c13 {
* - If a pin is totally internal to Qcard then it gets Qcard name.
* - If a pin is not hooked up on Qcard, it gets no name.
*/
+&lpass_dmic01_clk {
+ drive-strength = <8>;
+ bias-disable;
+};
+
+&lpass_dmic01_clk_sleep {
+ drive-strength = <2>;
+};
+
+&lpass_dmic01_data {
+ bias-pull-down;
+};
+
+&lpass_dmic23_clk {
+ drive-strength = <8>;
+ bias-disable;
+};
+
+&lpass_dmic23_clk_sleep {
+ drive-strength = <2>;
+};
+
+&lpass_dmic23_data {
+ bias-pull-down;
+};
+
+&lpass_rx_swr_clk {
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-disable;
+};
+
+&lpass_rx_swr_clk_sleep {
+ bias-pull-down;
+};
+
+&lpass_rx_swr_data {
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-bus-hold;
+};
+
+&lpass_rx_swr_data_sleep {
+ bias-pull-down;
+};
+
+&lpass_tx_swr_clk {
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-disable;
+};
+
+&lpass_tx_swr_clk_sleep {
+ bias-pull-down;
+};
+
+&lpass_tx_swr_data {
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-bus-hold;
+};
&pm8350c_gpios {
gpio-line-names = "FLASH_STROBE_1", /* 1 */
--
2.7.4
Add LPASS LPI pinctrl node required for Audio functionality on sc7280
based platforms.
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Co-developed-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Reviewed-by: Stephen Boyd <[email protected]>
Reviewed-by: Matthias Kaehlcke <[email protected]>
---
This patch set depends on:
-- https://patchwork.kernel.org/project/linux-arm-msm/list/?series=649484
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 62 +++++++++++++++++++++
arch/arm64/boot/dts/qcom/sc7280.dtsi | 92 ++++++++++++++++++++++++++++++++
2 files changed, 154 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index acf407a..4461a07 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -367,6 +367,68 @@
bias-disable;
};
+&lpass_dmic01_clk {
+ drive-strength = <8>;
+ bias-disable;
+};
+
+&lpass_dmic01_clk_sleep {
+ drive-strength = <2>;
+};
+
+&lpass_dmic01_data {
+ bias-pull-down;
+};
+
+&lpass_dmic23_clk {
+ drive-strength = <8>;
+ bias-disable;
+};
+
+&lpass_dmic23_clk_sleep {
+ drive-strength = <2>;
+};
+
+&lpass_dmic23_data {
+ bias-pull-down;
+};
+
+&lpass_rx_swr_clk {
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-disable;
+};
+
+&lpass_rx_swr_clk_sleep {
+ bias-pull-down;
+};
+
+&lpass_rx_swr_data {
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-bus-hold;
+};
+
+&lpass_rx_swr_data_sleep {
+ bias-pull-down;
+};
+
+&lpass_tx_swr_clk {
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-disable;
+};
+
+&lpass_tx_swr_clk_sleep {
+ bias-pull-down;
+};
+
+&lpass_tx_swr_data {
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-bus-hold;
+};
+
&mi2s1_data0 {
drive-strength = <6>;
bias-disable;
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index fde55c3..b14134a 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2224,6 +2224,98 @@
qcom,bcm-voters = <&apps_bcm_voter>;
};
+ lpass_tlmm: pinctrl@33c0000 {
+ compatible = "qcom,sc7280-lpass-lpi-pinctrl";
+ reg = <0 0x033c0000 0x0 0x20000>,
+ <0 0x03550000 0x0 0x10000>;
+ qcom,adsp-bypass-mode;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&lpass_tlmm 0 0 15>;
+
+ #clock-cells = <1>;
+
+ lpass_dmic01_clk: dmic01-clk {
+ pins = "gpio6";
+ function = "dmic1_clk";
+ };
+
+ lpass_dmic01_clk_sleep: dmic01-clk-sleep {
+ pins = "gpio6";
+ function = "dmic1_clk";
+ };
+
+ lpass_dmic01_data: dmic01-data {
+ pins = "gpio7";
+ function = "dmic1_data";
+ };
+
+ lpass_dmic01_data_sleep: dmic01-data-sleep {
+ pins = "gpio7";
+ function = "dmic1_data";
+ };
+
+ lpass_dmic23_clk: dmic23-clk {
+ pins = "gpio8";
+ function = "dmic2_clk";
+ };
+
+ lpass_dmic23_clk_sleep: dmic23-clk-sleep {
+ pins = "gpio8";
+ function = "dmic2_clk";
+ };
+
+ lpass_dmic23_data: dmic23-data {
+ pins = "gpio9";
+ function = "dmic2_data";
+ };
+
+ lpass_dmic23_data_sleep: dmic23-data-sleep {
+ pins = "gpio9";
+ function = "dmic2_data";
+ };
+
+ lpass_rx_swr_clk: rx-swr-clk {
+ pins = "gpio3";
+ function = "swr_rx_clk";
+ };
+
+ lpass_rx_swr_clk_sleep: rx-swr-clk-sleep {
+ pins = "gpio3";
+ function = "swr_rx_clk";
+ };
+
+ lpass_rx_swr_data: rx-swr-data {
+ pins = "gpio4", "gpio5";
+ function = "swr_rx_data";
+ };
+
+ lpass_rx_swr_data_sleep: rx-swr-data-sleep {
+ pins = "gpio4", "gpio5";
+ function = "swr_rx_data";
+ };
+
+ lpass_tx_swr_clk: tx-swr-clk {
+ pins = "gpio0";
+ function = "swr_tx_clk";
+ };
+
+ lpass_tx_swr_clk_sleep: tx-swr-clk-sleep {
+ pins = "gpio0";
+ function = "swr_tx_clk";
+ };
+
+ lpass_tx_swr_data: tx-swr-data {
+ pins = "gpio1", "gpio2", "gpio14";
+ function = "swr_tx_data";
+ };
+
+ lpass_tx_swr_data_sleep: tx-swr-data-sleep {
+ pins = "gpio1", "gpio2", "gpio14";
+ function = "swr_tx_data";
+ };
+ };
+
gpu: gpu@3d00000 {
compatible = "qcom,adreno-635.0", "qcom,adreno";
reg = <0 0x03d00000 0 0x40000>,
--
2.7.4
On Mon, 13 Jun 2022 13:54:01 +0530, Srinivasa Rao Mandadapu wrote:
> This patch set is to add lpass pin control support for Audio over I2S,
> wcd codec and digital mics.
>
> Changes Since V14:
> -- Move secondary MI2S pinmux specifications to new file.
> -- Add qcom,adsp-bypass-mode boolean property in lpass_tlmm Node.
> Changes Since V13:
> -- Remove redundant properties in lpass lpi pin control nodes.
> -- Sort lpass lpi pin control nodes.
> Changes Since V12:
> -- Split common lpass lpi pin control nodes to functionality specific nodes.
> -- Move common pin control properties to corresponding default nodes.
> Changes Since V11:
> -- Move CRD specific pinmux nodes to crd specific file.
> Changes Since V10:
> -- Add lpass lpi pinmux and MI2S pinmux support for rev5+ boards.
> -- Remove dependency patches link in the cover-letter as it is merged.
> Changes Since V9:
> -- Remove redundant prefix in node name.
> Changes Since V8:
> -- Modify label and node names to lpass specific.
> -- Sort nodes as per node names and kind of nodes like pinctrl and device nodes.
> Changes Since V7:
> -- Sort mi2s pincontrol nodes as per node name.
> -- Fix typo errors.
> Changes Since V6:
> -- Move amp_en node to corresponding consumer patch.
> -- Update label and node names.
> -- Remove redundant drive-strengths.
> -- Remove herobrine crd specific mi2s configuration.
> Changes Since V5:
> -- Remove redundant function property in amp_en node.
> -- Move board specific properties of lpass pin control node to board specific file.
> -- Remove redundant properties in pin control nodes.
> -- Move wcd938x codec reset and CTIA/OMTP pin control patches to other series.
> Changes Since V4:
> -- Add primary and secondary I2S pinmux nodes for herobrine specific targets.
> Changes Since V3:
> -- Add pinctrl nodes for wcd codec reset and CTIA/OMTP headset selection.
> Changes Since V2:
> -- Move lpass pin control node to main dtsi file.
> -- Sort nodes alphabetically.
> -- Remove redundant wcd reset gpio nodes.
> -- Remove redundant input-enable field in dmic pin control nodes.
> -- Update amp_en node.
> -- Fix typo errors.
> -- Modify node names.
> -- Create patches on latest kernel.
> Changes Since V1:
> -- Merge pinmux and pinconf properties in amp_en and wcd pin reset node.
> -- Split common i2s pin control nodes to functionality specific nodes.
> -- Move board specific properties to board specific dtsi file.
> -- Update dmic pin control node name.
>
> [...]
Applied, thanks!
[1/4] arm64: dts: qcom: sc7280: Add pinmux for I2S speaker and Headset
commit: b9e3f65ecf85854c9717467c3cffaca194edd19f
[2/4] arm64: dts: qcom: sc7280: Add secondary MI2S pinmux specifications for CRD 3.0/3.1
commit: 06c73a39c38b9321e638002450dcb22aa592ae99
[3/4] arm64: dts: qcom: sc7280: add lpass lpi pin controller node
commit: 32d4541abe0f981cbcc45e142543d5811fd07692
[4/4] arm64: dts: qcom: sc7280-herobrine: Add lpi pinmux properties for CRD 3.0/3.1
commit: a4c1fc8cff056461b9bd0e07e775f93073b4d527
Best regards,
--
Bjorn Andersson <[email protected]>