From: xinlei lee <[email protected]>
In the original mtk_disp_pwm_get_state() function, the result of reading
con0 & BIT(0) is enabled as disp_pwm.
In order to conform to the register table, we should use the disp_pwm
base address as the enabled judgment.
Fixes: 3f2b16734914 ("pwm: mtk-disp: Implement atomic API .get_state()")
Signed-off-by: xinlei lee <[email protected]>
Reviewed-by: Miles Chen <[email protected]>
---
Base on the branch of Linux-next/master.
Split from series [1].
[1] https://patchwork.kernel.org/project/linux-mediatek/cover/[email protected]/
---
---
drivers/pwm/pwm-mtk-disp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pwm/pwm-mtk-disp.c b/drivers/pwm/pwm-mtk-disp.c
index c605013..50425cd 100644
--- a/drivers/pwm/pwm-mtk-disp.c
+++ b/drivers/pwm/pwm-mtk-disp.c
@@ -197,7 +197,7 @@ static void mtk_disp_pwm_get_state(struct pwm_chip *chip,
rate = clk_get_rate(mdp->clk_main);
con0 = readl(mdp->base + mdp->data->con0);
con1 = readl(mdp->base + mdp->data->con1);
- state->enabled = !!(con0 & BIT(0));
+ state->enabled = !!(readl(mdp->base) & BIT(0));
clk_div = FIELD_GET(PWM_CLKDIV_MASK, con0);
period = FIELD_GET(PWM_PERIOD_MASK, con1);
/*
--
2.6.4
Il 29/08/22 06:04, [email protected] ha scritto:
> From: xinlei lee <[email protected]>
>
> In the original mtk_disp_pwm_get_state() function, the result of reading
> con0 & BIT(0) is enabled as disp_pwm.
> In order to conform to the register table, we should use the disp_pwm
> base address as the enabled judgment.
>
> Fixes: 3f2b16734914 ("pwm: mtk-disp: Implement atomic API .get_state()")
>
> Signed-off-by: xinlei lee <[email protected]>
> Reviewed-by: Miles Chen <[email protected]>
This fix is valid for all MediaTek SoCs that are currently supported in
pwm-mtk-disp (and some others that aren't supported yet).
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Hello,
On Mon, Aug 29, 2022 at 12:04:12PM +0800, [email protected] wrote:
> From: xinlei lee <[email protected]>
>
> In the original mtk_disp_pwm_get_state() function, the result of reading
> con0 & BIT(0) is enabled as disp_pwm.
> In order to conform to the register table, we should use the disp_pwm
> base address as the enabled judgment.
Do you want to say:
The enable bit of the hardware is bit 0 of the DISP_PWM_EN
register at offset 0 for all supported hardwares. Up to now the
bit was wrongly assumed to be in the CON0 register.
?
> Fixes: 3f2b16734914 ("pwm: mtk-disp: Implement atomic API .get_state()")
>
This newline is unusal.
> Signed-off-by: xinlei lee <[email protected]>
> Reviewed-by: Miles Chen <[email protected]>
> ---
> Base on the branch of Linux-next/master.
> Split from series [1].
> [1] https://patchwork.kernel.org/project/linux-mediatek/cover/[email protected]/
> ---
> ---
> drivers/pwm/pwm-mtk-disp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pwm/pwm-mtk-disp.c b/drivers/pwm/pwm-mtk-disp.c
> index c605013..50425cd 100644
> --- a/drivers/pwm/pwm-mtk-disp.c
> +++ b/drivers/pwm/pwm-mtk-disp.c
> @@ -197,7 +197,7 @@ static void mtk_disp_pwm_get_state(struct pwm_chip *chip,
> rate = clk_get_rate(mdp->clk_main);
> con0 = readl(mdp->base + mdp->data->con0);
> con1 = readl(mdp->base + mdp->data->con1);
> - state->enabled = !!(con0 & BIT(0));
> + state->enabled = !!(readl(mdp->base) & BIT(0));
I would expect this to better be:
state->enabled = !!(readl(mdp->base + DISP_PWM_EN) & BIT(0));
which is the same for the compiler but a bit more descriptive for the
human reader.
> clk_div = FIELD_GET(PWM_CLKDIV_MASK, con0);
> period = FIELD_GET(PWM_PERIOD_MASK, con1);
> /*
Best regards
Uwe
--
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