Hi,
Changes since v1:
1. Match the driver's ngpios (so usually include the ufs-reset where
applicable). Several patches were dropped, other rewritten.
2. Add tags
Best regards,
Krzysztof
Krzysztof Kozlowski (10):
dt-bindings: pinctrl: qcom,msm8226: correct GPIO name pattern
dt-bindings: pinctrl: qcom,msm8909: correct GPIO name pattern and
example
dt-bindings: pinctrl: qcom,sm6375: correct GPIO name pattern and
example
dt-bindings: pinctrl: qcom,msm8953: correct GPIO name pattern
dt-bindings: pinctrl: qcom,sdx55: correct GPIO name pattern
dt-bindings: pinctrl: qcom,msm8994: correct number of GPIOs
dt-bindings: pinctrl: qcom: correct gpio-ranges in examples
ARM: dts: qcom: sdx55: correct TLMM gpio-ranges
arm64: dts: qcom: msm8953: correct TLMM gpio-ranges
arm64: dts: qcom: sm6115: correct TLMM gpio-ranges
.../devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml | 2 +-
.../devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml | 4 ++--
.../devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml | 2 +-
.../devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml | 6 +++---
.../devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 2 +-
.../devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml | 4 ++--
.../devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml | 2 +-
.../devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml | 2 +-
arch/arm/boot/dts/qcom-sdx55.dtsi | 2 +-
arch/arm64/boot/dts/qcom/msm8953.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sm6115.dtsi | 2 +-
11 files changed, 15 insertions(+), 15 deletions(-)
--
2.34.1
The MSM8226 TLMM pin controller has GPIOs 0-116, so correct the pattern
to bring back missing 107-109.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
index a29b8a9e1f31..6cb667fa8665 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
@@ -56,7 +56,7 @@ $defs:
subnode.
items:
oneOf:
- - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$"
+ - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-6])$"
- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]
minItems: 1
maxItems: 36
--
2.34.1
The MSM8909 TLMM pin controller has GPIOs 0-112, so narrow the pattern
and gpio-ranges in the example.
Fixes: c249ec7ba1b1 ("dt-bindings: pinctrl: Add DT schema for qcom,msm8909-tlmm")
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Stephan Gerhold <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
index 449e6e34be61..85082adc1811 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
@@ -63,7 +63,7 @@ $defs:
subnode.
items:
oneOf:
- - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-7])$"
+ - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$"
- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
sdc2_data, qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1,
qdsd_data2, qdsd_data3 ]
@@ -127,7 +127,7 @@ examples:
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
- gpio-ranges = <&tlmm 0 0 117>;
+ gpio-ranges = <&tlmm 0 0 113>;
interrupt-controller;
#interrupt-cells = <2>;
--
2.34.1
The SM6375 TLMM pin controller has GPIOs 0-155, so narrow the pattern
and gpio-ranges in the example.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml
index e4231d10d76f..66cef48ed59b 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml
@@ -63,7 +63,7 @@ $defs:
subnode.
items:
oneOf:
- - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-6])$"
+ - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-5])$"
- enum: [ ufs_reset, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,
sdc2_cmd, sdc2_data ]
minItems: 1
@@ -134,7 +134,7 @@ examples:
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 157>;
+ gpio-ranges = <&tlmm 0 0 157>; /* GPIOs + ufs_reset */
gpio-wo-subnode-state {
pins = "gpio1";
--
2.34.1
The SDX55 TLMM pin controller has GPIOs 0-107, so narrow the pattern.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
index add3c7e64520..a40175258495 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
@@ -55,7 +55,7 @@ $defs:
List of gpio pins affected by the properties specified in this subnode.
items:
oneOf:
- - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$"
+ - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-7])$"
- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]
minItems: 1
maxItems: 36
--
2.34.1
The MSM8953 TLMM pin controller has GPIOs 0-141, so narrow the pattern.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml
index 6bcd52080801..ce219827ccc8 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml
@@ -53,7 +53,7 @@ $defs:
subnode.
items:
oneOf:
- - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$"
+ - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[01])$"
- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk,
sdc2_cmd, sdc2_data, qdsd_clk, qdsd_cmd, qdsd_data0,
qdsd_data1, qdsd_data2, qdsd_data3 ]
--
2.34.1
Correct the number of GPIOs in gpio-ranges to match reality.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml | 2 +-
Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
index 56e058c315f7..cf561dff8893 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
@@ -131,6 +131,6 @@ examples:
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 180>;
+ gpio-ranges = <&tlmm 0 0 181>; /* GPIOs + ufs_reset */
wakeup-parent = <&pdc>;
};
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml
index e13d50d6d388..797242f68b1c 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml
@@ -130,7 +130,7 @@ examples:
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 203>;
+ gpio-ranges = <&tlmm 0 0 204>; /* GPIOs + ufs_reset */
gpio-wo-subnode-state {
pins = "gpio1";
--
2.34.1
Correct the number of GPIOs in TLMM pin controller.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/qcom-sdx55.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi
index a9433d1e4f54..f1553e1e40db 100644
--- a/arch/arm/boot/dts/qcom-sdx55.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx55.dtsi
@@ -560,7 +560,7 @@ tlmm: pinctrl@f100000 {
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 109>;
+ gpio-ranges = <&tlmm 0 0 108>;
};
sram@1468f000 {
--
2.34.1
The MSM8994 TLMM pin controller has GPIOs 0-145, so narrow the pattern
and reduce sizes of arrays with pins.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml
index f4a8180f5959..0c4936fc35ef 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml
@@ -34,10 +34,10 @@ properties:
gpio-reserved-ranges:
minItems: 1
- maxItems: 75
+ maxItems: 73
gpio-line-names:
- maxItems: 150
+ maxItems: 146
patternProperties:
"-state$":
@@ -63,7 +63,7 @@ $defs:
subnode.
items:
oneOf:
- - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$"
+ - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-5])$"
- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk,
sdc2_cmd, sdc2_data, sdc3_clk, sdc3_cmd, sdc3_data ]
minItems: 1
--
2.34.1
Correct the number of GPIOs in TLMM pin controller.
Fixes: 9fb08c801923 ("arm64: dts: qcom: Add MSM8953 device tree")
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/qcom/msm8953.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index 4e17bc9f8167..610f3e3fc0c2 100644
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -399,7 +399,7 @@ tlmm: pinctrl@1000000 {
reg = <0x1000000 0x300000>;
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
- gpio-ranges = <&tlmm 0 0 155>;
+ gpio-ranges = <&tlmm 0 0 142>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
--
2.34.1
Correct the number of GPIOs in TLMM pin controller.
Fixes: 97e563bf5ba1 ("arm64: dts: qcom: sm6115: Add basic soc dtsi")
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/qcom/sm6115.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index 50cb8a82ecd5..b9fff0b0ea1c 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -363,7 +363,7 @@ tlmm: pinctrl@500000 {
reg-names = "west", "south", "east";
interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
- gpio-ranges = <&tlmm 0 0 121>;
+ gpio-ranges = <&tlmm 0 0 114>; /* GPIOs + ufs_reset */
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
--
2.34.1
On Donnerstag, 2. Februar 2023 11:44:43 CET Krzysztof Kozlowski wrote:
> The MSM8226 TLMM pin controller has GPIOs 0-116, so correct the pattern
> to bring back missing 107-109.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Luca Weiss <[email protected]>
> ---
> .../devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
> a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
> b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml index
> a29b8a9e1f31..6cb667fa8665 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
> @@ -56,7 +56,7 @@ $defs:
> subnode.
> items:
> oneOf:
> - - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$"
> + - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-6])$"
> - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
> sdc2_data ] minItems: 1
> maxItems: 36
On Donnerstag, 2. Februar 2023 11:44:46 CET Krzysztof Kozlowski wrote:
> The MSM8953 TLMM pin controller has GPIOs 0-141, so narrow the pattern.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Luca Weiss <[email protected]>
> ---
> .../devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
> a/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml
> b/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml index
> 6bcd52080801..ce219827ccc8 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml
> @@ -53,7 +53,7 @@ $defs:
> subnode.
> items:
> oneOf:
> - - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$"
> + - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[01])$"
> - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk,
> sdc2_cmd, sdc2_data, qdsd_clk, qdsd_cmd, qdsd_data0,
> qdsd_data1, qdsd_data2, qdsd_data3 ]
On Donnerstag, 2. Februar 2023 11:44:51 CET Krzysztof Kozlowski wrote:
> Correct the number of GPIOs in TLMM pin controller.
>
> Fixes: 9fb08c801923 ("arm64: dts: qcom: Add MSM8953 device tree")
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
Given msm8953 has gpio0 - gpio141, 142 looks correct.
Reviewed-by: Luca Weiss <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/msm8953.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi
> b/arch/arm64/boot/dts/qcom/msm8953.dtsi index 4e17bc9f8167..610f3e3fc0c2
> 100644
> --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
> @@ -399,7 +399,7 @@ tlmm: pinctrl@1000000 {
> reg = <0x1000000 0x300000>;
> interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
> gpio-controller;
> - gpio-ranges = <&tlmm 0 0 155>;
> + gpio-ranges = <&tlmm 0 0 142>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
On Thu, Feb 2, 2023 at 11:45 AM Krzysztof Kozlowski
<[email protected]> wrote:
> Changes since v1:
> 1. Match the driver's ngpios (so usually include the ufs-reset where
> applicable). Several patches were dropped, other rewritten.
> 2. Add tags
Needless to say I'm a big fan of the series:
Acked-by: Linus Walleij <[email protected]>
Will you send me a pull request for the pinctrl things as soon as
you feel confident it is finished, and I'll queue it up for v6.3?
Yours,
Linus Walleij
On Thu, 02 Feb 2023 11:44:43 +0100, Krzysztof Kozlowski wrote:
> The MSM8226 TLMM pin controller has GPIOs 0-116, so correct the pattern
> to bring back missing 107-109.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> .../devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Acked-by: Rob Herring <[email protected]>
On Thu, Feb 02, 2023 at 11:44:44AM +0100, Krzysztof Kozlowski wrote:
> The MSM8909 TLMM pin controller has GPIOs 0-112, so narrow the pattern
> and gpio-ranges in the example.
>
> Fixes: c249ec7ba1b1 ("dt-bindings: pinctrl: Add DT schema for qcom,msm8909-tlmm")
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> Reviewed-by: Stephan Gerhold <[email protected]>
> ---
> .../devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
> index 449e6e34be61..85082adc1811 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
> @@ -63,7 +63,7 @@ $defs:
> subnode.
> items:
> oneOf:
> - - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-7])$"
> + - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$"
> - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
> sdc2_data, qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1,
> qdsd_data2, qdsd_data3 ]
> @@ -127,7 +127,7 @@ examples:
> interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
> gpio-controller;
> #gpio-cells = <2>;
> - gpio-ranges = <&tlmm 0 0 117>;
> + gpio-ranges = <&tlmm 0 0 113>;
I thought 112 was the max?
> interrupt-controller;
> #interrupt-cells = <2>;
>
> --
> 2.34.1
>
On Thu, Feb 2, 2023 at 6:01 PM Rob Herring <[email protected]> wrote:
>
> On Thu, Feb 02, 2023 at 11:44:44AM +0100, Krzysztof Kozlowski wrote:
> > The MSM8909 TLMM pin controller has GPIOs 0-112, so narrow the pattern
> > and gpio-ranges in the example.
> >
> > Fixes: c249ec7ba1b1 ("dt-bindings: pinctrl: Add DT schema for qcom,msm8909-tlmm")
> > Signed-off-by: Krzysztof Kozlowski <[email protected]>
> > Reviewed-by: Stephan Gerhold <[email protected]>
> > ---
> > .../devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
> > index 449e6e34be61..85082adc1811 100644
> > --- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
> > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
> > @@ -63,7 +63,7 @@ $defs:
> > subnode.
> > items:
> > oneOf:
> > - - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-7])$"
> > + - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$"
> > - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
> > sdc2_data, qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1,
> > qdsd_data2, qdsd_data3 ]
> > @@ -127,7 +127,7 @@ examples:
> > interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
> > gpio-controller;
> > #gpio-cells = <2>;
> > - gpio-ranges = <&tlmm 0 0 117>;
> > + gpio-ranges = <&tlmm 0 0 113>;
>
> I thought 112 was the max?
That's the count, duh.
Acked-by: Rob Herring <[email protected]>
On Thu, 02 Feb 2023 11:44:45 +0100, Krzysztof Kozlowski wrote:
> The SM6375 TLMM pin controller has GPIOs 0-155, so narrow the pattern
> and gpio-ranges in the example.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> .../devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Acked-by: Rob Herring <[email protected]>
On Thu, 02 Feb 2023 11:44:46 +0100, Krzysztof Kozlowski wrote:
> The MSM8953 TLMM pin controller has GPIOs 0-141, so narrow the pattern.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> .../devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Acked-by: Rob Herring <[email protected]>
On Thu, 02 Feb 2023 11:44:47 +0100, Krzysztof Kozlowski wrote:
> The SDX55 TLMM pin controller has GPIOs 0-107, so narrow the pattern.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> .../devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Acked-by: Rob Herring <[email protected]>
On Thu, 02 Feb 2023 11:44:48 +0100, Krzysztof Kozlowski wrote:
> The MSM8994 TLMM pin controller has GPIOs 0-145, so narrow the pattern
> and reduce sizes of arrays with pins.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> .../devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
Acked-by: Rob Herring <[email protected]>
On Thu, 02 Feb 2023 11:44:49 +0100, Krzysztof Kozlowski wrote:
> Correct the number of GPIOs in gpio-ranges to match reality.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> .../devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml | 2 +-
> Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
Acked-by: Rob Herring <[email protected]>
On 02/02/2023 23:28, Linus Walleij wrote:
> On Thu, Feb 2, 2023 at 11:45 AM Krzysztof Kozlowski
> <[email protected]> wrote:
>
>> Changes since v1:
>> 1. Match the driver's ngpios (so usually include the ufs-reset where
>> applicable). Several patches were dropped, other rewritten.
>> 2. Add tags
>
> Needless to say I'm a big fan of the series:
> Acked-by: Linus Walleij <[email protected]>
>
> Will you send me a pull request for the pinctrl things as soon as
> you feel confident it is finished, and I'll queue it up for v6.3?
Sure!
Best regards,
Krzysztof
On Thu, 2 Feb 2023 11:44:43 +0100, Krzysztof Kozlowski wrote:
> The MSM8226 TLMM pin controller has GPIOs 0-116, so correct the pattern
> to bring back missing 107-109.
>
>
Applied, thanks!
[01/10] dt-bindings: pinctrl: qcom,msm8226: correct GPIO name pattern
https://git.kernel.org/krzk/linux-dt/c/792349083a7307bf34de26516bc047cfd5c6296b
Best regards,
--
Krzysztof Kozlowski <[email protected]>
On Thu, 2 Feb 2023 11:44:44 +0100, Krzysztof Kozlowski wrote:
> The MSM8909 TLMM pin controller has GPIOs 0-112, so narrow the pattern
> and gpio-ranges in the example.
>
>
Applied, thanks!
[02/10] dt-bindings: pinctrl: qcom,msm8909: correct GPIO name pattern and example
https://git.kernel.org/krzk/linux-dt/c/87b93dd1fbb23b9bbae461bb2c01f6d93c7524d9
Best regards,
--
Krzysztof Kozlowski <[email protected]>
On Thu, 2 Feb 2023 11:44:45 +0100, Krzysztof Kozlowski wrote:
> The SM6375 TLMM pin controller has GPIOs 0-155, so narrow the pattern
> and gpio-ranges in the example.
>
>
Applied, thanks!
[03/10] dt-bindings: pinctrl: qcom,sm6375: correct GPIO name pattern and example
https://git.kernel.org/krzk/linux-dt/c/a51c1f0244c84e482f1ceb4701c38aaa4b224baf
Best regards,
--
Krzysztof Kozlowski <[email protected]>
On Thu, 2 Feb 2023 11:44:46 +0100, Krzysztof Kozlowski wrote:
> The MSM8953 TLMM pin controller has GPIOs 0-141, so narrow the pattern.
>
>
Applied, thanks!
[04/10] dt-bindings: pinctrl: qcom,msm8953: correct GPIO name pattern
https://git.kernel.org/krzk/linux-dt/c/913137a1cd1e792587e8ae2a43d31389fdbaddf6
Best regards,
--
Krzysztof Kozlowski <[email protected]>
On Thu, 2 Feb 2023 11:44:47 +0100, Krzysztof Kozlowski wrote:
> The SDX55 TLMM pin controller has GPIOs 0-107, so narrow the pattern.
>
>
Applied, thanks!
[05/10] dt-bindings: pinctrl: qcom,sdx55: correct GPIO name pattern
https://git.kernel.org/krzk/linux-dt/c/5c7069712c9be01d1bf9061a7ef5ce78df0af0a5
Best regards,
--
Krzysztof Kozlowski <[email protected]>
On Thu, 2 Feb 2023 11:44:48 +0100, Krzysztof Kozlowski wrote:
> The MSM8994 TLMM pin controller has GPIOs 0-145, so narrow the pattern
> and reduce sizes of arrays with pins.
>
>
Applied, thanks!
[06/10] dt-bindings: pinctrl: qcom,msm8994: correct number of GPIOs
https://git.kernel.org/krzk/linux-dt/c/174668bf5f6c2dd03441a4660e249cc5e2c78b95
Best regards,
--
Krzysztof Kozlowski <[email protected]>
On Thu, 2 Feb 2023 11:44:49 +0100, Krzysztof Kozlowski wrote:
> Correct the number of GPIOs in gpio-ranges to match reality.
>
>
Applied, thanks!
[07/10] dt-bindings: pinctrl: qcom: correct gpio-ranges in examples
https://git.kernel.org/krzk/linux-dt/c/6f4e10ffa8fbccf220f7c5c869e8373065b9ef7d
Best regards,
--
Krzysztof Kozlowski <[email protected]>
On 2/2/23 12:44, Krzysztof Kozlowski wrote:
> Correct the number of GPIOs in TLMM pin controller.
>
> Fixes: 97e563bf5ba1 ("arm64: dts: qcom: sm6115: Add basic soc dtsi")
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Iskren Chernev <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sm6115.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> index 50cb8a82ecd5..b9fff0b0ea1c 100644
> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> @@ -363,7 +363,7 @@ tlmm: pinctrl@500000 {
> reg-names = "west", "south", "east";
> interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
> gpio-controller;
> - gpio-ranges = <&tlmm 0 0 121>;
> + gpio-ranges = <&tlmm 0 0 114>; /* GPIOs + ufs_reset */
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
On Thu, 2 Feb 2023 11:44:42 +0100, Krzysztof Kozlowski wrote:
> Changes since v1:
> 1. Match the driver's ngpios (so usually include the ufs-reset where
> applicable). Several patches were dropped, other rewritten.
> 2. Add tags
>
> Best regards,
> Krzysztof
>
> [...]
Applied, thanks!
[08/10] ARM: dts: qcom: sdx55: correct TLMM gpio-ranges
commit: 2291bbd74f3869fb0400a6f867e2ec6d2620b1c2
Best regards,
--
Bjorn Andersson <[email protected]>