This patchset enables Crypto Engine support for Qualcomm SoCs like
SM6115, SM8150, SM8250 and SM8350.
While at it, also fix the compatible string for BAM DMA engine
used in sdm845.dtsi
Note that:
- SM8250 crypto engine patch utilizes the work already done by myself and
Vladimir.
- SM8350 crypto engine patch utilizes the work already done by Robert.
This patchset depends on the dt-bindings patch which added support for
SM6115 and QCS2290 SoCs:
https://lore.kernel.org/linux-arm-msm/[email protected]/
Also this patchset is rebased on linux-next/master.
Bhupesh Sharma (5):
arm64: dts: qcom: sdm845: Fix the BAM DMA engine compatible string
arm64: dts: qcom: sm6115: Add Crypto Engine support
arm64: dts: qcom: sm8150: Add Crypto Engine support
arm64: dts: qcom: sm8250: Add Crypto Engine support
arm64: dts: qcom: sm8350: Add Crypto Engine support
arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sm6115.dtsi | 26 ++++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/sm8150.dtsi | 26 ++++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/sm8250.dtsi | 26 ++++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/sm8350.dtsi | 26 ++++++++++++++++++++++++++
5 files changed, 105 insertions(+), 1 deletion(-)
--
2.38.1
As per documentation, Qualcomm SDM845 SoC supports BAM DMA
engine v1.7.4, so use the correct compatible strings.
Signed-off-by: Bhupesh Sharma <[email protected]>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 0fdd59a9feed..e8e9aa4da914 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -2628,7 +2628,7 @@ ufs_mem_phy_lanes: phy@1d87400 {
};
cryptobam: dma-controller@1dc4000 {
- compatible = "qcom,bam-v1.7.0";
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
reg = <0 0x01dc4000 0 0x24000>;
interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rpmhcc RPMH_CE_CLK>;
--
2.38.1
Add crypto engine (CE) and CE BAM related nodes and definitions to
'sm6115.dtsi'.
Signed-off-by: Bhupesh Sharma <[email protected]>
---
arch/arm64/boot/dts/qcom/sm6115.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index c56738633431..b2d2cdde41fa 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -664,6 +664,32 @@ usb_1_hsphy: phy@1613000 {
status = "disabled";
};
+ cryptobam: dma-controller@1b04000 {
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+ reg = <0x0 0x01b04000 0x0 0x24000>;
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely;
+ num-channels = <8>;
+ qcom,num-ees = <2>;
+ iommus = <&apps_smmu 0x84 0x11>,
+ <&apps_smmu 0x86 0x11>,
+ <&apps_smmu 0x94 0x11>,
+ <&apps_smmu 0x96 0x11>;
+ };
+
+ crypto: crypto@1b3a000 {
+ compatible = "qcom,sm6115-qce", "qcom,sm8150-qce", "qcom,qce";
+ reg = <0x0 0x01b3a000 0x0 0x6000>;
+ dmas = <&cryptobam 6>, <&cryptobam 7>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x84 0x11>,
+ <&apps_smmu 0x86 0x11>,
+ <&apps_smmu 0x94 0x11>,
+ <&apps_smmu 0x96 0x11>;
+ };
+
qfprom@1b40000 {
compatible = "qcom,sm6115-qfprom", "qcom,qfprom";
reg = <0x0 0x01b40000 0x0 0x7000>;
--
2.38.1
Add crypto engine (CE) and CE BAM related nodes and definitions to
'sm8150.dtsi'.
Signed-off-by: Bhupesh Sharma <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 662098e85b97..6fb3596d3c01 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -2082,6 +2082,32 @@ ufs_mem_phy_lanes: phy@1d87400 {
};
};
+ cryptobam: dma-controller@1dc4000 {
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+ reg = <0 0x01dc4000 0 0x24000>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely;
+ iommus = <&apps_smmu 0x504 0x0011>,
+ <&apps_smmu 0x506 0x0011>,
+ <&apps_smmu 0x514 0x0011>,
+ <&apps_smmu 0x516 0x0011>;
+ };
+
+ crypto: crypto@1dfa000 {
+ compatible = "qcom,sm8150-qce", "qcom,qce";
+ reg = <0 0x01dfa000 0 0x6000>;
+ dmas = <&cryptobam 4>, <&cryptobam 5>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x504 0x0011>,
+ <&apps_smmu 0x506 0x0011>,
+ <&apps_smmu 0x514 0x0011>,
+ <&apps_smmu 0x516 0x0011>;
+ interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>;
+ interconnect-names = "memory";
+ };
+
tcsr_mutex: hwlock@1f40000 {
compatible = "qcom,tcsr-mutex";
reg = <0x0 0x01f40000 0x0 0x20000>;
--
2.38.1
Add crypto engine (CE) and CE BAM related nodes and definitions to
'sm8250.dtsi'.
Co-developed-by and Signed-off-by: Vladimir Zapolskiy <[email protected]>
Signed-off-by: Bhupesh Sharma <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 7ccec48255f0..009e992d2d6e 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2223,6 +2223,32 @@ ufs_mem_phy_lanes: phy@1d87400 {
};
};
+ cryptobam: dma-controller@1dc4000 {
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+ reg = <0 0x01dc4000 0 0x24000>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely;
+ iommus = <&apps_smmu 0x584 0x0011>,
+ <&apps_smmu 0x586 0x0011>,
+ <&apps_smmu 0x594 0x0011>,
+ <&apps_smmu 0x596 0x0011>;
+ };
+
+ crypto: crypto@1dfa000 {
+ compatible = "qcom,sm8250-qce", "qcom,sm8150-qce", "qcom,qce";
+ reg = <0 0x01dfa000 0 0x6000>;
+ dmas = <&cryptobam 4>, <&cryptobam 5>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x584 0x0011>,
+ <&apps_smmu 0x586 0x0011>,
+ <&apps_smmu 0x594 0x0011>,
+ <&apps_smmu 0x596 0x0011>;
+ interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>;
+ interconnect-names = "memory";
+ };
+
tcsr_mutex: hwlock@1f40000 {
compatible = "qcom,tcsr-mutex";
reg = <0x0 0x01f40000 0x0 0x40000>;
--
2.38.1
Add crypto engine (CE) and CE BAM related nodes and definitions to
'sm8350.dtsi'.
Co-developed-by and Signed-off-by: Robert Foss <[email protected]>
Signed-off-by: Bhupesh Sharma <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index b2f1ea4b671e..d017a0a11fcb 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -1730,6 +1730,32 @@ ufs_mem_phy_lanes: phy@1d87400 {
};
};
+ cryptobam: dma-controller@1dc4000 {
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+ reg = <0 0x01dc4000 0 0x24000>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely;
+ iommus = <&apps_smmu 0x584 0x0011>,
+ <&apps_smmu 0x586 0x0011>,
+ <&apps_smmu 0x594 0x0011>,
+ <&apps_smmu 0x596 0x0011>;
+ };
+
+ crypto: crypto@1dfa000 {
+ compatible = "qcom,sm8350-qce", "qcom,sm8150-qce", "qcom,qce";
+ reg = <0 0x01dfa000 0 0x6000>;
+ dmas = <&cryptobam 4>, <&cryptobam 5>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x584 0x0011>,
+ <&apps_smmu 0x586 0x0011>,
+ <&apps_smmu 0x594 0x0011>,
+ <&apps_smmu 0x596 0x0011>;
+ interconnects = <&aggre2_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>;
+ interconnect-names = "memory";
+ };
+
ipa: ipa@1e40000 {
compatible = "qcom,sm8350-ipa";
--
2.38.1
On 21.03.2023 20:01, Bhupesh Sharma wrote:
> This patchset enables Crypto Engine support for Qualcomm SoCs like
> SM6115, SM8150, SM8250 and SM8350.
>
> While at it, also fix the compatible string for BAM DMA engine
> used in sdm845.dtsi
>
> Note that:
> - SM8250 crypto engine patch utilizes the work already done by myself and
> Vladimir.
> - SM8350 crypto engine patch utilizes the work already done by Robert.
>
> This patchset depends on the dt-bindings patch which added support for
> SM6115 and QCS2290 SoCs:
> https://lore.kernel.org/linux-arm-msm/[email protected]/
You could have included that one here for easier tracking!
Konrad
>
> Also this patchset is rebased on linux-next/master.
>
> Bhupesh Sharma (5):
> arm64: dts: qcom: sdm845: Fix the BAM DMA engine compatible string
> arm64: dts: qcom: sm6115: Add Crypto Engine support
> arm64: dts: qcom: sm8150: Add Crypto Engine support
> arm64: dts: qcom: sm8250: Add Crypto Engine support
> arm64: dts: qcom: sm8350: Add Crypto Engine support
>
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
> arch/arm64/boot/dts/qcom/sm6115.dtsi | 26 ++++++++++++++++++++++++++
> arch/arm64/boot/dts/qcom/sm8150.dtsi | 26 ++++++++++++++++++++++++++
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 26 ++++++++++++++++++++++++++
> arch/arm64/boot/dts/qcom/sm8350.dtsi | 26 ++++++++++++++++++++++++++
> 5 files changed, 105 insertions(+), 1 deletion(-)
>
On 21.03.2023 20:01, Bhupesh Sharma wrote:
> As per documentation, Qualcomm SDM845 SoC supports BAM DMA
> engine v1.7.4, so use the correct compatible strings.
>
> Signed-off-by: Bhupesh Sharma <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 0fdd59a9feed..e8e9aa4da914 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -2628,7 +2628,7 @@ ufs_mem_phy_lanes: phy@1d87400 {
> };
>
> cryptobam: dma-controller@1dc4000 {
> - compatible = "qcom,bam-v1.7.0";
> + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
> reg = <0 0x01dc4000 0 0x24000>;
> interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&rpmhcc RPMH_CE_CLK>;
On Wed, Mar 22, 2023 at 12:31:15AM +0530, Bhupesh Sharma wrote:
> Add crypto engine (CE) and CE BAM related nodes and definitions to
> 'sm6115.dtsi'.
>
> Signed-off-by: Bhupesh Sharma <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sm6115.dtsi | 26 ++++++++++++++++++++++++++
> 1 file changed, 26 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> index c56738633431..b2d2cdde41fa 100644
> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> @@ -664,6 +664,32 @@ usb_1_hsphy: phy@1613000 {
> status = "disabled";
> };
>
> + cryptobam: dma-controller@1b04000 {
> + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
> + reg = <0x0 0x01b04000 0x0 0x24000>;
> + interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
> + #dma-cells = <1>;
> + qcom,ee = <0>;
> + qcom,controlled-remotely;
> + num-channels = <8>;
> + qcom,num-ees = <2>;
> + iommus = <&apps_smmu 0x84 0x11>,
> + <&apps_smmu 0x86 0x11>,
> + <&apps_smmu 0x94 0x11>,
> + <&apps_smmu 0x96 0x11>;
> + };
> +
> + crypto: crypto@1b3a000 {
> + compatible = "qcom,sm6115-qce", "qcom,sm8150-qce", "qcom,qce";
> + reg = <0x0 0x01b3a000 0x0 0x6000>;
> + dmas = <&cryptobam 6>, <&cryptobam 7>;
> + dma-names = "rx", "tx";
> + iommus = <&apps_smmu 0x84 0x11>,
> + <&apps_smmu 0x86 0x11>,
> + <&apps_smmu 0x94 0x11>,
> + <&apps_smmu 0x96 0x11>;
If you apply the 0x11 mask to the stream ID then the last two items here
are identical to the first two (0x94 & ~0x11 = 0x84). Why are they
needed? They look redundant to me.
Thanks,
Stephan
On Wed, 22 Mar 2023 at 00:57, Konrad Dybcio <[email protected]> wrote:
>
>
>
> On 21.03.2023 20:01, Bhupesh Sharma wrote:
> > This patchset enables Crypto Engine support for Qualcomm SoCs like
> > SM6115, SM8150, SM8250 and SM8350.
> >
> > While at it, also fix the compatible string for BAM DMA engine
> > used in sdm845.dtsi
> >
> > Note that:
> > - SM8250 crypto engine patch utilizes the work already done by myself and
> > Vladimir.
> > - SM8350 crypto engine patch utilizes the work already done by Robert.
> >
> > This patchset depends on the dt-bindings patch which added support for
> > SM6115 and QCS2290 SoCs:
> > https://lore.kernel.org/linux-arm-msm/[email protected]/
> You could have included that one here for easier tracking!
Err.. the dt-binding maintainers have been asking to split the
dt-binding patches from
the dts ones in the past. So, let's stick to that for now :)
Thanks.
> > Also this patchset is rebased on linux-next/master.
> >
> > Bhupesh Sharma (5):
> > arm64: dts: qcom: sdm845: Fix the BAM DMA engine compatible string
> > arm64: dts: qcom: sm6115: Add Crypto Engine support
> > arm64: dts: qcom: sm8150: Add Crypto Engine support
> > arm64: dts: qcom: sm8250: Add Crypto Engine support
> > arm64: dts: qcom: sm8350: Add Crypto Engine support
> >
> > arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
> > arch/arm64/boot/dts/qcom/sm6115.dtsi | 26 ++++++++++++++++++++++++++
> > arch/arm64/boot/dts/qcom/sm8150.dtsi | 26 ++++++++++++++++++++++++++
> > arch/arm64/boot/dts/qcom/sm8250.dtsi | 26 ++++++++++++++++++++++++++
> > arch/arm64/boot/dts/qcom/sm8350.dtsi | 26 ++++++++++++++++++++++++++
> > 5 files changed, 105 insertions(+), 1 deletion(-)
> >
On 22.03.2023 09:33, Bhupesh Sharma wrote:
> On Wed, 22 Mar 2023 at 00:57, Konrad Dybcio <[email protected]> wrote:
>>
>>
>>
>> On 21.03.2023 20:01, Bhupesh Sharma wrote:
>>> This patchset enables Crypto Engine support for Qualcomm SoCs like
>>> SM6115, SM8150, SM8250 and SM8350.
>>>
>>> While at it, also fix the compatible string for BAM DMA engine
>>> used in sdm845.dtsi
>>>
>>> Note that:
>>> - SM8250 crypto engine patch utilizes the work already done by myself and
>>> Vladimir.
>>> - SM8350 crypto engine patch utilizes the work already done by Robert.
>>>
>>> This patchset depends on the dt-bindings patch which added support for
>>> SM6115 and QCS2290 SoCs:
>>> https://lore.kernel.org/linux-arm-msm/[email protected]/
>> You could have included that one here for easier tracking!
>
> Err.. the dt-binding maintainers have been asking to split the
> dt-binding patches from
> the dts ones in the past.
Quite the opposite!
So, let's stick to that for now :)
Konrad
>
> Thanks.
>
>>> Also this patchset is rebased on linux-next/master.
>>>
>>> Bhupesh Sharma (5):
>>> arm64: dts: qcom: sdm845: Fix the BAM DMA engine compatible string
>>> arm64: dts: qcom: sm6115: Add Crypto Engine support
>>> arm64: dts: qcom: sm8150: Add Crypto Engine support
>>> arm64: dts: qcom: sm8250: Add Crypto Engine support
>>> arm64: dts: qcom: sm8350: Add Crypto Engine support
>>>
>>> arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
>>> arch/arm64/boot/dts/qcom/sm6115.dtsi | 26 ++++++++++++++++++++++++++
>>> arch/arm64/boot/dts/qcom/sm8150.dtsi | 26 ++++++++++++++++++++++++++
>>> arch/arm64/boot/dts/qcom/sm8250.dtsi | 26 ++++++++++++++++++++++++++
>>> arch/arm64/boot/dts/qcom/sm8350.dtsi | 26 ++++++++++++++++++++++++++
>>> 5 files changed, 105 insertions(+), 1 deletion(-)
>>>
On 22/03/2023 09:33, Bhupesh Sharma wrote:
> On Wed, 22 Mar 2023 at 00:57, Konrad Dybcio <[email protected]> wrote:
>>
>>
>>
>> On 21.03.2023 20:01, Bhupesh Sharma wrote:
>>> This patchset enables Crypto Engine support for Qualcomm SoCs like
>>> SM6115, SM8150, SM8250 and SM8350.
>>>
>>> While at it, also fix the compatible string for BAM DMA engine
>>> used in sdm845.dtsi
>>>
>>> Note that:
>>> - SM8250 crypto engine patch utilizes the work already done by myself and
>>> Vladimir.
>>> - SM8350 crypto engine patch utilizes the work already done by Robert.
>>>
>>> This patchset depends on the dt-bindings patch which added support for
>>> SM6115 and QCS2290 SoCs:
>>> https://lore.kernel.org/linux-arm-msm/[email protected]/
>> You could have included that one here for easier tracking!
>
> Err.. the dt-binding maintainers have been asking to split the
> dt-binding patches from
> the dts ones in the past. So, let's stick to that for now :)
For submissions? No, we did not.
Best regards,
Krzysztof
On Wed, 22 Mar 2023 at 02:09, Stephan Gerhold <[email protected]> wrote:
>
> On Wed, Mar 22, 2023 at 12:31:15AM +0530, Bhupesh Sharma wrote:
> > Add crypto engine (CE) and CE BAM related nodes and definitions to
> > 'sm6115.dtsi'.
> >
> > Signed-off-by: Bhupesh Sharma <[email protected]>
> > ---
> > arch/arm64/boot/dts/qcom/sm6115.dtsi | 26 ++++++++++++++++++++++++++
> > 1 file changed, 26 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> > index c56738633431..b2d2cdde41fa 100644
> > --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> > @@ -664,6 +664,32 @@ usb_1_hsphy: phy@1613000 {
> > status = "disabled";
> > };
> >
> > + cryptobam: dma-controller@1b04000 {
> > + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
> > + reg = <0x0 0x01b04000 0x0 0x24000>;
> > + interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
> > + #dma-cells = <1>;
> > + qcom,ee = <0>;
> > + qcom,controlled-remotely;
> > + num-channels = <8>;
> > + qcom,num-ees = <2>;
> > + iommus = <&apps_smmu 0x84 0x11>,
> > + <&apps_smmu 0x86 0x11>,
> > + <&apps_smmu 0x94 0x11>,
> > + <&apps_smmu 0x96 0x11>;
> > + };
> > +
> > + crypto: crypto@1b3a000 {
> > + compatible = "qcom,sm6115-qce", "qcom,sm8150-qce", "qcom,qce";
> > + reg = <0x0 0x01b3a000 0x0 0x6000>;
> > + dmas = <&cryptobam 6>, <&cryptobam 7>;
> > + dma-names = "rx", "tx";
> > + iommus = <&apps_smmu 0x84 0x11>,
> > + <&apps_smmu 0x86 0x11>,
> > + <&apps_smmu 0x94 0x11>,
> > + <&apps_smmu 0x96 0x11>;
>
> If you apply the 0x11 mask to the stream ID then the last two items here
> are identical to the first two (0x94 & ~0x11 = 0x84). Why are they
> needed? They look redundant to me.
Thanks, I will check them out and fix them in v2.
Regards.
On Wed, 22 Mar 2023 00:31:13 +0530, Bhupesh Sharma wrote:
> This patchset enables Crypto Engine support for Qualcomm SoCs like
> SM6115, SM8150, SM8250 and SM8350.
>
> While at it, also fix the compatible string for BAM DMA engine
> used in sdm845.dtsi
>
> Note that:
> - SM8250 crypto engine patch utilizes the work already done by myself and
> Vladimir.
> - SM8350 crypto engine patch utilizes the work already done by Robert.
>
> [...]
Applied, thanks!
[1/5] arm64: dts: qcom: sdm845: Fix the BAM DMA engine compatible string
commit: b767d1b40cbca49452d712ca0f4f053dacfc5c45
Best regards,
--
Bjorn Andersson <[email protected]>