If the WP# signal of the flash device is either not connected or is wrongly
tied to GND (that includes internal pull-downs), and the software sets the
status register write disable (SRWD) bit in the status register then the
status register permanently becomes read-only. To avoid this added a new
boolean DT property "no-wp". If this property is set in the DT then the
software avoids setting the SRWD during status register write operation.
Signed-off-by: Amit Kumar Mahapatra <[email protected]>
---
As the DT property name has changed so, removed Reviewed-by tag.
@Cornor if possible, could you please review this updated patch.
---
.../devicetree/bindings/mtd/jedec,spi-nor.yaml | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
index 89959e5c47ba..97344969b02d 100644
--- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
+++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
@@ -70,6 +70,21 @@ properties:
be used on such systems, to denote the absence of a reliable reset
mechanism.
+ no-wp:
+ type: boolean
+ description:
+ The status register write disable (SRWD) bit in status register, combined
+ with the WP# signal, provides hardware data protection for the device. When
+ the SRWD bit is set to 1, and the WP# signal is either driven LOW or hard
+ strapped to LOW, the status register nonvolatile bits become read-only and
+ the WRITE STATUS REGISTER operation will not execute. The only way to exit
+ this hardware-protected mode is to drive WP# HIGH. If the WP# signal of the
+ flash device is not connected or is wrongly tied to GND (that includes internal
+ pull-downs) then status register permanently becomes read-only as the SRWD bit
+ cannot be reset. This boolean flag can be used on such systems to avoid setting
+ the SRWD bit while writing the status register. WP# signal hard strapped to GND
+ can be a valid use case.
+
reset-gpios:
description:
A GPIO line connected to the RESET (active low) signal of the device.
--
2.17.1
On Sun, 25 Jun 2023 15:32:50 +0530, Amit Kumar Mahapatra wrote:
> If the WP# signal of the flash device is either not connected or is wrongly
> tied to GND (that includes internal pull-downs), and the software sets the
> status register write disable (SRWD) bit in the status register then the
> status register permanently becomes read-only. To avoid this added a new
> boolean DT property "no-wp". If this property is set in the DT then the
> software avoids setting the SRWD during status register write operation.
>
> Signed-off-by: Amit Kumar Mahapatra <[email protected]>
> ---
> As the DT property name has changed so, removed Reviewed-by tag.
> @Cornor if possible, could you please review this updated patch.
> ---
> .../devicetree/bindings/mtd/jedec,spi-nor.yaml | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
Reviewed-by: Rob Herring <[email protected]>
On Sun, Jun 25, 2023 at 03:32:50PM +0530, Amit Kumar Mahapatra wrote:
> If the WP# signal of the flash device is either not connected or is wrongly
> tied to GND (that includes internal pull-downs), and the software sets the
> status register write disable (SRWD) bit in the status register then the
> status register permanently becomes read-only. To avoid this added a new
> boolean DT property "no-wp". If this property is set in the DT then the
> software avoids setting the SRWD during status register write operation.
>
> Signed-off-by: Amit Kumar Mahapatra <[email protected]>
> ---
> As the DT property name has changed so, removed Reviewed-by tag.
> @Cornor if possible, could you please review this updated patch.
Rob was the one who objected to the property name.
Old & new names are fine by me, it was the text I think I cared about.
Reviewed-by: Conor Dooley <[email protected]>
Thanks for actually explaining why you dropped the tag,
Conor.
> ---
> .../devicetree/bindings/mtd/jedec,spi-nor.yaml | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
> index 89959e5c47ba..97344969b02d 100644
> --- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
> +++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
> @@ -70,6 +70,21 @@ properties:
> be used on such systems, to denote the absence of a reliable reset
> mechanism.
>
> + no-wp:
> + type: boolean
> + description:
> + The status register write disable (SRWD) bit in status register, combined
> + with the WP# signal, provides hardware data protection for the device. When
> + the SRWD bit is set to 1, and the WP# signal is either driven LOW or hard
> + strapped to LOW, the status register nonvolatile bits become read-only and
> + the WRITE STATUS REGISTER operation will not execute. The only way to exit
> + this hardware-protected mode is to drive WP# HIGH. If the WP# signal of the
> + flash device is not connected or is wrongly tied to GND (that includes internal
> + pull-downs) then status register permanently becomes read-only as the SRWD bit
> + cannot be reset. This boolean flag can be used on such systems to avoid setting
> + the SRWD bit while writing the status register. WP# signal hard strapped to GND
> + can be a valid use case.
> +
> reset-gpios:
> description:
> A GPIO line connected to the RESET (active low) signal of the device.
> --
> 2.17.1
>
Am 2023-06-25 12:02, schrieb Amit Kumar Mahapatra:
> If the WP# signal of the flash device is either not connected or is
> wrongly
> tied to GND (that includes internal pull-downs), and the software sets
> the
> status register write disable (SRWD) bit in the status register then
> the
> status register permanently becomes read-only. To avoid this added a
> new
> boolean DT property "no-wp". If this property is set in the DT then the
> software avoids setting the SRWD during status register write
> operation.
>
> Signed-off-by: Amit Kumar Mahapatra <[email protected]>
> ---
> As the DT property name has changed so, removed Reviewed-by tag.
> @Cornor if possible, could you please review this updated patch.
> ---
> .../devicetree/bindings/mtd/jedec,spi-nor.yaml | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
> b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
> index 89959e5c47ba..97344969b02d 100644
> --- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
> +++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
> @@ -70,6 +70,21 @@ properties:
> be used on such systems, to denote the absence of a reliable
> reset
> mechanism.
>
> + no-wp:
> + type: boolean
> + description:
> + The status register write disable (SRWD) bit in status register,
> combined
> + with the WP# signal, provides hardware data protection for the
> device. When
> + the SRWD bit is set to 1, and the WP# signal is either driven
> LOW or hard
> + strapped to LOW, the status register nonvolatile bits become
> read-only and
> + the WRITE STATUS REGISTER operation will not execute. The only
> way to exit
> + this hardware-protected mode is to drive WP# HIGH. If the WP#
> signal of the
> + flash device is not connected or is wrongly tied to GND (that
> includes internal
> + pull-downs) then status register permanently becomes read-only
> as the SRWD bit
> + cannot be reset. This boolean flag can be used on such systems
> to avoid setting
> + the SRWD bit while writing the status register. WP# signal hard
> strapped to GND
> + can be a valid use case.
> +
Sounds good! Thank you.
Reviewed-by: Michael Walle <[email protected]>
-michael