commit 914d6f44fc50 ("RISC-V: only iterate over possible CPUs in ISA
string parser") changed riscv_fill_hwcap() from iterating over CPU DT
nodes to iterating over logical CPU IDs. Since this function runs long
before cpu_dev_init() creates CPU devices, it hits the fallback path in
of_cpu_device_node_get(), which itself iterates over the DT nodes,
searching for a node with the requested CPU ID. (Incidentally, this
makes riscv_fill_hwcap() now take quadratic time.)
riscv_fill_hwcap() passes a logical CPU ID to of_cpu_device_node_get(),
which uses the arch_match_cpu_phys_id() hook to translate the logical ID
to a physical ID as found in the DT.
arch_match_cpu_phys_id() has a generic weak definition, and RISC-V
provides a strong definition using cpuid_to_hartid_map(). However, the
RISC-V specific implementation is located in arch/riscv/kernel/smp.c,
and that file is only compiled when SMP is enabled.
As a result, when SMP is disabled, the generic definition is used, and
riscv_isa gets initialized based on the ISA string of hart 0, not the
boot hart. On FU740, this means has_fpu() returns false, and userspace
crashes when trying to use floating-point instructions.
Fix this by moving arch_match_cpu_phys_id() to a file which is always
compiled.
Fixes: 70114560b285 ("RISC-V: Add RISC-V specific arch_match_cpu_phys_id")
Fixes: 914d6f44fc50 ("RISC-V: only iterate over possible CPUs in ISA string parser")
Reported-by: Palmer Dabbelt <[email protected]>
Signed-off-by: Samuel Holland <[email protected]>
---
arch/riscv/kernel/cpu.c | 5 +++++
arch/riscv/kernel/smp.c | 5 -----
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index a2fc952318e9..35b854cf078e 100644
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -17,6 +17,11 @@
#include <asm/smp.h>
#include <asm/pgtable.h>
+bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
+{
+ return phys_id == cpuid_to_hartid_map(cpu);
+}
+
/*
* Returns the hart ID of the given device tree node, or -ENODEV if the node
* isn't an enabled and valid RISC-V hart node.
diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c
index 85bbce0f758c..40420afbb1a0 100644
--- a/arch/riscv/kernel/smp.c
+++ b/arch/riscv/kernel/smp.c
@@ -61,11 +61,6 @@ int riscv_hartid_to_cpuid(unsigned long hartid)
return -ENOENT;
}
-bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
-{
- return phys_id == cpuid_to_hartid_map(cpu);
-}
-
static void ipi_stop(void)
{
set_cpu_online(smp_processor_id(), false);
--
2.41.0
On Wed, Aug 02, 2023 at 06:26:06PM -0700, Samuel Holland wrote:
> commit 914d6f44fc50 ("RISC-V: only iterate over possible CPUs in ISA
> string parser") changed riscv_fill_hwcap() from iterating over CPU DT
> nodes to iterating over logical CPU IDs. Since this function runs long
> before cpu_dev_init() creates CPU devices, it hits the fallback path in
> of_cpu_device_node_get(), which itself iterates over the DT nodes,
> searching for a node with the requested CPU ID.
> (Incidentally, this
> makes riscv_fill_hwcap() now take quadratic time.)
Ouch, that I did not realise. Should we revert that portion of the
changes? Starting to sound like we should..
> riscv_fill_hwcap() passes a logical CPU ID to of_cpu_device_node_get(),
> which uses the arch_match_cpu_phys_id() hook to translate the logical ID
> to a physical ID as found in the DT.
>
> arch_match_cpu_phys_id() has a generic weak definition, and RISC-V
> provides a strong definition using cpuid_to_hartid_map(). However, the
> RISC-V specific implementation is located in arch/riscv/kernel/smp.c,
> and that file is only compiled when SMP is enabled.
>
> As a result, when SMP is disabled, the generic definition is used, and
> riscv_isa gets initialized based on the ISA string of hart 0, not the
> boot hart. On FU740, this means has_fpu() returns false, and userspace
> crashes when trying to use floating-point instructions.
>
> Fix this by moving arch_match_cpu_phys_id() to a file which is always
> compiled.
>
> Fixes: 70114560b285 ("RISC-V: Add RISC-V specific arch_match_cpu_phys_id")
> Fixes: 914d6f44fc50 ("RISC-V: only iterate over possible CPUs in ISA string parser")
> Reported-by: Palmer Dabbelt <[email protected]>
> Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Thanks for fixing this Samuel.
Hello:
This patch was applied to riscv/linux.git (fixes)
by Palmer Dabbelt <[email protected]>:
On Wed, 2 Aug 2023 18:26:06 -0700 you wrote:
> commit 914d6f44fc50 ("RISC-V: only iterate over possible CPUs in ISA
> string parser") changed riscv_fill_hwcap() from iterating over CPU DT
> nodes to iterating over logical CPU IDs. Since this function runs long
> before cpu_dev_init() creates CPU devices, it hits the fallback path in
> of_cpu_device_node_get(), which itself iterates over the DT nodes,
> searching for a node with the requested CPU ID. (Incidentally, this
> makes riscv_fill_hwcap() now take quadratic time.)
>
> [...]
Here is the summary with links:
- riscv: Fix CPU feature detection with SMP disabled
https://git.kernel.org/riscv/c/6514f81e1bd5
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
On Wed, 02 Aug 2023 18:26:06 -0700, Samuel Holland wrote:
> commit 914d6f44fc50 ("RISC-V: only iterate over possible CPUs in ISA
> string parser") changed riscv_fill_hwcap() from iterating over CPU DT
> nodes to iterating over logical CPU IDs. Since this function runs long
> before cpu_dev_init() creates CPU devices, it hits the fallback path in
> of_cpu_device_node_get(), which itself iterates over the DT nodes,
> searching for a node with the requested CPU ID. (Incidentally, this
> makes riscv_fill_hwcap() now take quadratic time.)
>
> [...]
Applied, thanks!
[1/1] riscv: Fix CPU feature detection with SMP disabled
https://git.kernel.org/palmer/c/6514f81e1bd5
Best regards,
--
Palmer Dabbelt <[email protected]>