clk_get_rate() may do a mutex lock. Fetch the clock rate once, and prevent
rate changes using clk_rate_exclusive_get().
Signed-off-by: Sean Young <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
---
drivers/pwm/pwm-bcm2835.c | 38 +++++++++++++++++++++++++++++---------
1 file changed, 29 insertions(+), 9 deletions(-)
diff --git a/drivers/pwm/pwm-bcm2835.c b/drivers/pwm/pwm-bcm2835.c
index ab30667f4f95..307c0bd5f885 100644
--- a/drivers/pwm/pwm-bcm2835.c
+++ b/drivers/pwm/pwm-bcm2835.c
@@ -28,6 +28,7 @@ struct bcm2835_pwm {
struct device *dev;
void __iomem *base;
struct clk *clk;
+ unsigned long rate;
};
static inline struct bcm2835_pwm *to_bcm2835_pwm(struct pwm_chip *chip)
@@ -63,17 +64,11 @@ static int bcm2835_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
{
struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
- unsigned long rate = clk_get_rate(pc->clk);
unsigned long long period_cycles;
u64 max_period;
u32 val;
- if (!rate) {
- dev_err(pc->dev, "failed to get clock rate\n");
- return -EINVAL;
- }
-
/*
* period_cycles must be a 32 bit value, so period * rate / NSEC_PER_SEC
* must be <= U32_MAX. As U32_MAX * NSEC_PER_SEC < U64_MAX the
@@ -88,13 +83,13 @@ static int bcm2835_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
* <=> period < ((U32_MAX * NSEC_PER_SEC + NSEC_PER_SEC/2) / rate
* <=> period <= ceil((U32_MAX * NSEC_PER_SEC + NSEC_PER_SEC/2) / rate) - 1
*/
- max_period = DIV_ROUND_UP_ULL((u64)U32_MAX * NSEC_PER_SEC + NSEC_PER_SEC / 2, rate) - 1;
+ max_period = DIV_ROUND_UP_ULL((u64)U32_MAX * NSEC_PER_SEC + NSEC_PER_SEC / 2, pc->rate) - 1;
if (state->period > max_period)
return -EINVAL;
/* set period */
- period_cycles = DIV_ROUND_CLOSEST_ULL(state->period * rate, NSEC_PER_SEC);
+ period_cycles = DIV_ROUND_CLOSEST_ULL(state->period * pc->rate, NSEC_PER_SEC);
/* don't accept a period that is too small */
if (period_cycles < PERIOD_MIN)
@@ -103,7 +98,7 @@ static int bcm2835_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
writel(period_cycles, pc->base + PERIOD(pwm->hwpwm));
/* set duty cycle */
- val = DIV_ROUND_CLOSEST_ULL(state->duty_cycle * rate, NSEC_PER_SEC);
+ val = DIV_ROUND_CLOSEST_ULL(state->duty_cycle * pc->rate, NSEC_PER_SEC);
writel(val, pc->base + DUTY(pwm->hwpwm));
/* set polarity */
@@ -131,6 +126,13 @@ static const struct pwm_ops bcm2835_pwm_ops = {
.apply = bcm2835_pwm_apply,
};
+static void devm_clk_rate_exclusive_put(void *data)
+{
+ struct clk *clk = data;
+
+ clk_rate_exclusive_put(clk);
+}
+
static int bcm2835_pwm_probe(struct platform_device *pdev)
{
struct bcm2835_pwm *pc;
@@ -151,8 +153,26 @@ static int bcm2835_pwm_probe(struct platform_device *pdev)
return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk),
"clock not found\n");
+ ret = clk_rate_exclusive_get(pc->clk);
+ if (ret)
+ return dev_err_probe(&pdev->dev, ret,
+ "fail to get exclusive rate\n");
+
+ ret = devm_add_action_or_reset(&pdev->dev, devm_clk_rate_exclusive_put,
+ pc->clk);
+ if (ret) {
+ clk_rate_exclusive_put(pc->clk);
+ return ret;
+ }
+
+ pc->rate = clk_get_rate(pc->clk);
+ if (!pc->rate)
+ return dev_err_probe(&pdev->dev, -EINVAL,
+ "failed to get clock rate\n");
+
pc->chip.dev = &pdev->dev;
pc->chip.ops = &bcm2835_pwm_ops;
+ pc->chip.atomic = true;
pc->chip.npwm = 2;
platform_set_drvdata(pdev, pc);
--
2.43.0
On Wed, 20 Dec 2023 14:24:25 +0000, Sean Young wrote:
> clk_get_rate() may do a mutex lock. Fetch the clock rate once, and prevent
> rate changes using clk_rate_exclusive_get().
>
>
Applied, thanks!
[1/1] pwm: bcm2835: Allow PWM driver to be used in atomic context
commit: fcc76072935935082efa127b97c7ddd880d2d793
Best regards,
--
Thierry Reding <[email protected]>
Hello Sean,
On Wed, Dec 20, 2023 at 02:24:25PM +0000, Sean Young wrote:
> @@ -151,8 +153,26 @@ static int bcm2835_pwm_probe(struct platform_device *pdev)
> return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk),
> "clock not found\n");
>
> + ret = clk_rate_exclusive_get(pc->clk);
> + if (ret)
> + return dev_err_probe(&pdev->dev, ret,
> + "fail to get exclusive rate\n");
> +
> + ret = devm_add_action_or_reset(&pdev->dev, devm_clk_rate_exclusive_put,
> + pc->clk);
> + if (ret) {
> + clk_rate_exclusive_put(pc->clk);
That clk_rate_exclusive_put() is wrong. If devm_add_action_or_reset()
fails that is already cared for.
Given that Thierry already applied this patch, getting this fixed in a
timely manner would be good.
> + return ret;
> + }
> +
> + pc->rate = clk_get_rate(pc->clk);
> + if (!pc->rate)
> + return dev_err_probe(&pdev->dev, -EINVAL,
> + "failed to get clock rate\n");
> +
> pc->chip.dev = &pdev->dev;
> pc->chip.ops = &bcm2835_pwm_ops;
> + pc->chip.atomic = true;
> pc->chip.npwm = 2;
>
> platform_set_drvdata(pdev, pc);
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | https://www.pengutronix.de/ |
On Fri, Dec 22, 2023 at 11:30:47AM +0100, Uwe Kleine-K?nig wrote:
> Hello Sean,
>
> On Wed, Dec 20, 2023 at 02:24:25PM +0000, Sean Young wrote:
> > @@ -151,8 +153,26 @@ static int bcm2835_pwm_probe(struct platform_device *pdev)
> > return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk),
> > "clock not found\n");
> >
> > + ret = clk_rate_exclusive_get(pc->clk);
> > + if (ret)
> > + return dev_err_probe(&pdev->dev, ret,
> > + "fail to get exclusive rate\n");
> > +
> > + ret = devm_add_action_or_reset(&pdev->dev, devm_clk_rate_exclusive_put,
> > + pc->clk);
> > + if (ret) {
> > + clk_rate_exclusive_put(pc->clk);
>
> That clk_rate_exclusive_put() is wrong. If devm_add_action_or_reset()
> fails that is already cared for.
Yes, you're right. I missed that - should've checked.
> Given that Thierry already applied this patch, getting this fixed in a
> timely manner would be good.
I'll send out a patch shortly, thanks for catching.
Sean