2024-01-10 20:20:25

by Kuogee Hsieh

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Subject: [PATCH v1] drm/msms/dp: fixed link clock divider bits be over written in BPC unknown case

Since the value of DP_TEST_BIT_DEPTH_8 is already left shifted, in the
BPC unknown case, the additional shift causes spill over to the other
bits of the [DP_CONFIGURATION_CTRL] register.
Fix this by changing the return value of dp_link_get_test_bits_depth()
in the BPC unknown case to (DP_TEST_BIT_DEPTH_8 >> DP_TEST_BIT_DEPTH_SHIFT).

Fixes: c943b4948b58 ("drm/msm/dp: add displayPort driver support")
Signed-off-by: Kuogee Hsieh <[email protected]>
---
drivers/gpu/drm/msm/dp/dp_ctrl.c | 5 -----
drivers/gpu/drm/msm/dp/dp_link.c | 10 +++++++---
2 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index 77a8d93..fb588fd 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -135,11 +135,6 @@ static void dp_ctrl_config_ctrl(struct dp_ctrl_private *ctrl)
tbd = dp_link_get_test_bits_depth(ctrl->link,
ctrl->panel->dp_mode.bpp);

- if (tbd == DP_TEST_BIT_DEPTH_UNKNOWN) {
- pr_debug("BIT_DEPTH not set. Configure default\n");
- tbd = DP_TEST_BIT_DEPTH_8;
- }
-
config |= tbd << DP_CONFIGURATION_CTRL_BPC_SHIFT;

/* Num of Lanes */
diff --git a/drivers/gpu/drm/msm/dp/dp_link.c b/drivers/gpu/drm/msm/dp/dp_link.c
index 98427d4..b8caa5b 100644
--- a/drivers/gpu/drm/msm/dp/dp_link.c
+++ b/drivers/gpu/drm/msm/dp/dp_link.c
@@ -1179,6 +1179,9 @@ void dp_link_reset_phy_params_vx_px(struct dp_link *dp_link)
u32 dp_link_get_test_bits_depth(struct dp_link *dp_link, u32 bpp)
{
u32 tbd;
+ struct dp_link_private *link;
+
+ link = container_of(dp_link, struct dp_link_private, dp_link);

/*
* Few simplistic rules and assumptions made here:
@@ -1196,12 +1199,13 @@ u32 dp_link_get_test_bits_depth(struct dp_link *dp_link, u32 bpp)
tbd = DP_TEST_BIT_DEPTH_10;
break;
default:
- tbd = DP_TEST_BIT_DEPTH_UNKNOWN;
+ drm_dbg_dp(link->drm_dev, "bpp=%d not supported, use bpc=8\n",
+ bpp);
+ tbd = DP_TEST_BIT_DEPTH_8;
break;
}

- if (tbd != DP_TEST_BIT_DEPTH_UNKNOWN)
- tbd = (tbd >> DP_TEST_BIT_DEPTH_SHIFT);
+ tbd = (tbd >> DP_TEST_BIT_DEPTH_SHIFT);

return tbd;
}
--
2.7.4



2024-01-10 23:39:35

by Abhinav Kumar

[permalink] [raw]
Subject: Re: [PATCH v1] drm/msms/dp: fixed link clock divider bits be over written in BPC unknown case



On 1/10/2024 12:18 PM, Kuogee Hsieh wrote:
> Since the value of DP_TEST_BIT_DEPTH_8 is already left shifted, in the
> BPC unknown case, the additional shift causes spill over to the other
> bits of the [DP_CONFIGURATION_CTRL] register.
> Fix this by changing the return value of dp_link_get_test_bits_depth()
> in the BPC unknown case to (DP_TEST_BIT_DEPTH_8 >> DP_TEST_BIT_DEPTH_SHIFT).
>
> Fixes: c943b4948b58 ("drm/msm/dp: add displayPort driver support")
> Signed-off-by: Kuogee Hsieh <[email protected]>
> ---
> drivers/gpu/drm/msm/dp/dp_ctrl.c | 5 -----
> drivers/gpu/drm/msm/dp/dp_link.c | 10 +++++++---
> 2 files changed, 7 insertions(+), 8 deletions(-)
>

Reviewed-by: Abhinav Kumar <[email protected]>

2024-01-10 23:51:02

by Dmitry Baryshkov

[permalink] [raw]
Subject: Re: [PATCH v1] drm/msms/dp: fixed link clock divider bits be over written in BPC unknown case

On Wed, 10 Jan 2024 at 22:19, Kuogee Hsieh <[email protected]> wrote:
>
> Since the value of DP_TEST_BIT_DEPTH_8 is already left shifted, in the
> BPC unknown case, the additional shift causes spill over to the other
> bits of the [DP_CONFIGURATION_CTRL] register.
> Fix this by changing the return value of dp_link_get_test_bits_depth()
> in the BPC unknown case to (DP_TEST_BIT_DEPTH_8 >> DP_TEST_BIT_DEPTH_SHIFT).
>
> Fixes: c943b4948b58 ("drm/msm/dp: add displayPort driver support")
> Signed-off-by: Kuogee Hsieh <[email protected]>

For the patch itself:

Reviewed-by: Dmitry Baryshkov <[email protected]>

Additional note. Since this made me look at how DP_TEST_BIT_DEPTH is
handled in the driver, I stumbled upon dp_link_bit_depth_to_bpc() vs
dp_link_bit_depth_to_bpp(). These two functions look pretty redundant.
Since the former one is used only for the debugfs, please consider
sending a patch that removes it for the sake of using the latter one
and /3 in dp_test_data_show().


--
With best wishes
Dmitry

2024-01-24 22:02:05

by Abhinav Kumar

[permalink] [raw]
Subject: Re: [PATCH v1] drm/msms/dp: fixed link clock divider bits be over written in BPC unknown case



On 1/10/2024 12:18 PM, Kuogee Hsieh wrote:
> Since the value of DP_TEST_BIT_DEPTH_8 is already left shifted, in the
> BPC unknown case, the additional shift causes spill over to the other
> bits of the [DP_CONFIGURATION_CTRL] register.
> Fix this by changing the return value of dp_link_get_test_bits_depth()
> in the BPC unknown case to (DP_TEST_BIT_DEPTH_8 >> DP_TEST_BIT_DEPTH_SHIFT).
>
> Fixes: c943b4948b58 ("drm/msm/dp: add displayPort driver support")
> Signed-off-by: Kuogee Hsieh <[email protected]>
> ---
> drivers/gpu/drm/msm/dp/dp_ctrl.c | 5 -----
> drivers/gpu/drm/msm/dp/dp_link.c | 10 +++++++---
> 2 files changed, 7 insertions(+), 8 deletions(-)
>

Checkpatch complained about this error:

CHECK: Alignment should match open parenthesis
#61: FILE: drivers/gpu/drm/msm/dp/dp_link.c:1203:
+ drm_dbg_dp(link->drm_dev, "bpp=%d not supported, use
bpc=8\n",
+ bpp);


I will fix it while applying ... no need to spin another version for this.