Hi all,
This is a attempt to bring all low-level debugging print functions
together and provide a arm-like low-level debugging interface and
a further capability to debug early exceptions.
This patch elimiate platform specific early_printk, zboot printing
functions and cps-vec-ns16550 by newly introduced debug_ll.
Hope you'll find them handy :-)
Happy hacking!
Thanks
Signed-off-by: Jiaxun Yang <[email protected]>
---
Jiaxun Yang (9):
MIPS: asm: Move strings to .rodata.str section
MIPS: debug: Implement low-level debugging functions
MIPS: debug: Hook up DEBUG_LL with early printk
MIPS: debug: Provide an early exception vector for low-level debugging
MIPS: debug_ll: Add Kconfig symbols for some 8250 uarts
MIPS: debug_ll: Implement support for Alchemy uarts
MIPS: debug_ll: Implement support for AR933X uarts
MIPS: zboot: Convert to use debug_ll facilities
MIPS: CPS: Convert to use debug_ll facilities
arch/mips/Kconfig | 12 +-
arch/mips/Kconfig.debug | 240 +++++++++++++++++++++++--------
arch/mips/boot/compressed/Makefile | 9 +-
arch/mips/boot/compressed/dbg.c | 39 -----
arch/mips/boot/compressed/debug-vec.S | 3 +
arch/mips/boot/compressed/debug.S | 3 +
arch/mips/boot/compressed/decompress.h | 8 +-
arch/mips/boot/compressed/head.S | 6 +
arch/mips/boot/compressed/uart-16550.c | 49 -------
arch/mips/boot/compressed/uart-alchemy.c | 9 --
arch/mips/boot/compressed/uart-ath79.c | 2 -
arch/mips/boot/compressed/uart-prom.c | 9 --
arch/mips/include/asm/asm.h | 2 +-
arch/mips/include/debug/8250.S | 60 ++++++++
arch/mips/include/debug/alchemy.S | 46 ++++++
arch/mips/include/debug/ar933x.S | 41 ++++++
arch/mips/include/debug/uhi.S | 48 +++++++
arch/mips/kernel/Makefile | 4 +-
arch/mips/kernel/cps-vec.S | 16 +--
arch/mips/kernel/debug-vec.S | 194 +++++++++++++++++++++++++
arch/mips/kernel/debug.S | 130 +++++++++++++++++
arch/mips/kernel/early_printk.c | 19 +++
arch/mips/kernel/head.S | 4 +
23 files changed, 756 insertions(+), 197 deletions(-)
---
base-commit: 084c8e315db34b59d38d06e684b1a0dd07d30287
change-id: 20240326-mips_debug_ll-ce72fee1b6a2
Best regards,
--
Jiaxun Yang <[email protected]>
Well, they are read only.
Signed-off-by: Jiaxun Yang <[email protected]>
---
arch/mips/include/asm/asm.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h
index 2e99450f4228..05a158a8920c 100644
--- a/arch/mips/include/asm/asm.h
+++ b/arch/mips/include/asm/asm.h
@@ -94,7 +94,7 @@ symbol: .insn
symbol = value
#define TEXT(msg) \
- .pushsection .data; \
+ .pushsection .rodata.str; \
8: .asciiz msg; \
.popsection;
--
2.34.1
Currently we have three sets of early debugging functions
for MIPS: zboot putc/puts, cps-vec-ns16550, and prom_putc.
This is a attempt to bring them all to one by providing
a interface similar to arm's debug_ll, which is very portable
and allows you to support new platforms easily.
Two examples of output interfaces are provided, including
8250 uart and MIPS UHI semihosting, which already covered
most of the platforms.
Signed-off-by: Jiaxun Yang <[email protected]>
---
arch/mips/Kconfig.debug | 80 +++++++++++++++++++++++++
arch/mips/include/debug/8250.S | 60 +++++++++++++++++++
arch/mips/include/debug/uhi.S | 48 +++++++++++++++
arch/mips/kernel/Makefile | 2 +
arch/mips/kernel/debug.S | 130 +++++++++++++++++++++++++++++++++++++++++
5 files changed, 320 insertions(+)
diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug
index f4ae7900fcd3..892e31804982 100644
--- a/arch/mips/Kconfig.debug
+++ b/arch/mips/Kconfig.debug
@@ -164,3 +164,83 @@ config MIPS_CPS_NS16550_WIDTH
lb/sb instructions.
endif # MIPS_CPS_NS16550_BOOL
+
+# These options are only for real kernel hackers who want to get their hands dirty.
+config DEBUG_LL
+ bool "Kernel low-level debugging functions (read help!)"
+ depends on DEBUG_KERNEL
+ help
+ Say Y here to include definitions of printascii, printch, printhex
+ in the kernel. This is helpful if you are debugging code that
+ executes before the console is initialized.
+
+ Note that selecting this option will limit the kernel to a single
+ UART or semihosting definition, as specified below. Attempting to
+ boot the kernel image on a different platform *will not work*, so
+ this option should not be enabled for kernels that are intended to
+ be portable.
+
+choice
+ prompt "Kernel low-level debugging port"
+ depends on DEBUG_LL
+
+ config DEBUG_MIPS_UHI
+ bool "Kernel low-level debugging via UHI semihosting"
+ help
+ Say Y here if you want kernel low-level debugging support
+ via MIPS UHI semihosting.
+
+ config DEBUG_LL_UART_8250
+ bool "Kernel low-level debugging via 8250 UART"
+ select DEBUG_LL_UART
+ help
+ Say Y here if you wish the debug print routes to direct
+ their output to an 8250 UART. You can use this option
+ to provide the parameters for the 8250 UART rather than
+ selecting one of the platform specific options below if
+ you know the parameters for the port.
+
+endchoice
+
+config DEBUG_LL_INCLUDE
+ string
+ default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250
+ default "debug/uhi.S" if DEBUG_MIPS_UHI
+ default "debug-macro.S"
+
+# Compatibility options for 8250
+config DEBUG_UART_8250
+ bool
+ select DEBUG_LL_UART
+
+config DEBUG_LL_UART
+ bool
+
+config DEBUG_UART_FLOW_CONTROL
+ bool "Enable flow control (CTS) for the debug UART"
+ depends on DEBUG_LL_UART
+ default n
+ help
+ Some UART ports are connected to terminals that will use modem
+ control signals to indicate whether they are ready to receive text.
+ In practice this means that the terminal is asserting the special
+ control signal CTS (Clear To Send). If your debug UART supports
+ this and your debug terminal will require it, enable this option.
+
+config DEBUG_UART_PHYS
+ hex "Physical base address of debug UART"
+ depends on DEBUG_LL_UART
+ help
+ This is the physical base address of the debug UART. It must be
+ accessible from unmapped kernel space (i.e. KSEG1 for 32bit kernels
+ or XKPHYS for 64bit kernels).
+
+config DEBUG_UART_8250_SHIFT
+ int "Register offset shift for the 8250 debug UART"
+ depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
+ default 2
+
+config DEBUG_UART_8250_WIDTH
+ int "Register width for the 8250 debug UART"
+ depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
+ default 1
diff --git a/arch/mips/include/debug/8250.S b/arch/mips/include/debug/8250.S
new file mode 100644
index 000000000000..f8608d3e271a
--- /dev/null
+++ b/arch/mips/include/debug/8250.S
@@ -0,0 +1,60 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023, Jiaxun Yang <[email protected]>
+ * MIPS Low level debug include file for 8250 UART
+ */
+
+#include <asm/addrspace.h>
+#include <asm/asm.h>
+#include <linux/serial_reg.h>
+
+#define DEBUG_LL_UART
+
+#define UART_BASE CKSEG1ADDR(CONFIG_DEBUG_UART_PHYS)
+
+#define UART_TX_OFS (UART_TX << CONFIG_DEBUG_UART_8250_SHIFT)
+#define UART_LSR_OFS (UART_LSR << CONFIG_DEBUG_UART_8250_SHIFT)
+#define UART_MSR_OFS (UART_MSR << CONFIG_DEBUG_UART_8250_SHIFT)
+
+#if CONFIG_DEBUG_UART_8250_WIDTH == 1
+# define UART_L lb
+# define UART_S sb
+#elif CONFIG_DEBUG_UART_8250_WIDTH == 2
+# define UART_L lh
+# define UART_S sh
+#elif CONFIG_DEBUG_UART_8250_WIDTH == 4
+# define UART_L lw
+# define UART_S sw
+#elif defined(CONFIG_64BIT) && CONFIG_DEBUG_UART_8250_WIDTH == 8
+# define UART_L ld
+# define UART_S sd
+#else
+# define UART_L lb
+# define UART_S sb
+#endif
+
+ .macro addruart,rd,rx
+ PTR_LA \rd, UART_BASE
+ .endm
+
+ .macro senduart,rd,rx
+ UART_S \rd, UART_TX_OFS(\rx)
+ .endm
+
+ .macro busyuart,rd,rx
+1002:
+ UART_L \rd, UART_LSR_OFS(\rx)
+ andi \rd, \rd, (UART_LSR_TEMT | UART_LSR_THRE)
+ xori \rd, (UART_LSR_TEMT | UART_LSR_THRE)
+ bnez \rd, 1002b
+ .endm
+
+ .macro waituarttxrdy,rd,rx
+ .endm
+
+ .macro waituartcts,rd,rx
+1001:
+ UART_L \rd, UART_MSR_OFS(\rx)
+ andi \rd, UART_MSR_CTS
+ beqz \rd, 1001b
+ .endm
diff --git a/arch/mips/include/debug/uhi.S b/arch/mips/include/debug/uhi.S
new file mode 100644
index 000000000000..20554523e151
--- /dev/null
+++ b/arch/mips/include/debug/uhi.S
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023, Jiaxun Yang <[email protected]>
+ * MIPS Low level debug include file for UHI semihosting
+ */
+
+#include <asm/asm.h>
+
+/**
+ * printch() - write a character to UHI Plog
+ * @a0: ASCII character to write
+ *
+ * clobbers v0, t9
+ * UHI may clobber k0, k1
+ */
+ .pushsection .bss
+charbuf_addr: .space 8
+ .popsection
+NESTED(printch, 0, ra)
+ PTR_LI t9, charbuf_addr
+ sb a0, 0(t9)
+ sb zero, 1(t9)
+ move a0, t9
+ li v0, 0x1
+ li t9, 13 /* plog */
+ .set push
+ .set MIPS_ISA_LEVEL_RAW
+ sdbbp 1
+ .set pop
+ jr ra
+ END(printch)
+
+/**
+ * printascii() - write a string to UHI Plog
+ * @a0: pointer to NULL-terminated ASCII string
+ *
+ * clobbers v0
+ * UHI may clobber k0, k1
+ */
+NESTED(printascii, 0, ra)
+ li v0, 0x1
+ li t9, 13 /* plog */
+ .set push
+ .set MIPS_ISA_LEVEL_RAW
+ sdbbp 1
+ .set pop
+ jr ra
+ END(printascii)
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index ecf3278a32f7..bfac35a64ae5 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -78,6 +78,8 @@ obj-$(CONFIG_MIPS32_COMPAT) += linux32.o ptrace32.o signal32.o
obj-$(CONFIG_MIPS32_N32) += scall64-n32.o signal_n32.o
obj-$(CONFIG_MIPS32_O32) += scall64-o32.o signal_o32.o
+obj-$(CONFIG_DEBUG_LL) += debug.o
+
obj-$(CONFIG_KGDB) += kgdb.o
obj-$(CONFIG_PROC_FS) += proc.o
obj-$(CONFIG_MAGIC_SYSRQ) += sysrq.o
diff --git a/arch/mips/kernel/debug.S b/arch/mips/kernel/debug.S
new file mode 100644
index 000000000000..a78d9a55bb35
--- /dev/null
+++ b/arch/mips/kernel/debug.S
@@ -0,0 +1,130 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023, Jiaxun Yang <[email protected]>
+ * MIPS Low level debug routines
+ *
+ * Note: Those functions are designed carefully to only clobber
+ * t0, t1, t9, so they can be used without stack. Also they are
+ * position independent to be called from any place.
+ */
+
+#include <linux/compiler.h>
+
+#include <asm/addrspace.h>
+#include <asm/asm.h>
+#include <asm/asm-offsets.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+
+#include CONFIG_DEBUG_LL_INCLUDE
+
+#ifdef DEBUG_LL_UART
+/**
+ * printch() - write a character to the UART
+ * @a0: ASCII character to write
+ *
+ * clobbers t0, t9
+ */
+NESTED(printch, 0, ra)
+ addruart t9, t0
+#ifdef CONFIG_DEBUG_UART_FLOW_CONTROL
+ waituartcts t0, t9
+#endif
+ waituarttxrdy t0, t9
+ senduart a0, t9
+ busyuart t0, t9
+ jr ra
+ END(printch)
+
+/**
+ * printascii() - write a string to the UART
+ * @a0: pointer to NULL-terminated ASCII string
+ *
+ * clobbers t0, t1, t9
+ *
+ * Write a null-terminated ASCII string to the UART.
+ */
+NESTED(printascii, 0, ra)
+ addruart t9, t0
+ move t1, a0
+
+1: lb a0, 0(t1)
+ beqz a0, 2f
+#ifdef CONFIG_DEBUG_UART_FLOW_CONTROL
+ waituartcts t0, t9
+#endif
+ waituarttxrdy t0, t9
+ senduart a0, t9
+ busyuart t0, t9
+ PTR_ADDIU t1, t1, 1
+ b 1b
+
+2: jr ra
+ END(printascii)
+#endif /* DEBUG_LL_UART */
+
+/**
+ * printhex() - write n byte hex value to the UART
+ * @a0: Hex value to write to the UART
+ * @a1: number of bytes to write to the UART
+ *
+ * clobbers: t0, t1, t9
+ */
+
+ .pushsection .bss
+hexbuf_addr: .space 32
+ .popsection
+
+NESTED(printhex, 0, ra)
+ PTR_LA t9, hexbuf_addr
+ sll a1, a1, 1
+1:
+ subu t0, a1, 1
+ sll t0, t0, 2
+ LONG_SRLV t0, a0, t0
+ andi t0, t0, 0xf
+ li t1, '0'
+ blt t0, 10, 2f
+ li t1, 'a'
+ addiu t0, t0, -10
+2:
+ addu t1, t1, t0
+ sb t1, 0(t9)
+ PTR_ADDIU t9, t9, 1
+ addiu a1, a1, -1
+ bnez a1, 1b
+ sb zero, 0(t9)
+
+ move a1, ra
+ PTR_LA a0, hexbuf_addr
+ bal printascii
+
+ jr a1
+ END(printhex)
+
+NESTED(printhex1, 0, ra)
+ li a1, 1
+ b printhex
+ END(printhex1)
+
+NESTED(printhex2, 0, ra)
+ li a1, 2
+ b printhex
+ END(printhex2)
+
+NESTED(printhex4, 0, ra)
+ li a1, 4
+ b printhex
+ END(printhex4)
+
+#ifdef CONFIG_64BIT
+NESTED(printhex8, 0, ra)
+ li a1, 8
+ b printhex
+ END(printhex8)
+#endif
+
+NESTED(printhexl, 0, ra)
+ li a1, PTRSIZE
+ b printhex
+ END(printhexl)
--
2.34.1
Define platform symbols for all 8250 style uart type supported
by zboot, plus Loongson-2K and boston.
Signed-off-by: Jiaxun Yang <[email protected]>
---
arch/mips/Kconfig.debug | 56 +++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 56 insertions(+)
diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug
index 323ad3ec643b..3609d298a9eb 100644
--- a/arch/mips/Kconfig.debug
+++ b/arch/mips/Kconfig.debug
@@ -209,6 +209,54 @@ choice
selecting one of the platform specific options below if
you know the parameters for the port.
+ config DEBUG_BOSTON_UART
+ bool "Kernel low-level debugging messages via Boston UART"
+ depends on MIPS_GENERIC_KERNEL
+ select DEBUG_UART_8250
+ help
+ Say Y here if you want kernel low-level debugging support
+ on IMG Boston board.
+
+ config DEBUG_MALTA_UART
+ bool "Kernel low-level debugging messages via malta UART"
+ depends on MIPS_MALTA
+ select DEBUG_UART_8250
+ help
+ Say Y here if you want kernel low-level debugging support
+ on MTI malta board.
+
+ config DEBUG_AR71XX_UART
+ bool "Kernel low-level debugging messages via AR71XX UART"
+ depends on ATH79
+ select DEBUG_UART_8250
+ help
+ Say Y here if you want kernel low-level debugging support
+ on AR71xx based platforms.
+
+ config DEBUG_LOONGSON3_UART
+ bool "Kernel low-level debugging messages via Loongson-3 UART"
+ depends on MACH_LOONGSON64
+ select DEBUG_UART_8250
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Loongson-3 systems.
+
+ config DEBUG_LOONGSON2K_UART
+ bool "Kernel low-level debugging messages via Loongson 2K UART"
+ depends on MACH_LOONGSON64
+ select DEBUG_UART_8250
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Loongson-2K SoCs.
+
+ config DEBUG_INGENIC_UART
+ bool "Kernel low-level debugging messages via Ingenic UART"
+ depends on MACH_INGENIC_SOC
+ select DEBUG_UART_8250
+ help
+ Say Y here if you want kernel low-level debugging support
+ on uart0 of Ingenic SoCs.
+
endchoice
config DEBUG_LL_INCLUDE
@@ -239,6 +287,12 @@ config DEBUG_UART_FLOW_CONTROL
config DEBUG_UART_PHYS
hex "Physical base address of debug UART"
depends on DEBUG_LL_UART
+ default 0x17ffe000 if DEBUG_BOSTON_UART
+ default 0x1fd003f8 if DEBUG_MALTA_UART
+ default 0x18020000 if DEBUG_AR71XX_UART
+ default 0x1fd003f8 if DEBUG_LOONGSON3_UART
+ default 0x1fe00000 if DEBUG_LOONGSON2K_UART
+ default 0x10030000 if DEBUG_INGENIC_UART
help
This is the physical base address of the debug UART. It must be
accessible from unmapped kernel space (i.e. KSEG1 for 32bit kernels
@@ -247,6 +301,8 @@ config DEBUG_UART_PHYS
config DEBUG_UART_8250_SHIFT
int "Register offset shift for the 8250 debug UART"
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
+ default 1 if DEBUG_MALTA_UART || DEBUG_LOONGSON3_UART || \
+ DEBUG_LOONGSON2K_UART
default 2
config DEBUG_UART_8250_WIDTH
--
2.34.1
Implement support for AR933X uarts which has it's own register
definition.
Signed-off-by: Jiaxun Yang <[email protected]>
---
arch/mips/Kconfig.debug | 9 +++++++++
arch/mips/include/debug/ar933x.S | 41 ++++++++++++++++++++++++++++++++++++++++
2 files changed, 50 insertions(+)
diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug
index aef116058654..a6687c503c34 100644
--- a/arch/mips/Kconfig.debug
+++ b/arch/mips/Kconfig.debug
@@ -265,6 +265,14 @@ choice
Say Y here if you want kernel low-level debugging support
on uart of alchemy SoCs.
+ config DEBUG_AR933X_UART
+ bool "Kernel low-level debugging messages via Alchemy UART"
+ depends on MIPS_ALCHEMY
+ select DEBUG_LL_UART
+ help
+ Say Y here if you want kernel low-level debugging support
+ on uart of AR933X SoCs.
+
endchoice
config DEBUG_LL_INCLUDE
@@ -303,6 +311,7 @@ config DEBUG_UART_PHYS
default 0x1fe00000 if DEBUG_LOONGSON2K_UART
default 0x10030000 if DEBUG_INGENIC_UART
default 0x11100000 if DEBUG_ALCHEMY_UART
+ default 0x18020000 if DEBUG_AR933X_UART
help
This is the physical base address of the debug UART. It must be
accessible from unmapped kernel space (i.e. KSEG1 for 32bit kernels
diff --git a/arch/mips/include/debug/ar933x.S b/arch/mips/include/debug/ar933x.S
new file mode 100644
index 000000000000..1a0449082080
--- /dev/null
+++ b/arch/mips/include/debug/ar933x.S
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023, Jiaxun Yang <[email protected]>
+ * MIPS Low level debug include file for ar933x UART
+ */
+
+#include <asm/addrspace.h>
+#include <asm/asm.h>
+#include <asm/mach-ath79/ar933x_uart.h>
+
+#define DEBUG_LL_UART
+
+#define UART_BASE CKSEG1ADDR(CONFIG_DEBUG_UART_PHYS)
+
+# define UART_L lw
+# define UART_S sw
+
+ .macro addruart,rd,rx
+ PTR_LA \rd, UART_BASE
+ .endm
+
+ .macro senduart,rd,rx
+ UART_S \rd, AR933X_UART_DATA_REG(\rx)
+ .endm
+
+ /* CTS and RDY are handled by AR933X_UART_DATA_TX_CSR as well */
+ .macro busyuart,rd,rx
+1002:
+ UART_L \rd, AR933X_UART_DATA_REG(\rx)
+ andi \rd, \rd, (AR933X_UART_DATA_TX_CSR)
+ xori \rd, (AR933X_UART_DATA_TX_CSR)
+ bnez \rd, 1002b
+ .endm
+
+ .macro waituarttxrdy,rd,rx
+ busyuart \rd, \rx
+ .endm
+
+ .macro waituartcts,rd,rx
+ busyuart \rd, \rx
+ .endm
--
2.34.1
Alchemy uart is a 8250 derivative that requires some special care
on barriers and readys, also they have a wired register layout.
Implement it as a special include.
Signed-off-by: Jiaxun Yang <[email protected]>
---
arch/mips/Kconfig.debug | 10 +++++++++
arch/mips/include/debug/alchemy.S | 46 +++++++++++++++++++++++++++++++++++++++
2 files changed, 56 insertions(+)
diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug
index 3609d298a9eb..aef116058654 100644
--- a/arch/mips/Kconfig.debug
+++ b/arch/mips/Kconfig.debug
@@ -257,11 +257,20 @@ choice
Say Y here if you want kernel low-level debugging support
on uart0 of Ingenic SoCs.
+ config DEBUG_ALCHEMY_UART
+ bool "Kernel low-level debugging messages via Alchemy UART"
+ depends on MIPS_ALCHEMY
+ select DEBUG_LL_UART
+ help
+ Say Y here if you want kernel low-level debugging support
+ on uart of alchemy SoCs.
+
endchoice
config DEBUG_LL_INCLUDE
string
default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250
+ default "debug/alchemy.S" if DEBUG_ALCHEMY_UART
default "debug/uhi.S" if DEBUG_MIPS_UHI
default "debug-macro.S"
@@ -293,6 +302,7 @@ config DEBUG_UART_PHYS
default 0x1fd003f8 if DEBUG_LOONGSON3_UART
default 0x1fe00000 if DEBUG_LOONGSON2K_UART
default 0x10030000 if DEBUG_INGENIC_UART
+ default 0x11100000 if DEBUG_ALCHEMY_UART
help
This is the physical base address of the debug UART. It must be
accessible from unmapped kernel space (i.e. KSEG1 for 32bit kernels
diff --git a/arch/mips/include/debug/alchemy.S b/arch/mips/include/debug/alchemy.S
new file mode 100644
index 000000000000..933efc6e828c
--- /dev/null
+++ b/arch/mips/include/debug/alchemy.S
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023, Jiaxun Yang <[email protected]>
+ * MIPS Low level debug include file for Au1xxx UART
+ * Dereived from drivers/tty/serial/8250/8250_rt288x.c
+ */
+
+#include <asm/addrspace.h>
+#include <asm/asm.h>
+#include <linux/serial_reg.h>
+
+#define DEBUG_LL_UART
+
+#define UART_BASE CKSEG1ADDR(CONFIG_DEBUG_UART_PHYS)
+
+#define UART_TX_OFS (1 << 2)
+#define UART_LSR_OFS (7 << 2)
+
+# define UART_L lw
+# define UART_S sw
+
+ .macro addruart,rd,rx
+ PTR_LA \rd, UART_BASE
+ .endm
+
+ .macro senduart,rd,rx
+ UART_S \rd, UART_TX_OFS(\rx)
+ sync /* wmb */
+ .endm
+
+ .macro busyuart,rd,rx
+1002:
+ UART_L \rd, UART_LSR_OFS(\rx)
+ andi \rd, \rd, (UART_LSR_TEMT | UART_LSR_THRE)
+ xori \rd, (UART_LSR_TEMT | UART_LSR_THRE)
+ sync /* cpu_relax */
+ bnez \rd, 1002b
+ .endm
+
+ .macro waituarttxrdy,rd,rx
+ busyuart \rd, \rx
+ .endm
+
+ /* Au1xxx has no MSR */
+ .macro waituartcts,rd,rx
+ .endm
--
2.34.1
On 26/3/24 21:35, Jiaxun Yang wrote:
> Define platform symbols for all 8250 style uart type supported
> by zboot, plus Loongson-2K and boston.
>
> Signed-off-by: Jiaxun Yang <[email protected]>
> ---
> arch/mips/Kconfig.debug | 56 +++++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 56 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
On 26/3/24 21:35, Jiaxun Yang wrote:
> Currently we have three sets of early debugging functions
> for MIPS: zboot putc/puts, cps-vec-ns16550, and prom_putc.
>
> This is a attempt to bring them all to one by providing
> a interface similar to arm's debug_ll, which is very portable
> and allows you to support new platforms easily.
>
> Two examples of output interfaces are provided, including
> 8250 uart and MIPS UHI semihosting, which already covered
> most of the platforms.
>
> Signed-off-by: Jiaxun Yang <[email protected]>
> ---
> arch/mips/Kconfig.debug | 80 +++++++++++++++++++++++++
> arch/mips/include/debug/8250.S | 60 +++++++++++++++++++
> arch/mips/include/debug/uhi.S | 48 +++++++++++++++
> arch/mips/kernel/Makefile | 2 +
> arch/mips/kernel/debug.S | 130 +++++++++++++++++++++++++++++++++++++++++
> 5 files changed, 320 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
On 26/3/24 21:35, Jiaxun Yang wrote:
> Well, they are read only.
>
> Signed-off-by: Jiaxun Yang <[email protected]>
> ---
> arch/mips/include/asm/asm.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h
> index 2e99450f4228..05a158a8920c 100644
> --- a/arch/mips/include/asm/asm.h
> +++ b/arch/mips/include/asm/asm.h
> @@ -94,7 +94,7 @@ symbol: .insn
> symbol = value
>
> #define TEXT(msg) \
> - .pushsection .data; \
> + .pushsection .rodata.str; \
Nitpicking, \ is now misaligned.
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
> 8: .asciiz msg; \
> .popsection;
>
>