Add reset to SDHCI controller so it can be reset to avoid timeout issues
after software reset due to bootloader set configuration.
Signed-off-by: Robert Marko <[email protected]>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index ddafc7de6c5f..d685ca1969a3 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -482,6 +482,7 @@ sdhc_1: mmc@7824900 {
<&gcc GCC_SDCC1_APPS_CLK>,
<&xo>;
clock-names = "iface", "core", "xo";
+ resets = <&gcc GCC_SDCC1_BCR>;
max-frequency = <384000000>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
--
2.36.1
On 04/07/2022 13:44, Robert Marko wrote:
> Add reset to SDHCI controller so it can be reset to avoid timeout issues
> after software reset due to bootloader set configuration.
>
> Signed-off-by: Robert Marko <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/ipq8074.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> index ddafc7de6c5f..d685ca1969a3 100644
> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> @@ -482,6 +482,7 @@ sdhc_1: mmc@7824900 {
> <&gcc GCC_SDCC1_APPS_CLK>,
> <&xo>;
> clock-names = "iface", "core", "xo";
> + resets = <&gcc GCC_SDCC1_BCR>;
I looked at the bindings and they do not allow reset property, so does
it depend on anything?
Best regards,
Krzysztof
On Mon, 4 Jul 2022 at 14:29, Krzysztof Kozlowski
<[email protected]> wrote:
>
> On 04/07/2022 13:44, Robert Marko wrote:
> > Add reset to SDHCI controller so it can be reset to avoid timeout issues
> > after software reset due to bootloader set configuration.
> >
> > Signed-off-by: Robert Marko <[email protected]>
> > ---
> > arch/arm64/boot/dts/qcom/ipq8074.dtsi | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> > index ddafc7de6c5f..d685ca1969a3 100644
> > --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> > @@ -482,6 +482,7 @@ sdhc_1: mmc@7824900 {
> > <&gcc GCC_SDCC1_APPS_CLK>,
> > <&xo>;
> > clock-names = "iface", "core", "xo";
> > + resets = <&gcc GCC_SDCC1_BCR>;
>
> I looked at the bindings and they do not allow reset property, so does
> it depend on anything?
Hi Krzysztof,
It seems like the driver changes [1] were merged at the same time as
when bindings
were being converted and nobody ever follow up with documenting the property.
I can document the property and send a v2 if that's OK?
Regards,
Robert
[1] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/drivers/mmc/host/sdhci-msm.c?h=next-20220704&id=3e5a8e8494a8122fe4eb3f167662f406cab753b9
>
>
> Best regards,
> Krzysztof
On 04/07/2022 14:34, Robert Marko wrote:
> On Mon, 4 Jul 2022 at 14:29, Krzysztof Kozlowski
> <[email protected]> wrote:
>>
>> On 04/07/2022 13:44, Robert Marko wrote:
>>> Add reset to SDHCI controller so it can be reset to avoid timeout issues
>>> after software reset due to bootloader set configuration.
>>>
>>> Signed-off-by: Robert Marko <[email protected]>
>>> ---
>>> arch/arm64/boot/dts/qcom/ipq8074.dtsi | 1 +
>>> 1 file changed, 1 insertion(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
>>> index ddafc7de6c5f..d685ca1969a3 100644
>>> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
>>> @@ -482,6 +482,7 @@ sdhc_1: mmc@7824900 {
>>> <&gcc GCC_SDCC1_APPS_CLK>,
>>> <&xo>;
>>> clock-names = "iface", "core", "xo";
>>> + resets = <&gcc GCC_SDCC1_BCR>;
>>
>> I looked at the bindings and they do not allow reset property, so does
>> it depend on anything?
>
> Hi Krzysztof,
> It seems like the driver changes [1] were merged at the same time as
> when bindings
> were being converted and nobody ever follow up with documenting the property.
>
> I can document the property and send a v2 if that's OK?
Yes, please. Otherwise DTS change will fail checks so basically should
not be accepted.
Best regards,
Krzysztof