GEODE: Base support for AMD Geode GX/LX processors.
Provide basic support for the AMD Geode GX and LX processors.
Signed-off-by: Jordan Crouse <[email protected]>
---
MAINTAINERS | 7 +++++++
arch/i386/Kconfig.cpu | 14 ++++++++++----
arch/i386/kernel/cpu/amd.c | 7 +++++++
arch/i386/kernel/cpu/cyrix.c | 32 +++++++++++++++++++++++++++++++-
include/asm-i386/module.h | 4 +++-
include/linux/pci_ids.h | 10 ++++++++++
6 files changed, 68 insertions(+), 6 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index da6973a..b1f9b5b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -258,6 +258,13 @@ P: Ivan Kokshaysky
M: [email protected]
S: Maintained for 2.4; PCI support for 2.6.
+AMD GEODE PROCESSOR/CHIPSET SUPPORT
+P: Jordan Crouse
+M: [email protected]
+L: [email protected]
+W: http://www.amd.com/us-en/ConnectivitySolutions/TechnicalResources/0,,50_2334_2452_11363,00.html
+S: Supported
+
APM DRIVER
P: Stephen Rothwell
M: [email protected]
diff --git a/arch/i386/Kconfig.cpu b/arch/i386/Kconfig.cpu
index 53bbb3c..79603b3 100644
--- a/arch/i386/Kconfig.cpu
+++ b/arch/i386/Kconfig.cpu
@@ -39,6 +39,7 @@ config M386
- "Winchip-2" for IDT Winchip 2.
- "Winchip-2A" for IDT Winchips with 3dNow! capabilities.
- "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
+ - "Geode GX/LX" For AMD Geode GX and LX processors.
- "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
- "VIA C3-2 for VIA C3-2 "Nehemiah" (model 9 and above).
@@ -171,6 +172,11 @@ config MGEODEGX1
help
Select this for a Geode GX1 (Cyrix MediaGX) chip.
+config MGEODE_LX
+ bool "Geode GX/LX"
+ help
+ Select this for AMD Geode GX and LX processors.
+
config MCYRIXIII
bool "CyrixIII/VIA-C3"
help
@@ -220,8 +226,8 @@ config X86_XADD
config X86_L1_CACHE_SHIFT
int
default "7" if MPENTIUM4 || X86_GENERIC
- default "4" if X86_ELAN || M486 || M386
- default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODEGX1
+ default "4" if X86_ELAN || M486 || M386 || MGEODEGX1
+ default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
default "6" if MK7 || MK8 || MPENTIUMM
config RWSEM_GENERIC_SPINLOCK
@@ -290,12 +296,12 @@ config X86_INTEL_USERCOPY
config X86_USE_PPRO_CHECKSUM
bool
- depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON
+ depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON || MGEODE_LX
default y
config X86_USE_3DNOW
bool
- depends on MCYRIXIII || MK7
+ depends on MCYRIXIII || MK7 || MGEODE_LX
default y
config X86_OOSTORE
diff --git a/arch/i386/kernel/cpu/amd.c b/arch/i386/kernel/cpu/amd.c
index e344ef8..cce0755 100644
--- a/arch/i386/kernel/cpu/amd.c
+++ b/arch/i386/kernel/cpu/amd.c
@@ -161,6 +161,13 @@ static void __init init_amd(struct cpuin
set_bit(X86_FEATURE_K6_MTRR, c->x86_capability);
break;
}
+
+ if ( c->x86_model == 10 ) {
+ /* AMD Geode LX is model 10 */
+ /* placeholder for any needed mods */
+ break;
+ }
+
break;
case 6: /* An Athlon/Duron */
diff --git a/arch/i386/kernel/cpu/cyrix.c b/arch/i386/kernel/cpu/cyrix.c
index ff87cc2..60f61b7 100644
--- a/arch/i386/kernel/cpu/cyrix.c
+++ b/arch/i386/kernel/cpu/cyrix.c
@@ -342,6 +342,36 @@ static void __init init_cyrix(struct cpu
return;
}
+
+/* This function handles National Semiconductor branded processors */
+
+static void __init init_nsc(struct cpuinfo_x86 *c)
+{
+ int r;
+
+ /* There may be GX1 processors in the wild that are branded
+ * NSC and not Cyrix.
+ *
+ * This function only handles the GX processor, and kicks every
+ * thing else to the Cyrix init function above - that should
+ * cover any processors that might have been branded differently
+ * after NSC aquired Cyrix.
+ *
+ * If this breaks your GX1 horribly, please e-mail
+ * [email protected] to tell us.
+ */
+
+ /* Handle the GX (Formally known as the GX2) */
+
+ if ((c->x86 == 5) && (c->x86_model == 5)) {
+ r = get_model_name(c);
+ display_cacheinfo(c);
+ }
+ else
+ init_cyrix(c);
+}
+
+
/*
* Cyrix CPUs without cpuid or with cpuid not yet enabled can be detected
* by the fact that they preserve the flags across the division of 5/2.
@@ -422,7 +452,7 @@ int __init cyrix_init_cpu(void)
static struct cpu_dev nsc_cpu_dev __initdata = {
.c_vendor = "NSC",
.c_ident = { "Geode by NSC" },
- .c_init = init_cyrix,
+ .c_init = init_nsc,
.c_identify = generic_identify,
};
diff --git a/include/asm-i386/module.h b/include/asm-i386/module.h
index eb7f2b4..424661d 100644
--- a/include/asm-i386/module.h
+++ b/include/asm-i386/module.h
@@ -52,8 +52,10 @@ struct mod_arch_specific
#define MODULE_PROC_FAMILY "CYRIXIII "
#elif defined CONFIG_MVIAC3_2
#define MODULE_PROC_FAMILY "VIAC3-2 "
-#elif CONFIG_MGEODEGX1
+#elif defined CONFIG_MGEODEGX1
#define MODULE_PROC_FAMILY "GEODEGX1 "
+#elif defined CONFIG_MGEODE_LX
+#define MODULE_PROC_FAMILY "GEODE "
#else
#error unknown processor family
#endif
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 4db67b3..0d8ab6d 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -389,6 +389,13 @@
#define PCI_DEVICE_ID_NS_87410 0xd001
#define PCI_DEVICE_ID_NS_CS5535_IDE 0x002d
+#define PCI_DEVICE_ID_NS_CS5535_HOST_BRIDGE 0x0028
+#define PCI_DEVICE_ID_NS_CS5535_ISA_BRIDGE 0x002b
+#define PCI_DEVICE_ID_NS_CS5535_IDE 0x002d
+#define PCI_DEVICE_ID_NS_CS5535_AUDIO 0x002e
+#define PCI_DEVICE_ID_NS_CS5535_USB 0x002f
+#define PCI_DEVICE_ID_NS_CS5535_VIDEO 0x0030
+
#define PCI_VENDOR_ID_TSENG 0x100c
#define PCI_DEVICE_ID_TSENG_W32P_2 0x3202
#define PCI_DEVICE_ID_TSENG_W32P_b 0x3205
@@ -491,6 +498,9 @@
#define PCI_DEVICE_ID_AMD_CS5536_IDE 0x209A
+#define PCI_DEVICE_ID_AMD_LX_VIDEO 0x2081
+#define PCI_DEVICE_ID_AMD_LX_AES 0x2082
+
#define PCI_VENDOR_ID_TRIDENT 0x1023
#define PCI_DEVICE_ID_TRIDENT_4DWAVE_DX 0x2000
#define PCI_DEVICE_ID_TRIDENT_4DWAVE_NX 0x2001
GEODE: Support for the Geodge LX HRNG
This patch adds support to hw_random for the Geode LX HRNG device.
Signed-off-by: Jordan Crouse <[email protected]>
---
drivers/char/hw_random.c | 66 +++++++++++++++++++++++++++++++++++++++++++++-
1 files changed, 65 insertions(+), 1 deletions(-)
diff --git a/drivers/char/hw_random.c b/drivers/char/hw_random.c
index 6f673d2..4d69e05 100644
--- a/drivers/char/hw_random.c
+++ b/drivers/char/hw_random.c
@@ -1,4 +1,9 @@
/*
+ Added support for the AMD Geode LX RNG
+ (c) Copyright 2004-2005 Advanced Micro Devices, Inc.
+
+ derived from
+
Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG)
(c) Copyright 2003 Red Hat Inc <[email protected]>
@@ -95,6 +100,11 @@ static unsigned int via_data_present (vo
static u32 via_data_read (void);
#endif
+static int __init geode_init(struct pci_dev *dev);
+static void geode_cleanup(void);
+static unsigned int geode_data_present (void);
+static u32 geode_data_read (void);
+
struct rng_operations {
int (*init) (struct pci_dev *dev);
void (*cleanup) (void);
@@ -122,6 +132,7 @@ enum {
rng_hw_intel,
rng_hw_amd,
rng_hw_via,
+ rng_hw_geode,
};
static struct rng_operations rng_vendor_ops[] = {
@@ -139,6 +150,9 @@ static struct rng_operations rng_vendor_
/* rng_hw_via */
{ via_init, via_cleanup, via_data_present, via_data_read, 1 },
#endif
+
+ /* rng_hw_geode */
+ { geode_init, geode_cleanup, geode_data_present, geode_data_read, 4 }
};
/*
@@ -159,6 +173,9 @@ static struct pci_device_id rng_pci_tbl[
{ 0x8086, 0x244e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, rng_hw_intel },
{ 0x8086, 0x245e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, rng_hw_intel },
+ { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LX_AES,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, rng_hw_geode },
+
{ 0, }, /* terminate list */
};
MODULE_DEVICE_TABLE (pci, rng_pci_tbl);
@@ -460,6 +477,53 @@ static void via_cleanup(void)
}
#endif
+/***********************************************************************
+ *
+ * AMD Geode RNG operations
+ *
+ */
+
+static void __iomem *geode_rng_base = NULL;
+
+#define GEODE_RNG_DATA_REG 0x50
+#define GEODE_RNG_STATUS_REG 0x54
+
+static u32 geode_data_read(void)
+{
+ u32 val;
+ assert(geode_rng_base != NULL);
+ val = readl(geode_rng_base + GEODE_RNG_DATA_REG);
+ return val;
+}
+
+static unsigned int geode_data_present(void)
+{
+ u32 val;
+ assert(geode_rng_base != NULL);
+ val = readl(geode_rng_base + GEODE_RNG_STATUS_REG);
+ return val;
+}
+
+static void geode_cleanup(void)
+{
+ iounmap(geode_rng_base);
+ geode_rng_base = NULL;
+}
+
+static int geode_init(struct pci_dev *dev)
+{
+ unsigned long rng_base = pci_resource_start(dev, 0);
+ if (rng_base == NULL) return 1;
+
+ geode_rng_base = ioremap(rng_base, 0x58);
+
+ if (geode_rng_base == NULL) {
+ printk(KERN_ERR PFX "Cannot ioremap RNG memory\n");
+ return -EBUSY;
+ }
+
+ return 0;
+}
/***********************************************************************
*
@@ -574,7 +638,7 @@ static int __init rng_init (void)
DPRINTK ("ENTER\n");
- /* Probe for Intel, AMD RNGs */
+ /* Probe for Intel, AMD, Geode RNGs */
for_each_pci_dev(pdev) {
ent = pci_match_id(rng_pci_tbl, pdev);
if (ent) {
APM screen blanking fix.
This patch fixes screen blanking on BIOSes that return
APM_NOT_ENGAGED when APM enabled screen blanking is not
turned on.
Signed off by: Jordan Crouse <[email protected]>
---
arch/i386/kernel/apm.c | 27 ++++++++++++++-------------
1 files changed, 14 insertions(+), 13 deletions(-)
diff --git a/arch/i386/kernel/apm.c b/arch/i386/kernel/apm.c
index 1e60acb..03e9d84 100644
--- a/arch/i386/kernel/apm.c
+++ b/arch/i386/kernel/apm.c
@@ -1075,22 +1075,23 @@ static int apm_engage_power_management(u
static int apm_console_blank(int blank)
{
- int error;
- u_short state;
+ int error, i;
+ u_short state;
+ u_short dev[3] = { 0x100, 0x1FF, 0x101 };
state = blank ? APM_STATE_STANDBY : APM_STATE_READY;
- /* Blank the first display device */
- error = set_power_state(0x100, state);
- if ((error != APM_SUCCESS) && (error != APM_NO_ERROR)) {
- /* try to blank them all instead */
- error = set_power_state(0x1ff, state);
- if ((error != APM_SUCCESS) && (error != APM_NO_ERROR))
- /* try to blank device one instead */
- error = set_power_state(0x101, state);
+
+ for (i = 0; i < 3; i++) {
+ error = set_power_state(dev[i], state);
+
+ if ((error == APM_SUCCESS) || (error == APM_NO_ERROR))
+ return 1;
+
+ if (error == APM_NOT_ENGAGED)
+ break;
}
- if ((error == APM_SUCCESS) || (error == APM_NO_ERROR))
- return 1;
- if (error == APM_NOT_ENGAGED) {
+
+ if (error == APM_NOT_ENGAGED && state != APM_STATE_READY) {
static int tried;
int eng_error;
if (tried++ == 0) {
"Jordan Crouse" <[email protected]> wrote:
>
> +static void __init init_nsc(struct cpuinfo_x86 *c)
> +{
> + int r;
> +
> + /* There may be GX1 processors in the wild that are branded
> + * NSC and not Cyrix.
> + *
> + * This function only handles the GX processor, and kicks every
> + * thing else to the Cyrix init function above - that should
> + * cover any processors that might have been branded differently
> + * after NSC aquired Cyrix.
> + *
> + * If this breaks your GX1 horribly, please e-mail
> + * [email protected] to tell us.
> + */
> +
> + /* Handle the GX (Formally known as the GX2) */
> +
> + if ((c->x86 == 5) && (c->x86_model == 5)) {
> + r = get_model_name(c);
> + display_cacheinfo(c);
> + }
> + else
> + init_cyrix(c);
> +}
What's `r' doing there?
How's this look?
From: Andrew Morton <[email protected]>
- coding style fixes
- remove unused variable.
- init_nsc() must be __devinit else it'll crash during x86 fake hotplugging.
Which swsusp uses.
Cc: Jordan Crouse <[email protected]>
Cc: Alan Cox <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
---
arch/i386/kernel/cpu/amd.c | 4 +---
arch/i386/kernel/cpu/cyrix.c | 15 +++++----------
2 files changed, 6 insertions(+), 13 deletions(-)
diff -puN arch/i386/kernel/cpu/amd.c~base-support-for-amd-geode-gx-lx-processors-tidy arch/i386/kernel/cpu/amd.c
--- 25/arch/i386/kernel/cpu/amd.c~base-support-for-amd-geode-gx-lx-processors-tidy Thu Dec 15 13:33:50 2005
+++ 25-akpm/arch/i386/kernel/cpu/amd.c Thu Dec 15 13:33:50 2005
@@ -162,14 +162,12 @@ static void __init init_amd(struct cpuin
break;
}
- if ( c->x86_model == 10 ) {
+ if (c->x86_model == 10) {
/* AMD Geode LX is model 10 */
/* placeholder for any needed mods */
break;
}
-
break;
-
case 6: /* An Athlon/Duron */
/* Bit 15 of Athlon specific MSR 15, needs to be 0
diff -puN arch/i386/kernel/cpu/cyrix.c~base-support-for-amd-geode-gx-lx-processors-tidy arch/i386/kernel/cpu/cyrix.c
--- 25/arch/i386/kernel/cpu/cyrix.c~base-support-for-amd-geode-gx-lx-processors-tidy Thu Dec 15 13:33:50 2005
+++ 25-akpm/arch/i386/kernel/cpu/cyrix.c Thu Dec 15 13:35:25 2005
@@ -342,13 +342,11 @@ static void __init init_cyrix(struct cpu
return;
}
-
-/* This function handles National Semiconductor branded processors */
-
-static void __init init_nsc(struct cpuinfo_x86 *c)
+/*
+ * Handle National Semiconductor branded processors
+ */
+static void __devinit init_nsc(struct cpuinfo_x86 *c)
{
- int r;
-
/* There may be GX1 processors in the wild that are branded
* NSC and not Cyrix.
*
@@ -363,15 +361,12 @@ static void __init init_nsc(struct cpuin
/* Handle the GX (Formally known as the GX2) */
- if ((c->x86 == 5) && (c->x86_model == 5)) {
- r = get_model_name(c);
+ if (c->x86 == 5 && c->x86_model == 5)
display_cacheinfo(c);
- }
else
init_cyrix(c);
}
-
/*
* Cyrix CPUs without cpuid or with cpuid not yet enabled can be detected
* by the fact that they preserve the flags across the division of 5/2.
_
"Jordan Crouse" <[email protected]> wrote:
>
> @@ -95,6 +100,11 @@ static unsigned int via_data_present (vo
> static u32 via_data_read (void);
> #endif
>
> +static int __init geode_init(struct pci_dev *dev);
> +static void geode_cleanup(void);
> +static unsigned int geode_data_present (void);
> +static u32 geode_data_read (void);
> +
> struct rng_operations {
> int (*init) (struct pci_dev *dev);
> void (*cleanup) (void);
> @@ -122,6 +132,7 @@ enum {
> rng_hw_intel,
> rng_hw_amd,
> rng_hw_via,
> + rng_hw_geode,
> };
Should all the Geode additions to hw_random.c be inside __i386__, like VIA?
> Should all the Geode additions to hw_random.c be inside __i386__, like VIA?
I thought that a early version did that and somebody took exception to
it, but I can't find any e-mails to that effect right now. Obviously,
the defines are only useful when you have a Geode CPU (and thus a x86_32),
so if nobody complains, I think that would be fine.
Jordan
--
Jordan Crouse
Senior Linux Engineer
AMD - Personal Connectivity Solutions Group
<http://www.amd.com/embeddedprocessors>
"Jordan Crouse" <[email protected]> wrote:
>
> A simple patch to fix APM assisted screen blanking (this at least fixes
> a issue with the Geode LX BIOS). Reposted from before with no changes.
>
> APM screen blanking fix.
>
> This patch fixes screen blanking on BIOSes that return
> APM_NOT_ENGAGED when APM enabled screen blanking is not
> turned on.
Well actually it does a whole bunch of cleanup, no?
> Signed off by: Jordan Crouse <[email protected]>
> ---
>
> arch/i386/kernel/apm.c | 27 ++++++++++++++-------------
> 1 files changed, 14 insertions(+), 13 deletions(-)
>
> diff --git a/arch/i386/kernel/apm.c b/arch/i386/kernel/apm.c
> index 1e60acb..03e9d84 100644
> --- a/arch/i386/kernel/apm.c
> +++ b/arch/i386/kernel/apm.c
> @@ -1075,22 +1075,23 @@ static int apm_engage_power_management(u
>
> static int apm_console_blank(int blank)
> {
> - int error;
> - u_short state;
> + int error, i;
> + u_short state;
> + u_short dev[3] = { 0x100, 0x1FF, 0x101 };
I'll make dev[] `static const'. That'll save a scrap of kernel text.
> state = blank ? APM_STATE_STANDBY : APM_STATE_READY;
> - /* Blank the first display device */
> - error = set_power_state(0x100, state);
> - if ((error != APM_SUCCESS) && (error != APM_NO_ERROR)) {
> - /* try to blank them all instead */
> - error = set_power_state(0x1ff, state);
> - if ((error != APM_SUCCESS) && (error != APM_NO_ERROR))
> - /* try to blank device one instead */
> - error = set_power_state(0x101, state);
> +
> + for (i = 0; i < 3; i++) {
> + error = set_power_state(dev[i], state);
> +
> + if ((error == APM_SUCCESS) || (error == APM_NO_ERROR))
> + return 1;
> +
> + if (error == APM_NOT_ENGAGED)
> + break;
> }
> - if ((error == APM_SUCCESS) || (error == APM_NO_ERROR))
> - return 1;
All the above doesn't actually have any functional changes does it?
It's a decent-looking cleanup, but it should have been separately
changelogged.
> - if (error == APM_NOT_ENGAGED) {
> + if (error == APM_NOT_ENGAGED && state != APM_STATE_READY) {
And this is the actual fix/workaround?
"Jordan Crouse" <[email protected]> wrote:
>
> > Should all the Geode additions to hw_random.c be inside __i386__, like VIA?
>
> I thought that a early version did that and somebody took exception to
> it, but I can't find any e-mails to that effect right now. Obviously,
> the defines are only useful when you have a Geode CPU (and thus a x86_32),
> so if nobody complains, I think that would be fine.
Fair enough. Please send an update sometime.
We might as well do s/__i386__/X86_32/ throughout that file - bit pointless
but it's a little bit more idiomatic.
Andrew Morton wrote:
> "Jordan Crouse" <[email protected]> wrote:
>
>>>Should all the Geode additions to hw_random.c be inside __i386__, like VIA?
>>
>>I thought that a early version did that and somebody took exception to
>>it, but I can't find any e-mails to that effect right now. Obviously,
>>the defines are only useful when you have a Geode CPU (and thus a x86_32),
>>so if nobody complains, I think that would be fine.
>
>
> Fair enough. Please send an update sometime.
>
> We might as well do s/__i386__/X86_32/ throughout that file - bit pointless
> but it's a little bit more idiomatic.
What about the rng rewrite recently posted? Any opinions on that?
I lean towards applying it, long term, but IIRC there were problems that
prevented immediate merge.
Jeff
Jeff Garzik <[email protected]> wrote:
>
> Andrew Morton wrote:
> > "Jordan Crouse" <[email protected]> wrote:
> >
> >>>Should all the Geode additions to hw_random.c be inside __i386__, like VIA?
> >>
> >>I thought that a early version did that and somebody took exception to
> >>it, but I can't find any e-mails to that effect right now. Obviously,
> >>the defines are only useful when you have a Geode CPU (and thus a x86_32),
> >>so if nobody complains, I think that would be fine.
> >
> >
> > Fair enough. Please send an update sometime.
> >
> > We might as well do s/__i386__/X86_32/ throughout that file - bit pointless
> > but it's a little bit more idiomatic.
>
> What about the rng rewrite recently posted? Any opinions on that?
(http://lkml.org/lkml/2005/10/29/145)
Looks sane. It ended up with Deepak deciding to split the various
manufacturer bits apart and then send the patches in my direction. I don't
think that happened?
> I lean towards applying it, long term, but IIRC there were problems that
> prevented immediate merge.
There was some talk about moving functionality to userspace, but it seems a
bit speculative.
On Dec 15 2005, at 17:07, Jeff Garzik was caught saying:
> Andrew Morton wrote:
> >"Jordan Crouse" <[email protected]> wrote:
> >
> >>>Should all the Geode additions to hw_random.c be inside __i386__, like
> >>>VIA?
> >>
> >>I thought that a early version did that and somebody took exception to
> >>it, but I can't find any e-mails to that effect right now. Obviously,
> >>the defines are only useful when you have a Geode CPU (and thus a
> >>x86_32), so if nobody complains, I think that would be fine.
> >
> >
> >Fair enough. Please send an update sometime.
> >
> >We might as well do s/__i386__/X86_32/ throughout that file - bit pointless
> >but it's a little bit more idiomatic.
>
> What about the rng rewrite recently posted? Any opinions on that?
>
> I lean towards applying it, long term, but IIRC there were problems that
> prevented immediate merge.
Looking at the thread from my 2nd attempt, the main thing holding it back
from -mm was splitting the VIA/AMD/Intel drivers into separate files but
as is often the case, -ETOOMANYPROJECTS. Will try to get to it sometime
early next year.
~Deepak
--
Deepak Saxena - [email protected] - http://www.plexity.net
For what are your possessions but things you keep and guard for fear
you may need them tomorrow. - Khalil Gibran, "The Prophet"