This patch set aims at bringing a device tree support for the sam9261.
It's mostly based on the sam9263 and sam9x5 stuff.
Changes since V3:
* Added support for the touchscreen
* Added support for the spi dataflash
* Activated the TCB by default
* Reworked the patch organization to reduce the number of patchs
* changed the default bootargs (no mem description, UBI on mtdpart 5)
* Changed the xlate implementation of the at91 pinctrl driver to lock the GPIOs
for IRQs instead of requesting them (needed for the touchscreen driver)
* some stylistic changes
Changes since V2:
* removed the smc driver from the serie. It'll be posted in an independent
serie later.
* removed the DM9000 support (it'll come with the smc driver)
* the sam9261 now supports the Common Clock Framework (CCF). Note: to enable
the CCF you must remove from the kernel config the platforms that don't
support it.
* Added basic DT binding for the bus matrix
* Added support for USB host
* Added support for USB gadget
* in dts(i), replaced interrupt-parent with interrupts-extended
* changed the nand partition plan (same as for the sama5d3)
* removed 'mem' parameter in command line
* re-ordered dt-nodes in ascending address order.
* split the lcd support patch in 2 parts (SOC and board)
Change since V1:
* changed the DT representation to use address translation and separate the
timings' configuration from the device properties by adding a "simple-bus"
inetrmediate node.
* moved the smc driver from drivers/bus to drivers/memmory
* smc driver now accepts timings in nanoseconds as well as raw register values
* smc driver can clip the timings if they're out of bound and dump them to the
console
* DM9000 timings are now described in nanosecs (for the virtue of example)
supported features are:
* working with the Common Clock Framework and the old at91 clock implementation
* dbgu
* lcdc
* usb host
* usb gadget,
* spi dataflash
* nand flash
* touchscreen
* leds
* user buttons
In the TODO list:
* dm9000 (ethernet)
* audio
* mmc
This serie relies on the following patchs:
usb: at91-udc: fix irq and iomem resource retrieval
ARM: at91: prepare sam9 dt boards transition to common
Jean-Jacques
Jean-Jacques Hiblot (8):
at91: dt: Adds support for the bus matrix declaration in the DT
at91: pinctrl: don't request GPIOs used for interrupts but lock them
as IRQ
at91: dt: Add at91sam9261 dt SoC support
at91: dt: defconfig: Added the sam9261 to the list of DT-enabled SOCs
at91: dt: sam9261: Device Tree support for the at91sam9261ek
at91: updated the at91_dt_defconfig with support for the ADS7846
ARM: at91: prepare common clk transition for sam9261 SoC
ARM: at91: move sam9261 SoC to common clk
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/at91sam9261.dtsi | 740 ++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/at91sam9261ek.dts | 204 ++++++++++
arch/arm/configs/at91_dt_defconfig | 2 +
arch/arm/mach-at91/Kconfig | 1 -
arch/arm/mach-at91/at91sam9261.c | 25 +-
arch/arm/mach-at91/setup.c | 23 ++
drivers/pinctrl/pinctrl-at91.c | 5 +-
8 files changed, 996 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/boot/dts/at91sam9261.dtsi
create mode 100644 arch/arm/boot/dts/at91sam9261ek.dts
--
1.8.5.3
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
---
arch/arm/mach-at91/setup.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index f7ca97b..b8d0b66 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -487,6 +487,28 @@ end:
of_node_put(np);
}
+static struct of_device_id matrix_ids[] = {
+ { .compatible = "atmel,at91sam9261-bus-matrix", },
+ { /*sentinel*/ }
+};
+
+static void at91_dt_matrix(void)
+{
+ struct device_node *np;
+
+ np = of_find_matching_node(NULL, matrix_ids);
+ if (!np) {
+ pr_debug("AT91: unable to find compatible bus matrix controller node in dtb\n");
+ return;
+ }
+
+ at91_matrix_base = of_iomap(np, 0);
+ if (!at91_matrix_base)
+ panic("Impossible to ioremap at91_matrix_base\n");
+
+ of_node_put(np);
+}
+
void __init at91rm9200_dt_initialize(void)
{
at91_dt_ramc();
@@ -506,6 +528,7 @@ void __init at91_dt_initialize(void)
at91_dt_rstc();
at91_dt_ramc();
at91_dt_shdwc();
+ at91_dt_matrix();
/* Init clock subsystem */
at91_dt_clock_init();
--
1.8.5.3
This provides touchscreen support to the at91sam9261ek
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
---
arch/arm/configs/at91_dt_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig
index 3c6905d..aaa322d 100644
--- a/arch/arm/configs/at91_dt_defconfig
+++ b/arch/arm/configs/at91_dt_defconfig
@@ -120,6 +120,7 @@ CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ADS7846=y
# CONFIG_SERIO is not set
CONFIG_LEGACY_PTY_COUNT=4
CONFIG_SERIAL_ATMEL=y
--
1.8.5.3
This patch encloses sam9261 old clk registration in
"#if defined(CONFIG_OLD_CLK_AT91) #endif" sections.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
---
arch/arm/mach-at91/at91sam9261.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 5c90581..3345a2b 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -25,10 +25,12 @@
#include "at91_rstc.h"
#include "soc.h"
#include "generic.h"
-#include "clock.h"
#include "sam9_smc.h"
#include "pm.h"
+#if defined(CONFIG_OLD_CLK_AT91)
+#include "clock.h"
+
/* --------------------------------------------------------------------
* Clocks
* -------------------------------------------------------------------- */
@@ -264,7 +266,9 @@ static void __init at91sam9261_register_clocks(void)
clk_register(&hck0);
clk_register(&hck1);
}
-
+#else
+#define at91sam9261_register_clocks NULL
+#endif
/* --------------------------------------------------------------------
* GPIO
* -------------------------------------------------------------------- */
--
1.8.5.3
This patch removes the selection of AT91_USE_OLD_CLK when selecting
sam9261 SoCs support. This will automatically enable COMMON_CLK_AT91 option
and add support for at91 common clk implementation.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
---
arch/arm/mach-at91/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 4f0e800..5af3f07 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -119,7 +119,6 @@ config SOC_AT91SAM9261
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9
- select AT91_USE_OLD_CLK
select HAVE_AT91_USB_CLK
help
Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC.
--
1.8.5.3
This patch implements a DTS to boot a at91sam9261ek with a dt-enabled
kernel (at91_dt_defconfig).
supported features are:
* dbgu
* lcdc
* usb host
* usb gadget,
* spi dataflash
* nand flash
* touchscreen
* leds
* user buttons
In the TODO list:
* dm9000 (ethernet)
* audio
* mmc
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/at91sam9261ek.dts | 204 ++++++++++++++++++++++++++++++++++++
2 files changed, 206 insertions(+)
create mode 100644 arch/arm/boot/dts/at91sam9261ek.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b9d6a8b..493082b 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -12,6 +12,8 @@ dtb-$(CONFIG_ARCH_AT91) += ethernut5.dtb
dtb-$(CONFIG_ARCH_AT91) += evk-pro3.dtb
dtb-$(CONFIG_ARCH_AT91) += tny_a9260.dtb
dtb-$(CONFIG_ARCH_AT91) += usb_a9260.dtb
+# sam9261
+dtb-$(CONFIG_ARCH_AT91) += at91sam9261ek.dtb
# sam9263
dtb-$(CONFIG_ARCH_AT91) += at91sam9263ek.dtb
dtb-$(CONFIG_ARCH_AT91) += tny_a9263.dtb
diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts
new file mode 100644
index 0000000..03adb7f
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9261ek.dts
@@ -0,0 +1,204 @@
+/*
+ * at91sam9261ek.dts - Device Tree file for Atmel at91sam9261 reference board
+ *
+ * Copyright (C) 2013 Jean-Jacques Hiblot <[email protected]>
+ *
+ * Licensed under GPLv2 only.
+ */
+/dts-v1/;
+#include "at91sam9261.dtsi"
+
+/ {
+ model = "Atmel at91sam9261ek";
+ compatible = "atmel,at91sam9261ek", "atmel,at91sam9261", "atmel,at91sam9";
+
+ chosen {
+ bootargs = "console=ttyS0,115200 rootfstype=ubifs ubi.mtd=5 root=ubi0:rootfs rw";
+ };
+
+ memory {
+ reg = <0x20000000 0x4000000>;
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ main_clock: clock@0 {
+ compatible = "atmel,osc", "fixed-clock";
+ clock-frequency = <18432000>;
+ };
+ };
+
+ ahb {
+ usb0: ohci@00500000 {
+ status = "okay";
+ };
+
+ fb0: fb@0x00600000 {
+ display = <&display0>;
+ atmel,power-control-gpio = <&pioA 12 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ display0: display {
+ bits-per-pixel = <16>;
+ atmel,lcdcon-backlight;
+ atmel,dmacon = <0x1>;
+ atmel,lcdcon2 = <0x80008002>;
+ atmel,guard-time = <1>;
+ atmel,lcd-wiring-mode = "BRG";
+
+ display-timings {
+ native-mode = <&timing0>;
+ timing0: timing0 {
+ clock-frequency = <4965000>;
+ hactive = <240>;
+ vactive = <320>;
+ hback-porch = <1>;
+ hfront-porch = <33>;
+ vback-porch = <1>;
+ vfront-porch = <0>;
+ hsync-len = <5>;
+ vsync-len = <1>;
+ hsync-active = <1>;
+ vsync-active = <1>;
+ };
+ };
+ };
+ };
+
+ nand0: nand@40000000 {
+ nand-bus-width = <8>;
+ nand-ecc-mode = "soft";
+ nand-on-flash-bbt;
+ status = "okay";
+
+ at91bootstrap@0 {
+ label = "at91bootstrap";
+ reg = <0x0 0x40000>;
+ };
+
+ bootloader@40000 {
+ label = "bootloader";
+ reg = <0x40000 0x80000>;
+ };
+
+ bootloaderenv@c0000 {
+ label = "bootloader env";
+ reg = <0xc0000 0xc0000>;
+ };
+
+ dtb@180000 {
+ label = "device tree";
+ reg = <0x180000 0x80000>;
+ };
+
+ kernel@200000 {
+ label = "kernel";
+ reg = <0x200000 0x600000>;
+ };
+
+ rootfs@800000 {
+ label = "rootfs";
+ reg = <0x800000 0x0f800000>;
+ };
+ };
+
+ apb {
+ usb1: gadget@fffa4000 {
+ atmel,vbus-gpio = <&pioB 29 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+ spi0: spi@fffc8000 {
+ cs-gpios = <&pioA 3 0>, <0>, <&pioA 28 0>, <0>;
+ status = "okay";
+
+ mtd_dataflash@0 {
+ compatible = "atmel,at45", "atmel,dataflash";
+ reg = <0>;
+ spi-max-frequency = <15000000>;
+ };
+ tsc2046@0 {
+ reg = <2>;
+ compatible = "ti,ads7843";
+ interrupts-extended = <&pioC 2 IRQ_TYPE_EDGE_BOTH>;
+ spi-max-frequency = <3000000>;
+ pendown-gpio = <&pioC 2 GPIO_ACTIVE_HIGH>;
+
+ ti,x-min = /bits/ 16 <150>;
+ ti,x-max = /bits/ 16 <3830>;
+ ti,y-min = /bits/ 16 <190>;
+ ti,y-max = /bits/ 16 <3830>;
+ ti,vref-delay-usecs = /bits/ 16 <450>;
+ ti,x-plate-ohms = /bits/ 16 <450>;
+ ti,y-plate-ohms = /bits/ 16 <250>;
+ ti,pressure-max = /bits/ 16 <15000>;
+ ti,debounce-rep = /bits/ 16 <0>;
+ ti,debounce-tol = /bits/ 16 <65535>;
+ ti,debounce-max = /bits/ 16 <1>;
+
+ linux,wakeup;
+ };
+ };
+
+ dbgu: serial@fffff200 {
+ status = "okay";
+ };
+
+ watchdog@fffffd40 {
+ status = "okay";
+ };
+
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ ds8 {
+ label = "ds8";
+ gpios = <&pioA 13 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "none";
+ };
+ ds7 {
+ label = "ds7";
+ gpios = <&pioA 14 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "nand-disk";
+ };
+ ds1 {
+ label = "ds1";
+ gpios = <&pioA 23 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+
+ button_0 {
+ label = "button_0";
+ gpios = <&pioA 27 GPIO_ACTIVE_LOW>;
+ linux,code = <256>;
+ gpio-key,wakeup;
+ };
+ button_1 {
+ label = "button_1";
+ gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
+ linux,code = <257>;
+ gpio-key,wakeup;
+ };
+ button_2 {
+ label = "button_2";
+ gpios = <&pioA 25 GPIO_ACTIVE_LOW>;
+ linux,code = <258>;
+ gpio-key,wakeup;
+ };
+ button_3 {
+ label = "button_3";
+ gpios = <&pioA 24 GPIO_ACTIVE_LOW>;
+ linux,code = <259>;
+ gpio-key,wakeup;
+ };
+ };
+};
--
1.8.5.3
During the xlate stage of the DT interrupt parsing, the at91 pinctrl driver
requests the GPIOs that are described as interrupt sources. This prevents a
driver to request the gpio later to get its electrical value.
This patch replaces the gpio_request with a gpio_lock_as_irq to prevent the
gpio to be set as an ouput while allowing a subsequent gpio_request to succeed
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
---
drivers/pinctrl/pinctrl-at91.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index d990e33..db55b96 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -1478,18 +1478,17 @@ static int at91_gpio_irq_domain_xlate(struct irq_domain *d,
{
struct at91_gpio_chip *at91_gpio = d->host_data;
int ret;
- int pin = at91_gpio->chip.base + intspec[0];
if (WARN_ON(intsize < 2))
return -EINVAL;
*out_hwirq = intspec[0];
*out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
- ret = gpio_request(pin, ctrlr->full_name);
+ ret = gpio_lock_as_irq(&at91_gpio->chip, intspec[0]);
if (ret)
return ret;
- ret = gpio_direction_input(pin);
+ ret = at91_gpio_direction_input(&at91_gpio->chip, intspec[0]);
if (ret)
return ret;
--
1.8.5.3
This patch adds support for the Device Tree on a sam9261-based platform
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
---
arch/arm/boot/dts/at91sam9261.dtsi | 740 +++++++++++++++++++++++++++++++++++++
arch/arm/mach-at91/at91sam9261.c | 17 +
2 files changed, 757 insertions(+)
create mode 100644 arch/arm/boot/dts/at91sam9261.dtsi
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
new file mode 100644
index 0000000..a95bfb3
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -0,0 +1,740 @@
+/*
+ * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
+ *
+ * Copyright (C) 2013 Jean-Jacques Hiblot <[email protected]>
+ *
+ * Licensed under GPLv2 only.
+ */
+
+#include "skeleton.dtsi"
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clk/at91.h>
+
+/ {
+ model = "Atmel AT91SAM9261 family SoC";
+ compatible = "atmel,at91sam9261";
+ interrupt-parent = <&aic>;
+
+ aliases {
+ serial0 = &dbgu;
+ serial1 = &usart0;
+ serial2 = &usart1;
+ serial3 = &usart2;
+ gpio0 = &pioA;
+ gpio1 = &pioB;
+ gpio2 = &pioC;
+ tcb0 = &tcb0;
+ i2c0 = &i2c0;
+ ssc0 = &ssc0;
+ ssc1 = &ssc1;
+ };
+
+ cpus {
+ #address-cells = <0>;
+ #size-cells = <0>;
+
+ cpu {
+ compatible = "arm,arm926ej-s";
+ device_type = "cpu";
+ };
+ };
+
+ memory {
+ reg = <0x20000000 0x08000000>;
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ usb0: ohci@00500000 {
+ compatible = "atmel,at91rm9200-ohci", "usb-ohci";
+ reg = <0x00500000 0x100000>;
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&usb>, <&ohci_clk>, <&hclk0>, <&uhpck>;
+ clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
+ status = "disabled";
+ };
+
+ fb0: fb@0x00600000 {
+ compatible = "atmel,at91sam9261-lcdc";
+ reg = <0x00600000 0x1000>;
+ interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fb>;
+ clocks = <&lcd_clk>, <&hclk1>;
+ clock-names = "lcdc_clk", "hclk";
+ status = "disabled";
+ };
+
+ nand0: nand@40000000 {
+ compatible = "atmel,at91rm9200-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x40000000 0x10000000>;
+ atmel,nand-addr-offset = <22>;
+ atmel,nand-cmd-offset = <21>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_nand>;
+
+ gpios = <&pioC 15 GPIO_ACTIVE_HIGH
+ &pioC 14 GPIO_ACTIVE_HIGH
+ 0
+ >;
+ status = "disabled";
+ };
+
+ apb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ tcb0: timer@fffa0000 {
+ compatible = "atmel,at91rm9200-tcb";
+ reg = <0xfffa0000 0x100>;
+ interrupts = < 17 IRQ_TYPE_LEVEL_HIGH 0
+ 18 IRQ_TYPE_LEVEL_HIGH 0
+ 19 IRQ_TYPE_LEVEL_HIGH 0
+ >;
+ clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
+ clock-names = "t0_clk", "t1_clk", "t2_clk";
+ };
+
+ usb1: gadget@fffa4000 {
+ compatible = "atmel,at91rm9200-udc";
+ reg = <0xfffa4000 0x4000>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&usb>, <&udc_clk>, <&udpck>;
+ clock-names = "usb_clk", "udc_clk", "udpck";
+ status = "disabled";
+ };
+
+ mmc0: mmc@fffa8000 {
+ compatible = "atmel,hsmci";
+ reg = <0xfffa8000 0x600>;
+ interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mci0_clk>;
+ clock-names = "mci_clk";
+ status = "disabled";
+ };
+
+ i2c0: i2c@fffac000 {
+ compatible = "atmel,at91sam9261-i2c";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c_twi>;
+ reg = <0xfffac000 0x100>;
+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&twi0_clk>;
+ status = "disabled";
+ };
+
+ usart0: serial@fffb0000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffb0000 0x200>;
+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart0>;
+ clocks = <&usart0_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ usart1: serial@fffb4000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffb4000 0x200>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart1>;
+ clocks = <&usart1_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ usart2: serial@fffb8000{
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffb8000 0x200>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart2>;
+ clocks = <&usart2_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ ssc0: ssc@fffbc000 {
+ compatible = "atmel,at91rm9200-ssc";
+ reg = <0xfffbc000 0x4000>;
+ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+ status = "disabled";
+ };
+
+ ssc1: ssc@fffc0000 {
+ compatible = "atmel,at91rm9200-ssc";
+ reg = <0xfffc0000 0x4000>;
+ interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
+ status = "disabled";
+ };
+
+ spi0: spi@fffc8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91rm9200-spi";
+ reg = <0xfffc8000 0x200>;
+ cs-gpios = <0>, <0>, <0>, <0>;
+ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi0>;
+ clocks = <&spi0_clk>;
+ clock-names = "spi_clk";
+ status = "disabled";
+ };
+
+ spi1: spi@fffcc000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91rm9200-spi";
+ reg = <0xfffcc000 0x200>;
+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1>;
+ clocks = <&spi1_clk>;
+ clock-names = "spi_clk";
+ status = "disabled";
+ };
+
+ ramc: ramc@ffffea00 {
+ compatible = "atmel,at91sam9260-sdramc";
+ reg = <0xffffea00 0x200>;
+ };
+
+ matrix: matrix@ffffee00 {
+ compatible = "atmel,at91sam9261-bus-matrix";
+ reg = <0xffffee00 0x200>;
+ };
+
+ aic: interrupt-controller@fffff000 {
+ #interrupt-cells = <3>;
+ compatible = "atmel,at91rm9200-aic";
+ interrupt-controller;
+ reg = <0xfffff000 0x200>;
+ atmel,external-irqs = <29 30 31>;
+ };
+
+ dbgu: serial@fffff200 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffff200 0x200>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dbgu>;
+ clocks = <&mck>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ pinctrl@fffff400 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+ ranges = <0xfffff400 0xfffff400 0xa00>;
+
+ atmel,mux-mask = <
+ /* A B */
+ 0xffffffff 0xfffffff7 /* pioA */
+ 0xffffffff 0xfffffff4 /* pioB */
+ 0xffffffff 0xffffff07 /* pioC */
+ >;
+
+ /* shared pinctrl settings */
+ dbgu {
+ pinctrl_dbgu: dbgu-0 {
+ atmel,pins =
+ <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
+ };
+ };
+
+ usart0 {
+ pinctrl_usart0: usart0-0 {
+ atmel,pins =
+ <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+ AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart0_rts: usart0_rts-0 {
+ atmel,pins =
+ <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart0_cts: usart0_cts-0 {
+ atmel,pins =
+ <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ usart1 {
+ pinctrl_usart1: usart1-0 {
+ atmel,pins =
+ <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+ AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart1_rts: usart1_rts-0 {
+ atmel,pins =
+ <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart1_cts: usart1_cts-0 {
+ atmel,pins =
+ <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ usart2 {
+ pinctrl_usart2: usart2-0 {
+ atmel,pins =
+ <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+ AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart2_rts: usart2_rts-0 {
+ atmel,pins =
+ <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart2_cts: usart2_cts-0 {
+ atmel,pins =
+ <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ nand {
+ pinctrl_nand: nand-0 {
+ atmel,pins =
+ <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP
+ AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
+ };
+ };
+
+ mmc0 {
+ pinctrl_mmc0_clk: mmc0_clk-0 {
+ atmel,pins =
+ <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
+ atmel,pins =
+ <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP
+ AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
+ };
+
+ pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
+ atmel,pins =
+ <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP
+ AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP
+ AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
+ };
+ };
+
+ ssc0 {
+ pinctrl_ssc0_tx: ssc0_tx-0 {
+ atmel,pins =
+ <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_ssc0_rx: ssc0_rx-0 {
+ atmel,pins =
+ <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ ssc1 {
+ pinctrl_ssc1_tx: ssc1_tx-0 {
+ atmel,pins =
+ <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_ssc1_rx: ssc1_rx-0 {
+ atmel,pins =
+ <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ spi0 {
+ pinctrl_spi0: spi0-0 {
+ atmel,pins =
+ <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ spi1 {
+ pinctrl_spi1: spi1-0 {
+ atmel,pins =
+ <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ tcb0 {
+ pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+ atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+ atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+ atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+ atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+ atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+ atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+ atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+ atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+ atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ i2c0 {
+ pinctrl_i2c_bitbang: i2c-0-bitbang {
+ atmel,pins =
+ <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
+ AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+ };
+ pinctrl_i2c_twi: i2c-0-twi {
+ atmel,pins =
+ <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ fb {
+ pinctrl_fb: fb-0 {
+ atmel,pins =
+ <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE
+ >;
+ };
+ };
+
+ pioA: gpio@fffff400 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff400 0x200>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioA_clk>;
+ };
+
+ pioB: gpio@fffff600 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff600 0x200>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioB_clk>;
+ };
+
+ pioC: gpio@fffff800 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff800 0x200>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioC_clk>;
+ };
+ };
+
+ pmc: pmc@fffffc00 {
+ compatible = "atmel,at91rm9200-pmc";
+ reg = <0xfffffc00 0x100>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+
+ clk32k: slck {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
+
+ main: mainck {
+ compatible = "atmel,at91rm9200-clk-main";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MOSCS>;
+ clocks = <&clk32k>;
+ };
+
+ plla: pllack {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKA>;
+ clocks = <&main>;
+ reg = <0>;
+ atmel,clk-input-range = <1000000 32000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
+ };
+
+ pllb: pllbck {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKB>;
+ clocks = <&main>;
+ reg = <1>;
+ atmel,clk-input-range = <1000000 32000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
+ };
+
+ mck: masterck {
+ compatible = "atmel,at91rm9200-clk-master";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
+ clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
+ atmel,clk-output-range = <0 94000000>;
+ atmel,clk-divisors = <1 2 4 3>;
+ };
+
+ usb: usbck {
+ compatible = "atmel,at91rm9200-clk-usb";
+ #clock-cells = <0>;
+ atmel,clk-divisors = <1 2 4 3>;
+ clocks = <&pllb>;
+ };
+
+ systemck {
+ compatible = "atmel,at91rm9200-clk-system";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ uhpck: uhpck {
+ #clock-cells = <0>;
+ reg = <6>;
+ clocks = <&usb>;
+ };
+
+ udpck: udpck {
+ #clock-cells = <0>;
+ reg = <7>;
+ clocks = <&usb>;
+ };
+
+ hclk0: hclk0 {
+ #clock-cells = <0>;
+ reg = <16>;
+ clocks = <&mck>;
+ };
+
+ hclk1: hclk1 {
+ #clock-cells = <0>;
+ reg = <17>;
+ clocks = <&mck>;
+ };
+ };
+
+ periphck {
+ compatible = "atmel,at91rm9200-clk-peripheral";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mck>;
+
+ pioA_clk: pioA_clk {
+ #clock-cells = <0>;
+ reg = <2>;
+ };
+
+ pioB_clk: pioB_clk {
+ #clock-cells = <0>;
+ reg = <3>;
+ };
+
+ pioC_clk: pioC_clk {
+ #clock-cells = <0>;
+ reg = <4>;
+ };
+
+ usart0_clk: usart0_clk {
+ #clock-cells = <0>;
+ reg = <6>;
+ };
+
+ usart1_clk: usart1_clk {
+ #clock-cells = <0>;
+ reg = <7>;
+ };
+
+ usart2_clk: usart2_clk {
+ #clock-cells = <0>;
+ reg = <8>;
+ };
+
+ mci0_clk: mci0_clk {
+ #clock-cells = <0>;
+ reg = <9>;
+ };
+
+ udc_clk: udc_clk {
+ #clock-cells = <0>;
+ reg = <10>;
+ };
+
+ twi0_clk: twi0_clk {
+ reg = <11>;
+ #clock-cells = <0>;
+ };
+
+ spi0_clk: spi0_clk {
+ #clock-cells = <0>;
+ reg = <12>;
+ };
+
+ spi1_clk: spi1_clk {
+ #clock-cells = <0>;
+ reg = <13>;
+ };
+
+ tc0_clk: tc0_clk {
+ #clock-cells = <0>;
+ reg = <17>;
+ };
+
+ tc1_clk: tc1_clk {
+ #clock-cells = <0>;
+ reg = <18>;
+ };
+
+ tc2_clk: tc2_clk {
+ #clock-cells = <0>;
+ reg = <19>;
+ };
+
+ ohci_clk: ohci_clk {
+ #clock-cells = <0>;
+ reg = <20>;
+ };
+
+ lcd_clk: lcd_clk {
+ #clock-cells = <0>;
+ reg = <21>;
+ };
+ };
+ };
+
+ rstc@fffffd00 {
+ compatible = "atmel,at91sam9260-rstc";
+ reg = <0xfffffd00 0x10>;
+ };
+
+ shdwc@fffffd10 {
+ compatible = "atmel,at91sam9260-shdwc";
+ reg = <0xfffffd10 0x10>;
+ };
+
+ pit: timer@fffffd30 {
+ compatible = "atmel,at91sam9260-pit";
+ reg = <0xfffffd30 0xf>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&mck>;
+ };
+
+ watchdog@fffffd40 {
+ compatible = "atmel,at91sam9260-wdt";
+ reg = <0xfffffd40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ status = "disabled";
+ };
+ };
+ };
+
+ i2c@0 {
+ compatible = "i2c-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c_bitbang>;
+ gpios = <&pioA 7 GPIO_ACTIVE_HIGH /* sda */
+ &pioA 8 GPIO_ACTIVE_HIGH /* scl */
+ >;
+ i2c-gpio,sda-open-drain;
+ i2c-gpio,scl-open-drain;
+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+};
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 6276b4c..5c90581 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -189,6 +189,23 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_ID("pioA", &pioA_clk),
CLKDEV_CON_ID("pioB", &pioB_clk),
CLKDEV_CON_ID("pioC", &pioC_clk),
+ /* more lookup table for DT entries */
+ CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
+ CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
+ CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
+ CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
+ CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
+ CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
+ CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
+ CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &hck0),
+ CLKDEV_CON_DEV_ID("hclk", "600000.fb", &hck1),
+ CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
+ CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
};
static struct clk_lookup usart_clocks_lookups[] = {
--
1.8.5.3
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
---
arch/arm/configs/at91_dt_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig
index 0b4e9b5..3c6905d 100644
--- a/arch/arm/configs/at91_dt_defconfig
+++ b/arch/arm/configs/at91_dt_defconfig
@@ -16,6 +16,7 @@ CONFIG_MODULE_UNLOAD=y
CONFIG_ARCH_AT91=y
CONFIG_SOC_AT91RM9200=y
CONFIG_SOC_AT91SAM9260=y
+CONFIG_SOC_AT91SAM9261=y
CONFIG_SOC_AT91SAM9263=y
CONFIG_SOC_AT91SAM9G45=y
CONFIG_SOC_AT91SAM9X5=y
--
1.8.5.3
Hi Jean-Jacques,
Thanks for this new series, I have one little comment:
On 12/02/2014 11:06, Jean-Jacques Hiblot wrote:
> Signed-off-by: Jean-Jacques Hiblot <[email protected]>
> ---
> arch/arm/mach-at91/setup.c | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
> index f7ca97b..b8d0b66 100644
> --- a/arch/arm/mach-at91/setup.c
> +++ b/arch/arm/mach-at91/setup.c
> @@ -487,6 +487,28 @@ end:
> of_node_put(np);
> }
>
> +static struct of_device_id matrix_ids[] = {
> + { .compatible = "atmel,at91sam9261-bus-matrix", },
> + { /*sentinel*/ }
> +};
> +
> +static void at91_dt_matrix(void)
> +{
> + struct device_node *np;
> +
> + np = of_find_matching_node(NULL, matrix_ids);
> + if (!np) {
> + pr_debug("AT91: unable to find compatible bus matrix controller node in dtb\n");
I think that a panic here should be more consistent with the next check.
Indeed if it fails here then at91_matrix_base will be uninitialized too,
and it will make the kernel crash when at91_matrix_base will be accessed.
Thanks,
Gregory
> + return;
> + }
> +
> + at91_matrix_base = of_iomap(np, 0);
> + if (!at91_matrix_base)
> + panic("Impossible to ioremap at91_matrix_base\n");
> +
> + of_node_put(np);
> +}
> +
> void __init at91rm9200_dt_initialize(void)
> {
> at91_dt_ramc();
> @@ -506,6 +528,7 @@ void __init at91_dt_initialize(void)
> at91_dt_rstc();
> at91_dt_ramc();
> at91_dt_shdwc();
> + at91_dt_matrix();
>
> /* Init clock subsystem */
> at91_dt_clock_init();
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
On 12/02/2014 11:45, Gregory CLEMENT :
> Hi Jean-Jacques,
>
> Thanks for this new series, I have one little comment:
>
> On 12/02/2014 11:06, Jean-Jacques Hiblot wrote:
>> Signed-off-by: Jean-Jacques Hiblot <[email protected]>
>> ---
>> arch/arm/mach-at91/setup.c | 23 +++++++++++++++++++++++
>> 1 file changed, 23 insertions(+)
>>
>> diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
>> index f7ca97b..b8d0b66 100644
>> --- a/arch/arm/mach-at91/setup.c
>> +++ b/arch/arm/mach-at91/setup.c
>> @@ -487,6 +487,28 @@ end:
>> of_node_put(np);
>> }
>>
>> +static struct of_device_id matrix_ids[] = {
>> + { .compatible = "atmel,at91sam9261-bus-matrix", },
>> + { /*sentinel*/ }
I think that we can introduce this compatible string with sam9260
product: "atmel,at91sam9260-bus-matrix".
In addition, can you add this new binding in the documentation file:
Documentation/devicetree/bindings/arm/atmel-at91.txt
(in another patch with the "dt: bindings: " subject prefix + add the DT
mailing-list: [email protected]).
>> +};
>> +
>> +static void at91_dt_matrix(void)
>> +{
>> + struct device_node *np;
>> +
>> + np = of_find_matching_node(NULL, matrix_ids);
>> + if (!np) {
>> + pr_debug("AT91: unable to find compatible bus matrix controller node in dtb\n");
>
> I think that a panic here should be more consistent with the next check.
> Indeed if it fails here then at91_matrix_base will be uninitialized too,
> and it will make the kernel crash when at91_matrix_base will be accessed.
Yes.
> Thanks,
>
> Gregory
>
>
>> + return;
>> + }
>> +
>> + at91_matrix_base = of_iomap(np, 0);
>> + if (!at91_matrix_base)
>> + panic("Impossible to ioremap at91_matrix_base\n");
>> +
>> + of_node_put(np);
>> +}
>> +
>> void __init at91rm9200_dt_initialize(void)
>> {
>> at91_dt_ramc();
>> @@ -506,6 +528,7 @@ void __init at91_dt_initialize(void)
>> at91_dt_rstc();
>> at91_dt_ramc();
>> at91_dt_shdwc();
>> + at91_dt_matrix();
>>
>> /* Init clock subsystem */
>> at91_dt_clock_init();
>>
>
>
--
Nicolas Ferre
Hi Jean-Jacques,
On 12/02/2014 11:06, Jean-Jacques Hiblot wrote:
> This patch set aims at bringing a device tree support for the sam9261.
> It's mostly based on the sam9263 and sam9x5 stuff.
>
> Changes since V3:
> * Added support for the touchscreen
> * Added support for the spi dataflash
> * Activated the TCB by default
> * Reworked the patch organization to reduce the number of patchs
> * changed the default bootargs (no mem description, UBI on mtdpart 5)
> * Changed the xlate implementation of the at91 pinctrl driver to lock the GPIOs
> for IRQs instead of requesting them (needed for the touchscreen driver)
> * some stylistic changes
>
> Changes since V2:
> * removed the smc driver from the serie. It'll be posted in an independent
> serie later.
> * removed the DM9000 support (it'll come with the smc driver)
> * the sam9261 now supports the Common Clock Framework (CCF). Note: to enable
> the CCF you must remove from the kernel config the platforms that don't
> support it.
> * Added basic DT binding for the bus matrix
> * Added support for USB host
> * Added support for USB gadget
> * in dts(i), replaced interrupt-parent with interrupts-extended
> * changed the nand partition plan (same as for the sama5d3)
> * removed 'mem' parameter in command line
> * re-ordered dt-nodes in ascending address order.
> * split the lcd support patch in 2 parts (SOC and board)
>
>
> Change since V1:
> * changed the DT representation to use address translation and separate the
> timings' configuration from the device properties by adding a "simple-bus"
> inetrmediate node.
> * moved the smc driver from drivers/bus to drivers/memmory
> * smc driver now accepts timings in nanoseconds as well as raw register values
> * smc driver can clip the timings if they're out of bound and dump them to the
> console
> * DM9000 timings are now described in nanosecs (for the virtue of example)
>
> supported features are:
> * working with the Common Clock Framework and the old at91 clock implementation
> * dbgu
> * lcdc
> * usb host
> * usb gadget,
> * spi dataflash
> * nand flash
> * touchscreen
> * leds
> * user buttons
>
> In the TODO list:
> * dm9000 (ethernet)
> * audio
> * mmc
Besides the my comment on the 1st patch, all this series
seems pretty neat for me.
It's worth mentioning also that audio and mmc are in the
TODO list by lack of hardware to test it. So what I suggest
here is to send a follow-up patch set and to ask for a
Tested-By from people being able to test it.
For dm9000 the issue is (again) related to an ordering problem:
the Ethernet need an interrupt provided by the gpio driver. Unfortunately,
the gpio driver initialization is called after the dm900 driver
initialization.
Thanks,
Gregory
>
> This serie relies on the following patchs:
> usb: at91-udc: fix irq and iomem resource retrieval
> ARM: at91: prepare sam9 dt boards transition to common
>
> Jean-Jacques
>
> Jean-Jacques Hiblot (8):
> at91: dt: Adds support for the bus matrix declaration in the DT
> at91: pinctrl: don't request GPIOs used for interrupts but lock them
> as IRQ
> at91: dt: Add at91sam9261 dt SoC support
> at91: dt: defconfig: Added the sam9261 to the list of DT-enabled SOCs
> at91: dt: sam9261: Device Tree support for the at91sam9261ek
> at91: updated the at91_dt_defconfig with support for the ADS7846
> ARM: at91: prepare common clk transition for sam9261 SoC
> ARM: at91: move sam9261 SoC to common clk
>
> arch/arm/boot/dts/Makefile | 2 +
> arch/arm/boot/dts/at91sam9261.dtsi | 740 ++++++++++++++++++++++++++++++++++++
> arch/arm/boot/dts/at91sam9261ek.dts | 204 ++++++++++
> arch/arm/configs/at91_dt_defconfig | 2 +
> arch/arm/mach-at91/Kconfig | 1 -
> arch/arm/mach-at91/at91sam9261.c | 25 +-
> arch/arm/mach-at91/setup.c | 23 ++
> drivers/pinctrl/pinctrl-at91.c | 5 +-
> 8 files changed, 996 insertions(+), 6 deletions(-)
> create mode 100644 arch/arm/boot/dts/at91sam9261.dtsi
> create mode 100644 arch/arm/boot/dts/at91sam9261ek.dts
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
Dear Gregory CLEMENT,
On Wed, 12 Feb 2014 12:14:29 +0100, Gregory CLEMENT wrote:
> For dm9000 the issue is (again) related to an ordering problem:
> the Ethernet need an interrupt provided by the gpio driver. Unfortunately,
> the gpio driver initialization is called after the dm900 driver
> initialization.
And -EPROBE_DEFER doesn't solve this problem?
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
Hi Thomas,
2014-02-12 13:34 GMT+01:00 Thomas Petazzoni
<[email protected]>:
> Dear Gregory CLEMENT,
>
> On Wed, 12 Feb 2014 12:14:29 +0100, Gregory CLEMENT wrote:
>
>> For dm9000 the issue is (again) related to an ordering problem:
>> the Ethernet need an interrupt provided by the gpio driver. Unfortunately,
>> the gpio driver initialization is called after the dm900 driver
>> initialization.
>
> And -EPROBE_DEFER doesn't solve this problem?
not really the problem happens before the driver is actually probed
when the ressource for the platform driver are filled
>
> Thomas
> --
> Thomas Petazzoni, CTO, Free Electrons
> Embedded Linux, Kernel and Android engineering
> http://free-electrons.com
Dear Jean-Jacques Hiblot,
On Wed, 12 Feb 2014 13:36:08 +0100, Jean-Jacques Hiblot wrote:
> >> For dm9000 the issue is (again) related to an ordering problem:
> >> the Ethernet need an interrupt provided by the gpio driver. Unfortunately,
> >> the gpio driver initialization is called after the dm900 driver
> >> initialization.
> >
> > And -EPROBE_DEFER doesn't solve this problem?
> not really the problem happens before the driver is actually probed
> when the ressource for the platform driver are filled
Sorry, I don't have all the context. If I understand correctly what you
mean, the GPIO driver is probed through the DT, but the DM9000 driver
is probed in a legacy way from the board file, and you have the case
where the DM9000 platform_device gets registered before the GPIOs are
actually available? In this case, what about having the
of_platform_populate() call *before* the platform_device_register() for
your DM9000 ? Again, I don't have all the context, so I might very well
be getting the situation incorrectly.
Of course, ideally, the DM9000 driver should be probed using the DT,
but I guess this needs the SMC DT binding that is still being
discussed, if I followed correctly.
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
Hi Greg,
2014-02-12 12:14 GMT+01:00 Gregory CLEMENT <[email protected]>:
> Hi Jean-Jacques,
>
> On 12/02/2014 11:06, Jean-Jacques Hiblot wrote:
>> This patch set aims at bringing a device tree support for the sam9261.
>> It's mostly based on the sam9263 and sam9x5 stuff.
>>
>> Changes since V3:
>> * Added support for the touchscreen
>> * Added support for the spi dataflash
>> * Activated the TCB by default
>> * Reworked the patch organization to reduce the number of patchs
>> * changed the default bootargs (no mem description, UBI on mtdpart 5)
>> * Changed the xlate implementation of the at91 pinctrl driver to lock the GPIOs
>> for IRQs instead of requesting them (needed for the touchscreen driver)
>> * some stylistic changes
>>
>> Changes since V2:
>> * removed the smc driver from the serie. It'll be posted in an independent
>> serie later.
>> * removed the DM9000 support (it'll come with the smc driver)
>> * the sam9261 now supports the Common Clock Framework (CCF). Note: to enable
>> the CCF you must remove from the kernel config the platforms that don't
>> support it.
>> * Added basic DT binding for the bus matrix
>> * Added support for USB host
>> * Added support for USB gadget
>> * in dts(i), replaced interrupt-parent with interrupts-extended
>> * changed the nand partition plan (same as for the sama5d3)
>> * removed 'mem' parameter in command line
>> * re-ordered dt-nodes in ascending address order.
>> * split the lcd support patch in 2 parts (SOC and board)
>>
>>
>> Change since V1:
>> * changed the DT representation to use address translation and separate the
>> timings' configuration from the device properties by adding a "simple-bus"
>> inetrmediate node.
>> * moved the smc driver from drivers/bus to drivers/memmory
>> * smc driver now accepts timings in nanoseconds as well as raw register values
>> * smc driver can clip the timings if they're out of bound and dump them to the
>> console
>> * DM9000 timings are now described in nanosecs (for the virtue of example)
>>
>> supported features are:
>> * working with the Common Clock Framework and the old at91 clock implementation
>> * dbgu
>> * lcdc
>> * usb host
>> * usb gadget,
>> * spi dataflash
>> * nand flash
>> * touchscreen
>> * leds
>> * user buttons
>>
>> In the TODO list:
>> * dm9000 (ethernet)
>> * audio
>> * mmc
>
>
> Besides the my comment on the 1st patch, all this series
> seems pretty neat for me.
thanks
>
> It's worth mentioning also that audio and mmc are in the
> TODO list by lack of hardware to test it. So what I suggest
actually the audio hardware is present but seems broken on my board.
Hopefully I should get another one to test this week.
> here is to send a follow-up patch set and to ask for a
> Tested-By from people being able to test it.
>
> For dm9000 the issue is (again) related to an ordering problem:
> the Ethernet need an interrupt provided by the gpio driver. Unfortunately,
> the gpio driver initialization is called after the dm900 driver
> initialization.
>
> Thanks,
>
> Gregory
>
>
>
>>
>> This serie relies on the following patchs:
>> usb: at91-udc: fix irq and iomem resource retrieval
>> ARM: at91: prepare sam9 dt boards transition to common
>>
>> Jean-Jacques
>>
>> Jean-Jacques Hiblot (8):
>> at91: dt: Adds support for the bus matrix declaration in the DT
>> at91: pinctrl: don't request GPIOs used for interrupts but lock them
>> as IRQ
>> at91: dt: Add at91sam9261 dt SoC support
>> at91: dt: defconfig: Added the sam9261 to the list of DT-enabled SOCs
>> at91: dt: sam9261: Device Tree support for the at91sam9261ek
>> at91: updated the at91_dt_defconfig with support for the ADS7846
>> ARM: at91: prepare common clk transition for sam9261 SoC
>> ARM: at91: move sam9261 SoC to common clk
>>
>> arch/arm/boot/dts/Makefile | 2 +
>> arch/arm/boot/dts/at91sam9261.dtsi | 740 ++++++++++++++++++++++++++++++++++++
>> arch/arm/boot/dts/at91sam9261ek.dts | 204 ++++++++++
>> arch/arm/configs/at91_dt_defconfig | 2 +
>> arch/arm/mach-at91/Kconfig | 1 -
>> arch/arm/mach-at91/at91sam9261.c | 25 +-
>> arch/arm/mach-at91/setup.c | 23 ++
>> drivers/pinctrl/pinctrl-at91.c | 5 +-
>> 8 files changed, 996 insertions(+), 6 deletions(-)
>> create mode 100644 arch/arm/boot/dts/at91sam9261.dtsi
>> create mode 100644 arch/arm/boot/dts/at91sam9261ek.dts
>>
>
>
> --
> Gregory Clement, Free Electrons
> Kernel, drivers, real-time and embedded Linux
> development, consulting, training and support.
> http://free-electrons.com
Thomas,
I wasn't very informative indeed.
The dm9000 is instantiated from the DT, its irq is described as <&pioC
2 IRQ_TYPE_EDGE_BOTH>
The problem, as I see it, is that at the time the IRQ description is
translated the irq domain doesn't exist yet and the translation fails.
The result is that the ressource of the platform driver do not contain
any information about an IRQ.
The irq domain is added later when the gpio driver is probed
(pinctrl-at91.c:1684).
A bit later the dm9000 gets probed and fails lamely because it can't
find an IRQ ressource.
Jean-Jacques
2014-02-12 13:44 GMT+01:00 Thomas Petazzoni
<[email protected]>:
> Dear Jean-Jacques Hiblot,
>
> On Wed, 12 Feb 2014 13:36:08 +0100, Jean-Jacques Hiblot wrote:
>
>> >> For dm9000 the issue is (again) related to an ordering problem:
>> >> the Ethernet need an interrupt provided by the gpio driver. Unfortunately,
>> >> the gpio driver initialization is called after the dm900 driver
>> >> initialization.
>> >
>> > And -EPROBE_DEFER doesn't solve this problem?
>> not really the problem happens before the driver is actually probed
>> when the ressource for the platform driver are filled
>
> Sorry, I don't have all the context. If I understand correctly what you
> mean, the GPIO driver is probed through the DT, but the DM9000 driver
> is probed in a legacy way from the board file, and you have the case
> where the DM9000 platform_device gets registered before the GPIOs are
> actually available? In this case, what about having the
> of_platform_populate() call *before* the platform_device_register() for
> your DM9000 ? Again, I don't have all the context, so I might very well
> be getting the situation incorrectly.
>
> Of course, ideally, the DM9000 driver should be probed using the DT,
> but I guess this needs the SMC DT binding that is still being
> discussed, if I followed correctly.
>
> Thomas
> --
> Thomas Petazzoni, CTO, Free Electrons
> Embedded Linux, Kernel and Android engineering
> http://free-electrons.com
Hi,
On 12/02/2014 at 11:06:42 +0100, Jean-Jacques Hiblot wrote :
> This patch adds support for the Device Tree on a sam9261-based platform
>
> Signed-off-by: Jean-Jacques Hiblot <[email protected]>
> ---
> arch/arm/boot/dts/at91sam9261.dtsi | 740 +++++++++++++++++++++++++++++++++++++
> arch/arm/mach-at91/at91sam9261.c | 17 +
> 2 files changed, 757 insertions(+)
> create mode 100644 arch/arm/boot/dts/at91sam9261.dtsi
[...]
> +
> + apb {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + tcb0: timer@fffa0000 {
> + compatible = "atmel,at91rm9200-tcb";
> + reg = <0xfffa0000 0x100>;
> + interrupts = < 17 IRQ_TYPE_LEVEL_HIGH 0
> + 18 IRQ_TYPE_LEVEL_HIGH 0
> + 19 IRQ_TYPE_LEVEL_HIGH 0
> + >;
> + clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
> + clock-names = "t0_clk", "t1_clk", "t2_clk";
> + };
> +
> + usb1: gadget@fffa4000 {
> + compatible = "atmel,at91rm9200-udc";
> + reg = <0xfffa4000 0x4000>;
> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
> + clocks = <&usb>, <&udc_clk>, <&udpck>;
> + clock-names = "usb_clk", "udc_clk", "udpck";
> + status = "disabled";
> + };
> +
> + mmc0: mmc@fffa8000 {
> + compatible = "atmel,hsmci";
> + reg = <0xfffa8000 0x600>;
> + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&mci0_clk>;
> + clock-names = "mci_clk";
> + status = "disabled";
> + };
> +
> + i2c0: i2c@fffac000 {
> + compatible = "atmel,at91sam9261-i2c";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c_twi>;
> + reg = <0xfffac000 0x100>;
> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&twi0_clk>;
> + status = "disabled";
> + };
> +
> + usart0: serial@fffb0000 {
> + compatible = "atmel,at91sam9260-usart";
> + reg = <0xfffb0000 0x200>;
> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usart0>;
> + clocks = <&usart0_clk>;
> + clock-names = "usart";
> + status = "disabled";
> + };
> +
> + usart1: serial@fffb4000 {
> + compatible = "atmel,at91sam9260-usart";
> + reg = <0xfffb4000 0x200>;
> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usart1>;
> + clocks = <&usart1_clk>;
> + clock-names = "usart";
> + status = "disabled";
> + };
> +
> + usart2: serial@fffb8000{
> + compatible = "atmel,at91sam9260-usart";
> + reg = <0xfffb8000 0x200>;
> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usart2>;
> + clocks = <&usart2_clk>;
> + clock-names = "usart";
> + status = "disabled";
> + };
> +
> + ssc0: ssc@fffbc000 {
> + compatible = "atmel,at91rm9200-ssc";
> + reg = <0xfffbc000 0x4000>;
> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
> + status = "disabled";
> + };
> +
> + ssc1: ssc@fffc0000 {
> + compatible = "atmel,at91rm9200-ssc";
> + reg = <0xfffc0000 0x4000>;
> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
> + status = "disabled";
> + };
> +
> + spi0: spi@fffc8000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91rm9200-spi";
> + reg = <0xfffc8000 0x200>;
> + cs-gpios = <0>, <0>, <0>, <0>;
> + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_spi0>;
> + clocks = <&spi0_clk>;
> + clock-names = "spi_clk";
> + status = "disabled";
> + };
> +
> + spi1: spi@fffcc000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91rm9200-spi";
> + reg = <0xfffcc000 0x200>;
> + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_spi1>;
> + clocks = <&spi1_clk>;
> + clock-names = "spi_clk";
> + status = "disabled";
> + };
> +
> + ramc: ramc@ffffea00 {
> + compatible = "atmel,at91sam9260-sdramc";
> + reg = <0xffffea00 0x200>;
> + };
> +
You probably copied/pasted it but according to the block diagram, the
sdram controller is not under the apb.
> + matrix: matrix@ffffee00 {
> + compatible = "atmel,at91sam9261-bus-matrix";
> + reg = <0xffffee00 0x200>;
> + };
> +
Same here, the apb is actually under the bus matrix.
I don't know whether it can be represented another way though.
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
On 12/02/2014 11:06, Jean-Jacques Hiblot :
> During the xlate stage of the DT interrupt parsing, the at91 pinctrl driver
> requests the GPIOs that are described as interrupt sources. This prevents a
> driver to request the gpio later to get its electrical value.
> This patch replaces the gpio_request with a gpio_lock_as_irq to prevent the
> gpio to be set as an ouput while allowing a subsequent gpio_request to succeed
>
> Signed-off-by: Jean-Jacques Hiblot <[email protected]>
Acked-by: Nicolas Ferre <[email protected]>
But I suspect it may go through another patch: the pinctrl one: add
Linux W. to the recipient list please.
Thanks,
> ---
> drivers/pinctrl/pinctrl-at91.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
> index d990e33..db55b96 100644
> --- a/drivers/pinctrl/pinctrl-at91.c
> +++ b/drivers/pinctrl/pinctrl-at91.c
> @@ -1478,18 +1478,17 @@ static int at91_gpio_irq_domain_xlate(struct irq_domain *d,
> {
> struct at91_gpio_chip *at91_gpio = d->host_data;
> int ret;
> - int pin = at91_gpio->chip.base + intspec[0];
>
> if (WARN_ON(intsize < 2))
> return -EINVAL;
> *out_hwirq = intspec[0];
> *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
>
> - ret = gpio_request(pin, ctrlr->full_name);
> + ret = gpio_lock_as_irq(&at91_gpio->chip, intspec[0]);
> if (ret)
> return ret;
>
> - ret = gpio_direction_input(pin);
> + ret = at91_gpio_direction_input(&at91_gpio->chip, intspec[0]);
> if (ret)
> return ret;
>
>
--
Nicolas Ferre
Hi Alexandre,
2014-02-12 18:28 GMT+01:00 Alexandre Belloni
<[email protected]>:
> Hi,
>
> On 12/02/2014 at 11:06:42 +0100, Jean-Jacques Hiblot wrote :
>> This patch adds support for the Device Tree on a sam9261-based platform
>>
>> Signed-off-by: Jean-Jacques Hiblot <[email protected]>
>> ---
>> arch/arm/boot/dts/at91sam9261.dtsi | 740 +++++++++++++++++++++++++++++++++++++
>> arch/arm/mach-at91/at91sam9261.c | 17 +
>> 2 files changed, 757 insertions(+)
>> create mode 100644 arch/arm/boot/dts/at91sam9261.dtsi
>
> [...]
>
>> +
>> + apb {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> +
>> + tcb0: timer@fffa0000 {
>> + compatible = "atmel,at91rm9200-tcb";
>> + reg = <0xfffa0000 0x100>;
>> + interrupts = < 17 IRQ_TYPE_LEVEL_HIGH 0
>> + 18 IRQ_TYPE_LEVEL_HIGH 0
>> + 19 IRQ_TYPE_LEVEL_HIGH 0
>> + >;
>> + clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
>> + clock-names = "t0_clk", "t1_clk", "t2_clk";
>> + };
>> +
>> + usb1: gadget@fffa4000 {
>> + compatible = "atmel,at91rm9200-udc";
>> + reg = <0xfffa4000 0x4000>;
>> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
>> + clocks = <&usb>, <&udc_clk>, <&udpck>;
>> + clock-names = "usb_clk", "udc_clk", "udpck";
>> + status = "disabled";
>> + };
>> +
>> + mmc0: mmc@fffa8000 {
>> + compatible = "atmel,hsmci";
>> + reg = <0xfffa8000 0x600>;
>> + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&mci0_clk>;
>> + clock-names = "mci_clk";
>> + status = "disabled";
>> + };
>> +
>> + i2c0: i2c@fffac000 {
>> + compatible = "atmel,at91sam9261-i2c";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_i2c_twi>;
>> + reg = <0xfffac000 0x100>;
>> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&twi0_clk>;
>> + status = "disabled";
>> + };
>> +
>> + usart0: serial@fffb0000 {
>> + compatible = "atmel,at91sam9260-usart";
>> + reg = <0xfffb0000 0x200>;
>> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_usart0>;
>> + clocks = <&usart0_clk>;
>> + clock-names = "usart";
>> + status = "disabled";
>> + };
>> +
>> + usart1: serial@fffb4000 {
>> + compatible = "atmel,at91sam9260-usart";
>> + reg = <0xfffb4000 0x200>;
>> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_usart1>;
>> + clocks = <&usart1_clk>;
>> + clock-names = "usart";
>> + status = "disabled";
>> + };
>> +
>> + usart2: serial@fffb8000{
>> + compatible = "atmel,at91sam9260-usart";
>> + reg = <0xfffb8000 0x200>;
>> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_usart2>;
>> + clocks = <&usart2_clk>;
>> + clock-names = "usart";
>> + status = "disabled";
>> + };
>> +
>> + ssc0: ssc@fffbc000 {
>> + compatible = "atmel,at91rm9200-ssc";
>> + reg = <0xfffbc000 0x4000>;
>> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
>> + status = "disabled";
>> + };
>> +
>> + ssc1: ssc@fffc0000 {
>> + compatible = "atmel,at91rm9200-ssc";
>> + reg = <0xfffc0000 0x4000>;
>> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
>> + status = "disabled";
>> + };
>> +
>> + spi0: spi@fffc8000 {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + compatible = "atmel,at91rm9200-spi";
>> + reg = <0xfffc8000 0x200>;
>> + cs-gpios = <0>, <0>, <0>, <0>;
>> + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_spi0>;
>> + clocks = <&spi0_clk>;
>> + clock-names = "spi_clk";
>> + status = "disabled";
>> + };
>> +
>> + spi1: spi@fffcc000 {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + compatible = "atmel,at91rm9200-spi";
>> + reg = <0xfffcc000 0x200>;
>> + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_spi1>;
>> + clocks = <&spi1_clk>;
>> + clock-names = "spi_clk";
>> + status = "disabled";
>> + };
>> +
>> + ramc: ramc@ffffea00 {
>> + compatible = "atmel,at91sam9260-sdramc";
>> + reg = <0xffffea00 0x200>;
>> + };
>> +
>
> You probably copied/pasted it but according to the block diagram, the
> sdram controller is not under the apb.
You're right I copied/pasted :o) But the addresses of the registers
look like typical APB addresses.
AFAIK all the registers of this SOC are accessed through the APB
(except for OHCI and LCDC)
So probably the real question here is what is the sense of the bus
hierarchy in cases where a controller is connected to several buses
(APB for registers, AHB/matrix for other purpose) ?
As I don't have any idea on how to handle this, I choose to copy/paste.
>
>> + matrix: matrix@ffffee00 {
>> + compatible = "atmel,at91sam9261-bus-matrix";
>> + reg = <0xffffee00 0x200>;
>> + };
>> +
>
> Same here, the apb is actually under the bus matrix.
>
> I don't know whether it can be represented another way though.
>
>
> --
> Alexandre Belloni, Free Electrons
> Embedded Linux, Kernel and Android engineering
> http://free-electrons.com
Sorry, one more comment on that patch:
On 12/02/2014 at 11:06:42 +0100, Jean-Jacques Hiblot wrote :
> + pinctrl@fffff400 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
> + ranges = <0xfffff400 0xfffff400 0xa00>;
> +
I believe you got the range wrong, shouldn't it be:
ranges = <0xfffff400 0xfffff400 0x600>;
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
2014-02-12 22:04 GMT+01:00 Alexandre Belloni
<[email protected]>:
> Sorry, one more comment on that patch:
>
> On 12/02/2014 at 11:06:42 +0100, Jean-Jacques Hiblot wrote :
>> + pinctrl@fffff400 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
>> + ranges = <0xfffff400 0xfffff400 0xa00>;
>> +
> I believe you got the range wrong, shouldn't it be:
> ranges = <0xfffff400 0xfffff400 0x600>;
>
Yes you're right.
Thanks for the review
>
> --
> Alexandre Belloni, Free Electrons
> Embedded Linux, Kernel and Android engineering
> http://free-electrons.com
On 12/02/2014 20:47, Jean-Jacques Hiblot :
> Hi Alexandre,
>
> 2014-02-12 18:28 GMT+01:00 Alexandre Belloni
> <[email protected]>:
>> Hi,
>>
>> On 12/02/2014 at 11:06:42 +0100, Jean-Jacques Hiblot wrote :
>>> This patch adds support for the Device Tree on a sam9261-based platform
>>>
>>> Signed-off-by: Jean-Jacques Hiblot <[email protected]>
>>> ---
>>> arch/arm/boot/dts/at91sam9261.dtsi | 740 +++++++++++++++++++++++++++++++++++++
>>> arch/arm/mach-at91/at91sam9261.c | 17 +
>>> 2 files changed, 757 insertions(+)
>>> create mode 100644 arch/arm/boot/dts/at91sam9261.dtsi
>>
>> [...]
>>
>>> +
>>> + apb {
>>> + compatible = "simple-bus";
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> + ranges;
>>> +
>>> + tcb0: timer@fffa0000 {
>>> + compatible = "atmel,at91rm9200-tcb";
>>> + reg = <0xfffa0000 0x100>;
>>> + interrupts = < 17 IRQ_TYPE_LEVEL_HIGH 0
>>> + 18 IRQ_TYPE_LEVEL_HIGH 0
>>> + 19 IRQ_TYPE_LEVEL_HIGH 0
>>> + >;
>>> + clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
>>> + clock-names = "t0_clk", "t1_clk", "t2_clk";
>>> + };
>>> +
>>> + usb1: gadget@fffa4000 {
>>> + compatible = "atmel,at91rm9200-udc";
>>> + reg = <0xfffa4000 0x4000>;
>>> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
>>> + clocks = <&usb>, <&udc_clk>, <&udpck>;
>>> + clock-names = "usb_clk", "udc_clk", "udpck";
>>> + status = "disabled";
>>> + };
>>> +
>>> + mmc0: mmc@fffa8000 {
>>> + compatible = "atmel,hsmci";
>>> + reg = <0xfffa8000 0x600>;
>>> + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + clocks = <&mci0_clk>;
>>> + clock-names = "mci_clk";
>>> + status = "disabled";
>>> + };
>>> +
>>> + i2c0: i2c@fffac000 {
>>> + compatible = "atmel,at91sam9261-i2c";
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_i2c_twi>;
>>> + reg = <0xfffac000 0x100>;
>>> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + clocks = <&twi0_clk>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + usart0: serial@fffb0000 {
>>> + compatible = "atmel,at91sam9260-usart";
>>> + reg = <0xfffb0000 0x200>;
>>> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + atmel,use-dma-rx;
>>> + atmel,use-dma-tx;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_usart0>;
>>> + clocks = <&usart0_clk>;
>>> + clock-names = "usart";
>>> + status = "disabled";
>>> + };
>>> +
>>> + usart1: serial@fffb4000 {
>>> + compatible = "atmel,at91sam9260-usart";
>>> + reg = <0xfffb4000 0x200>;
>>> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + atmel,use-dma-rx;
>>> + atmel,use-dma-tx;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_usart1>;
>>> + clocks = <&usart1_clk>;
>>> + clock-names = "usart";
>>> + status = "disabled";
>>> + };
>>> +
>>> + usart2: serial@fffb8000{
>>> + compatible = "atmel,at91sam9260-usart";
>>> + reg = <0xfffb8000 0x200>;
>>> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + atmel,use-dma-rx;
>>> + atmel,use-dma-tx;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_usart2>;
>>> + clocks = <&usart2_clk>;
>>> + clock-names = "usart";
>>> + status = "disabled";
>>> + };
>>> +
>>> + ssc0: ssc@fffbc000 {
>>> + compatible = "atmel,at91rm9200-ssc";
>>> + reg = <0xfffbc000 0x4000>;
>>> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + ssc1: ssc@fffc0000 {
>>> + compatible = "atmel,at91rm9200-ssc";
>>> + reg = <0xfffc0000 0x4000>;
>>> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + spi0: spi@fffc8000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + compatible = "atmel,at91rm9200-spi";
>>> + reg = <0xfffc8000 0x200>;
>>> + cs-gpios = <0>, <0>, <0>, <0>;
>>> + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_spi0>;
>>> + clocks = <&spi0_clk>;
>>> + clock-names = "spi_clk";
>>> + status = "disabled";
>>> + };
>>> +
>>> + spi1: spi@fffcc000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + compatible = "atmel,at91rm9200-spi";
>>> + reg = <0xfffcc000 0x200>;
>>> + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_spi1>;
>>> + clocks = <&spi1_clk>;
>>> + clock-names = "spi_clk";
>>> + status = "disabled";
>>> + };
>>> +
>>> + ramc: ramc@ffffea00 {
>>> + compatible = "atmel,at91sam9260-sdramc";
>>> + reg = <0xffffea00 0x200>;
>>> + };
>>> +
>>
>> You probably copied/pasted it but according to the block diagram, the
>> sdram controller is not under the apb.
> You're right I copied/pasted :o) But the addresses of the registers
> look like typical APB addresses.
> AFAIK all the registers of this SOC are accessed through the APB
> (except for OHCI and LCDC)
Yes, that is the point: if the register bank appears as an APB address,
I place it on the APB bus.
The other master interfaces (on AHB) are the ones that the IP uses, not
us from the CPU point of view...
So I think that Jean-Jacques DT is okay concerning this.
> So probably the real question here is what is the sense of the bus
> hierarchy in cases where a controller is connected to several buses
> (APB for registers, AHB/matrix for other purpose) ?
> As I don't have any idea on how to handle this, I choose to copy/paste.
>
>>
>>> + matrix: matrix@ffffee00 {
>>> + compatible = "atmel,at91sam9261-bus-matrix";
>>> + reg = <0xffffee00 0x200>;
>>> + };
>>> +
>>
>> Same here, the apb is actually under the bus matrix.
>>
>> I don't know whether it can be represented another way though.
>>
>>
>> --
>> Alexandre Belloni, Free Electrons
>> Embedded Linux, Kernel and Android engineering
>> http://free-electrons.com
>
>
--
Nicolas Ferre
On 13/02/2014 at 09:10:54 +0100, Nicolas Ferre wrote :
> On 12/02/2014 20:47, Jean-Jacques Hiblot :
> >>
> >> You probably copied/pasted it but according to the block diagram, the
> >> sdram controller is not under the apb.
> > You're right I copied/pasted :o) But the addresses of the registers
> > look like typical APB addresses.
> > AFAIK all the registers of this SOC are accessed through the APB
> > (except for OHCI and LCDC)
>
> Yes, that is the point: if the register bank appears as an APB address,
> I place it on the APB bus.
> The other master interfaces (on AHB) are the ones that the IP uses, not
> us from the CPU point of view...
>
> So I think that Jean-Jacques DT is okay concerning this.
>
Ok, I'm perfectly fine with that. Thanks for the answer !
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
On Wed, Feb 12, 2014 at 11:06 AM, Jean-Jacques Hiblot
<[email protected]> wrote:
> During the xlate stage of the DT interrupt parsing, the at91 pinctrl driver
> requests the GPIOs that are described as interrupt sources. This prevents a
> driver to request the gpio later to get its electrical value.
> This patch replaces the gpio_request with a gpio_lock_as_irq to prevent the
> gpio to be set as an ouput while allowing a subsequent gpio_request to succeed
>
> Signed-off-by: Jean-Jacques Hiblot <[email protected]>
OK, but is this really correct:
> @@ -1478,18 +1478,17 @@ static int at91_gpio_irq_domain_xlate(struct irq_domain *d,
> {
> struct at91_gpio_chip *at91_gpio = d->host_data;
> int ret;
> - int pin = at91_gpio->chip.base + intspec[0];
>
> if (WARN_ON(intsize < 2))
> return -EINVAL;
> *out_hwirq = intspec[0];
> *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
>
> - ret = gpio_request(pin, ctrlr->full_name);
> + ret = gpio_lock_as_irq(&at91_gpio->chip, intspec[0]);
So when resolving an IRQ resource, we take for granted that it will be used
for IRQs and IRQs only? Is it not possible that this resolution is done
and then the driver using it unloads or whatever and it is still marked
as IRQ?
I don't think the xlate function should have such side effects on
the gpio_chip internal state. I think it should just translate.
The line is locked for IRQ the moment its startup() callback is
called, is it not?
> - ret = gpio_direction_input(pin);
> + ret = at91_gpio_direction_input(&at91_gpio->chip, intspec[0]);
I actually don't like this either. This kind of thing was causing
problems in the OMAP driver like hell.
I think this should be deleted from xlate and at91_gpio_direction_input()
be called from the irqchip's .startup() or even .unmask() function
instead.
Yours,
Linus Walleij
Hi Linus,
2014-02-24 14:25 GMT+01:00 Linus Walleij <[email protected]>:
> On Wed, Feb 12, 2014 at 11:06 AM, Jean-Jacques Hiblot
> <[email protected]> wrote:
>
>> During the xlate stage of the DT interrupt parsing, the at91 pinctrl driver
>> requests the GPIOs that are described as interrupt sources. This prevents a
>> driver to request the gpio later to get its electrical value.
>> This patch replaces the gpio_request with a gpio_lock_as_irq to prevent the
>> gpio to be set as an ouput while allowing a subsequent gpio_request to succeed
>>
>> Signed-off-by: Jean-Jacques Hiblot <[email protected]>
>
> OK, but is this really correct:
>
>> @@ -1478,18 +1478,17 @@ static int at91_gpio_irq_domain_xlate(struct irq_domain *d,
>> {
>> struct at91_gpio_chip *at91_gpio = d->host_data;
>> int ret;
>> - int pin = at91_gpio->chip.base + intspec[0];
>>
>> if (WARN_ON(intsize < 2))
>> return -EINVAL;
>> *out_hwirq = intspec[0];
>> *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
>>
>> - ret = gpio_request(pin, ctrlr->full_name);
>> + ret = gpio_lock_as_irq(&at91_gpio->chip, intspec[0]);
>
> So when resolving an IRQ resource, we take for granted that it will be used
> for IRQs and IRQs only? Is it not possible that this resolution is done
> and then the driver using it unloads or whatever and it is still marked
> as IRQ?
No, once it's reserved for irq, it'll be for irq only.
>
> I don't think the xlate function should have such side effects on
> the gpio_chip internal state. I think it should just translate.
I agree but I choose to only replace the gpio_request by a
lock_as_irq(), not rework the whole thing. It seemed it would have
more chance to be accepted this way. IMO the right time to do this is
at the time of the request_irq()
>
> The line is locked for IRQ the moment its startup() callback is
> called, is it not?
>
>> - ret = gpio_direction_input(pin);
>> + ret = at91_gpio_direction_input(&at91_gpio->chip, intspec[0]);
>
> I actually don't like this either. This kind of thing was causing
> problems in the OMAP driver like hell.
But calling gpio_direction_input() defeats the purpose of removing the
gpio_request() because it ensures that the gpio is requested.
>
> I think this should be deleted from xlate and at91_gpio_direction_input()
> be called from the irqchip's .startup() or even .unmask() function
> instead.
irq_startup and irq_shutdown seem the right place for this because
they're called when requesting and freeing the interrupt. It'll
require a change to __setup_irq() though to check the return value of
irq_startup.
Jean-Jacques
>
> Yours,
> Linus Walleij
2014-02-25 10:35 GMT+01:00 Jean-Jacques Hiblot <[email protected]>:
> Hi Linus,
>
> 2014-02-24 14:25 GMT+01:00 Linus Walleij <[email protected]>:
>> On Wed, Feb 12, 2014 at 11:06 AM, Jean-Jacques Hiblot
>> <[email protected]> wrote:
>>
>>> During the xlate stage of the DT interrupt parsing, the at91 pinctrl driver
>>> requests the GPIOs that are described as interrupt sources. This prevents a
>>> driver to request the gpio later to get its electrical value.
>>> This patch replaces the gpio_request with a gpio_lock_as_irq to prevent the
>>> gpio to be set as an ouput while allowing a subsequent gpio_request to succeed
>>>
>>> Signed-off-by: Jean-Jacques Hiblot <[email protected]>
>>
>> OK, but is this really correct:
>>
>>> @@ -1478,18 +1478,17 @@ static int at91_gpio_irq_domain_xlate(struct irq_domain *d,
>>> {
>>> struct at91_gpio_chip *at91_gpio = d->host_data;
>>> int ret;
>>> - int pin = at91_gpio->chip.base + intspec[0];
>>>
>>> if (WARN_ON(intsize < 2))
>>> return -EINVAL;
>>> *out_hwirq = intspec[0];
>>> *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
>>>
>>> - ret = gpio_request(pin, ctrlr->full_name);
>>> + ret = gpio_lock_as_irq(&at91_gpio->chip, intspec[0]);
>>
>> So when resolving an IRQ resource, we take for granted that it will be used
>> for IRQs and IRQs only? Is it not possible that this resolution is done
>> and then the driver using it unloads or whatever and it is still marked
>> as IRQ?
> No, once it's reserved for irq, it'll be for irq only.
>>
>> I don't think the xlate function should have such side effects on
>> the gpio_chip internal state. I think it should just translate.
>
> I agree but I choose to only replace the gpio_request by a
> lock_as_irq(), not rework the whole thing. It seemed it would have
> more chance to be accepted this way. IMO the right time to do this is
> at the time of the request_irq()
>>
>> The line is locked for IRQ the moment its startup() callback is
>> called, is it not?
>>
>>> - ret = gpio_direction_input(pin);
>>> + ret = at91_gpio_direction_input(&at91_gpio->chip, intspec[0]);
>>
>> I actually don't like this either. This kind of thing was causing
>> problems in the OMAP driver like hell.
> But calling gpio_direction_input() defeats the purpose of removing the
> gpio_request() because it ensures that the gpio is requested.
>>
>> I think this should be deleted from xlate and at91_gpio_direction_input()
>> be called from the irqchip's .startup() or even .unmask() function
>> instead.
> irq_startup and irq_shutdown seem the right place for this because
> they're called when requesting and freeing the interrupt. It'll
> require a change to __setup_irq() though to check the return value of
> irq_startup.
Linux,
Sorry, for the noise. You can forget this proposed patch and my
previous email. I just saw that the patch where this was done in
startup and shutdown was applied. I thought it had been rejected . I'm
sorry for the confusion.
Jean-Jacques
>>
>> Yours,
>> Linus Walleij