2014-06-15 05:54:46

by Vince Weaver

Subject: [PATCH 0/6] perf: Use common PMU interrupt disabled code on all architectures

Now that "perf/x86: Use common PMU interrupt disabled code"
(c184c980de30dc) was merged, I went and audited all of the
architectures. The following patchset attempts to move
all of the ones that have code disabling sampled events
due to lack of overflow interrupt to the new common code.

ARM and x86 were already updated with the original changeset.

Note that this is an ABI change in some cases, as many
architectures returned EINVAL previously rather than
EOPNOTSUPP.

Unfortunately these patches are not tested at all, as I don't have
access to the hardware.

2014-06-15 06:54:30

by Ingo Molnar

Subject: Re: [PATCH 0/6] perf: Use common PMU interrupt disabled code on all architectures

* Vince Weaver <[email protected]> wrote:

>
> Now that "perf/x86: Use common PMU interrupt disabled code"
> (c184c980de30dc) was merged, I went and audited all of the
> architectures. The following patchset attempts to move
> all of the ones that have code disabling sampled events
> due to lack of overflow interrupt to the new common code.
>
> ARM and x86 were already updated with the original changeset.
>
> Note that this is an ABI change in some cases, as many
> architectures returned EINVAL previously rather than
> EOPNOTSUPP.
>
> Unfortunately these patches are not tested at all, as I don't have
> access to the hardware.

Looks good to me, for v3.17. Peter, what do you think?

Reviewed-by: Ingo Molnar <[email protected]>

Thanks,

Ingo