This series adds the support for ChipIdea USB2 (ci13xxx) controllers,
the USB PHYs of the Marvell Berlin SoCs and also adds a reset
controller for these SoCs.
The reset controller is used by the PHY driver and shares the
existing chip controller node with the clocks and one pin controller.
The Marvell Berlin USB controllers are host only on the BG2Q and are
compatible with USB ChipIdea. We here add a glue to use the available
common functions for this kind of controllers, and add a generic USB2
ChipIdea driver. A PHY driver is also added to control the USB PHY.
This series applies on top of the generic PHY support in the USB
framework[1].
Patches 1-4 should already have been taken by Sebastian.
Changes since v6:
- removed ci_hdrc_usb2_dt_probe
- fixed a bug in the ChipIdea core for PHY handling
- called unconditionally dma_set_mask_and_coherent()
Changes since v5:
- added a missing header in ci_hdrc_usb2
Changes since v4:
- fixed the error handling of ci_hdrc_usb2_probe()
Changes since v3:
- removed the DMA mask property
- moved the clock handling in the common probe function
- fixed the documentation for the USB2 ChipIdea USB PHY binding
- made sure the reset bit is 0-31 in the reset driver
Changes since v2:
- moved the PHY driver to the generic PHY framework
- changed the compatible to 'chipidea,usb2'
- added a property to set the DMA mask in the USB2 CI driver
- separated dt specific calls in the CI probing function
- rebased on top of the generic PHY support for CI[1]
Changes since v1:
- made the Berlin CI USB driver a generic one
- added support to custom offset for the reset register
- added fixed regulators to support supply the VBUS
- modified the PHY driver to support the one one the BG2CD as
well
- documented the reset properties
- added bindings for the BG2CD
- cosmetic fixes
[1] git://git.free-electrons.com:users/antoine-tenart/linux.git usb-phy
Antoine Tenart (11):
reset: add the Berlin reset controller driver
Documentation: bindings: add reset bindings docs for Marvell Berlin
SoCs
ARM: Berlin: select the reset controller
ARM: dts: berlin: add a required reset property in the chip controller
node
phy: add the Berlin USB PHY driver
Documentation: bindings: add doc for the Berlin USB PHY
usb: chipidea: fix phy handling
usb: chipidea: add a usb2 driver for ci13xxx
Documentation: bindings: add doc for the USB2 ChipIdea USB driver
ARM: dts: berlin: add BG2Q nodes for USB support
ARM: dts: Berlin: enable USB on the BG2Q DMP
Sebastian Hesselbarth (2):
ARM: dts: berlin: add BG2CD nodes for USB support
ARM: dts: berlin: enable USB on the Google Chromecast
.../devicetree/bindings/arm/marvell,berlin.txt | 10 +
.../devicetree/bindings/phy/berlin-usb-phy.txt | 16 ++
.../devicetree/bindings/usb/ci-hdrc-usb2.txt | 24 +++
arch/arm/boot/dts/berlin2.dtsi | 1 +
arch/arm/boot/dts/berlin2cd-google-chromecast.dts | 4 +
arch/arm/boot/dts/berlin2cd.dtsi | 37 ++++
arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 53 +++++
arch/arm/boot/dts/berlin2q.dtsi | 56 ++++++
arch/arm/mach-berlin/Kconfig | 2 +
drivers/phy/Kconfig | 7 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-berlin-usb.c | 224 +++++++++++++++++++++
drivers/reset/Makefile | 1 +
drivers/reset/reset-berlin.c | 131 ++++++++++++
drivers/usb/chipidea/Makefile | 1 +
drivers/usb/chipidea/ci_hdrc_usb2.c | 117 +++++++++++
drivers/usb/chipidea/core.c | 4 +-
17 files changed, 687 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/phy/berlin-usb-phy.txt
create mode 100644 Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
create mode 100644 drivers/phy/phy-berlin-usb.c
create mode 100644 drivers/reset/reset-berlin.c
create mode 100644 drivers/usb/chipidea/ci_hdrc_usb2.c
--
2.1.0
Add a reset controller for Marvell Berlin SoCs which is used by the
USB PHYs drivers (for now).
Signed-off-by: Antoine Tenart <[email protected]>
Signed-off-by: Sebastian Hesselbarth <[email protected]>
Acked-by: Philipp Zabel <[email protected]>
---
drivers/reset/Makefile | 1 +
drivers/reset/reset-berlin.c | 131 +++++++++++++++++++++++++++++++++++++++++++
2 files changed, 132 insertions(+)
create mode 100644 drivers/reset/reset-berlin.c
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 60fed3d7820b..157d421f755b 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -1,4 +1,5 @@
obj-$(CONFIG_RESET_CONTROLLER) += core.o
obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o
+obj-$(CONFIG_ARCH_BERLIN) += reset-berlin.o
obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o
obj-$(CONFIG_ARCH_STI) += sti/
diff --git a/drivers/reset/reset-berlin.c b/drivers/reset/reset-berlin.c
new file mode 100644
index 000000000000..f8b48a13cf0b
--- /dev/null
+++ b/drivers/reset/reset-berlin.c
@@ -0,0 +1,131 @@
+/*
+ * Copyright (C) 2014 Marvell Technology Group Ltd.
+ *
+ * Antoine Tenart <[email protected]>
+ * Sebastian Hesselbarth <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+
+#define BERLIN_MAX_RESETS 32
+
+#define to_berlin_reset_priv(p) \
+ container_of((p), struct berlin_reset_priv, rcdev)
+
+struct berlin_reset_priv {
+ void __iomem *base;
+ unsigned int size;
+ struct reset_controller_dev rcdev;
+};
+
+static int berlin_reset_reset(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ struct berlin_reset_priv *priv = to_berlin_reset_priv(rcdev);
+ int offset = id >> 8;
+ int mask = BIT(id & 0x1f);
+
+ writel(mask, priv->base + offset);
+
+ /* let the reset be effective */
+ udelay(10);
+
+ return 0;
+}
+
+static struct reset_control_ops berlin_reset_ops = {
+ .reset = berlin_reset_reset,
+};
+
+static int berlin_reset_xlate(struct reset_controller_dev *rcdev,
+ const struct of_phandle_args *reset_spec)
+{
+ struct berlin_reset_priv *priv = to_berlin_reset_priv(rcdev);
+ unsigned offset, bit;
+
+ if (WARN_ON(reset_spec->args_count != rcdev->of_reset_n_cells))
+ return -EINVAL;
+
+ offset = reset_spec->args[0];
+ bit = reset_spec->args[1];
+
+ if (offset >= priv->size)
+ return -EINVAL;
+
+ if (bit >= BERLIN_MAX_RESETS)
+ return -EINVAL;
+
+ return (offset << 8) | bit;
+}
+
+static int __berlin_reset_init(struct device_node *np)
+{
+ struct berlin_reset_priv *priv;
+ struct resource res;
+ resource_size_t size;
+ int ret;
+
+ priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ ret = of_address_to_resource(np, 0, &res);
+ if (ret)
+ goto err;
+
+ size = resource_size(&res);
+ priv->base = ioremap(res.start, size);
+ if (!priv->base) {
+ ret = -ENOMEM;
+ goto err;
+ }
+ priv->size = size;
+
+ priv->rcdev.owner = THIS_MODULE;
+ priv->rcdev.ops = &berlin_reset_ops;
+ priv->rcdev.of_node = np;
+ priv->rcdev.of_reset_n_cells = 2;
+ priv->rcdev.of_xlate = berlin_reset_xlate;
+
+ reset_controller_register(&priv->rcdev);
+
+ return 0;
+
+err:
+ kfree(priv);
+ return ret;
+}
+
+static const struct of_device_id berlin_reset_of_match[] __initconst = {
+ { .compatible = "marvell,berlin2-chip-ctrl" },
+ { .compatible = "marvell,berlin2cd-chip-ctrl" },
+ { .compatible = "marvell,berlin2q-chip-ctrl" },
+ { },
+};
+
+static int __init berlin_reset_init(void)
+{
+ struct device_node *np;
+ int ret;
+
+ for_each_matching_node(np, berlin_reset_of_match) {
+ ret = __berlin_reset_init(np);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+arch_initcall(berlin_reset_init);
--
2.1.0
Add the reset binding documentation to the SoC binding documentation as
the reset driver in Marvell Berlin SoC is part of the chip/system
control registers. This patch adds the required properties to configure
the reset controller.
Signed-off-by: Antoine Tenart <[email protected]>
Acked-by: Philipp Zabel <[email protected]>
---
Documentation/devicetree/bindings/arm/marvell,berlin.txt | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/marvell,berlin.txt b/Documentation/devicetree/bindings/arm/marvell,berlin.txt
index 904de5781f44..a99eb9eb14c0 100644
--- a/Documentation/devicetree/bindings/arm/marvell,berlin.txt
+++ b/Documentation/devicetree/bindings/arm/marvell,berlin.txt
@@ -106,11 +106,21 @@ Required subnode-properties:
- groups: a list of strings describing the group names.
- function: a string describing the function used to mux the groups.
+* Reset controller binding
+
+A reset controller is part of the chip control registers set. The chip control
+node also provides the reset. The register set is not at the same offset between
+Berlin SoCs.
+
+Required property:
+- #reset-cells: must be set to 2
+
Example:
chip: chip-control@ea0000 {
compatible = "marvell,berlin2-chip-ctrl";
#clock-cells = <1>;
+ #reset-cells = <2>;
reg = <0xea0000 0x400>;
clocks = <&refclk>, <&externaldev 0>;
clock-names = "refclk", "video_ext0";
--
2.1.0
Document the bindings of the Marvell Berlin USB PHY driver.
Signed-off-by: Antoine Tenart <[email protected]>
---
Documentation/devicetree/bindings/phy/berlin-usb-phy.txt | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/berlin-usb-phy.txt
diff --git a/Documentation/devicetree/bindings/phy/berlin-usb-phy.txt b/Documentation/devicetree/bindings/phy/berlin-usb-phy.txt
new file mode 100644
index 000000000000..be33780f668e
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/berlin-usb-phy.txt
@@ -0,0 +1,16 @@
+* Marvell Berlin USB PHY
+
+Required properties:
+- compatible: "marvell,berlin2-usb-phy" or "marvell,berlin2cd-usb-phy"
+- reg: base address and length of the registers
+- #phys-cells: should be 0
+- resets: reference to the reset controller
+
+Example:
+
+ usb-phy@f774000 {
+ compatible = "marvell,berlin2-usb-phy";
+ reg = <0xf774000 0x128>;
+ #phy-cells = <0>;
+ resets = <&chip 0x104 14>;
+ };
--
2.1.0
Enable the 2 available USB PHY and USB nodes on the Marvell Berlin BG2Q
DMP.
Signed-off-by: Antoine Tenart <[email protected]>
---
arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 53 ++++++++++++++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
index ea1f99b8eed6..f7c25580e122 100644
--- a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
+++ b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
@@ -7,6 +7,8 @@
*/
/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
#include "berlin2q.dtsi"
/ {
@@ -21,6 +23,39 @@
choosen {
bootargs = "console=ttyS0,115200 earlyprintk";
};
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg_usb0_vbus: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "usb0_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&portb 8 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_usb1_vbus: regulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "usb1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&portb 10 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_usb2_vbus: regulator@2 {
+ compatible = "regulator-fixed";
+ regulator-name = "usb2_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&portb 12 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+ };
};
&sdhci1 {
@@ -46,6 +81,24 @@
status = "okay";
};
+&usb_phy0 {
+ status = "okay";
+};
+
+&usb_phy2 {
+ status = "okay";
+};
+
+&usb0 {
+ vbus-supply = <®_usb0_vbus>;
+ status = "okay";
+};
+
+&usb2 {
+ vbus-supply = <®_usb2_vbus>;
+ status = "okay";
+};
+
ð0 {
status = "okay";
};
--
2.1.0
From: Sebastian Hesselbarth <[email protected]>
Enable usb1 on Google Chromecast which is connected to micro-USB
plug used for external power supply, too.
Signed-off-by: Sebastian Hesselbarth <[email protected]>
Signed-off-by: Antoine Tenart <[email protected]>
---
arch/arm/boot/dts/berlin2cd-google-chromecast.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/berlin2cd-google-chromecast.dts b/arch/arm/boot/dts/berlin2cd-google-chromecast.dts
index bcd81ffc495d..5c42c3bfb613 100644
--- a/arch/arm/boot/dts/berlin2cd-google-chromecast.dts
+++ b/arch/arm/boot/dts/berlin2cd-google-chromecast.dts
@@ -27,3 +27,7 @@
};
&uart0 { status = "okay"; };
+
+&usb_phy1 { status = "okay"; };
+
+&usb1 { status = "okay"; };
--
2.1.0
From: Sebastian Hesselbarth <[email protected]>
Adds nodes describing the Marvell Berlin BG2CD USB PHY and USB. The BG2CD
SoC has 2 USB ChipIdea controllers, with usb0 host-only and usb1 dual-role
capable.
Signed-off-by: Sebastian Hesselbarth <[email protected]>
Signed-off-by: Antoine Tenart <[email protected]>
---
arch/arm/boot/dts/berlin2cd.dtsi | 36 ++++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi
index 68f7032b4686..af5e628547ce 100644
--- a/arch/arm/boot/dts/berlin2cd.dtsi
+++ b/arch/arm/boot/dts/berlin2cd.dtsi
@@ -66,6 +66,22 @@
clocks = <&chip CLKID_TWD>;
};
+ usb_phy0: usb-phy@b74000 {
+ compatible = "marvell,berlin2cd-usb-phy";
+ reg = <0xb74000 0x128>;
+ #phy-cells = <0>;
+ resets = <&chip 0x178 23>;
+ status = "disabled";
+ };
+
+ usb_phy1: usb-phy@b78000 {
+ compatible = "marvell,berlin2cd-usb-phy";
+ reg = <0xb78000 0x128>;
+ #phy-cells = <0>;
+ resets = <&chip 0x178 24>;
+ status = "disabled";
+ };
+
apb@e80000 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -242,6 +258,26 @@
};
};
+ usb0: usb@ed0000 {
+ compatible = "chipidea,usb2";
+ reg = <0xed0000 0x200>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&chip CLKID_USB0>;
+ phys = <&usb_phy0>;
+ phy-names = "usb-phy";
+ status = "disabled";
+ };
+
+ usb1: usb@ee0000 {
+ compatible = "chipidea,usb2";
+ reg = <0xee0000 0x200>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&chip CLKID_USB1>;
+ phys = <&usb_phy1>;
+ phy-names = "usb-phy";
+ status = "disabled";
+ };
+
apb@fc0000 {
compatible = "simple-bus";
#address-cells = <1>;
--
2.1.0
Add a USB2 ChipIdea driver for ci13xxx, with optional PHY, clock
and DMA mask, to support USB2 ChipIdea controllers that don't need
specific functions.
Tested on the Marvell Berlin SoCs USB controllers.
Signed-off-by: Antoine Tenart <[email protected]>
---
drivers/usb/chipidea/Makefile | 1 +
drivers/usb/chipidea/ci_hdrc_usb2.c | 117 ++++++++++++++++++++++++++++++++++++
2 files changed, 118 insertions(+)
create mode 100644 drivers/usb/chipidea/ci_hdrc_usb2.c
diff --git a/drivers/usb/chipidea/Makefile b/drivers/usb/chipidea/Makefile
index 2f099c7df7b5..1fc86a2ca22d 100644
--- a/drivers/usb/chipidea/Makefile
+++ b/drivers/usb/chipidea/Makefile
@@ -10,6 +10,7 @@ ci_hdrc-$(CONFIG_USB_OTG_FSM) += otg_fsm.o
# Glue/Bridge layers go here
+obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc_usb2.o
obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc_msm.o
obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc_zevio.o
diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c b/drivers/usb/chipidea/ci_hdrc_usb2.c
new file mode 100644
index 000000000000..15a0947483b8
--- /dev/null
+++ b/drivers/usb/chipidea/ci_hdrc_usb2.c
@@ -0,0 +1,117 @@
+/*
+ * Copyright (C) 2014 Marvell Technology Group Ltd.
+ *
+ * Antoine Tenart <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/clk.h>
+#include <linux/dma-mapping.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/phy/phy.h>
+#include <linux/platform_device.h>
+#include <linux/usb/chipidea.h>
+#include <linux/usb/hcd.h>
+#include <linux/usb/ulpi.h>
+
+#include "ci.h"
+
+struct ci_hdrc_usb2_priv {
+ struct platform_device *ci_pdev;
+ struct clk *clk;
+};
+
+static struct ci_hdrc_platform_data ci_default_pdata = {
+ .capoffset = DEF_CAPOFFSET,
+ .flags = CI_HDRC_REQUIRE_TRANSCEIVER |
+ CI_HDRC_DISABLE_STREAMING,
+};
+
+static int ci_hdrc_usb2_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct ci_hdrc_usb2_priv *priv;
+ struct ci_hdrc_platform_data *ci_pdata = dev_get_platdata(&pdev->dev);
+ int ret;
+
+ if (!ci_pdata)
+ ci_pdata = &ci_default_pdata;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->clk = devm_clk_get(dev, NULL);
+ if (!IS_ERR(priv->clk)) {
+ ret = clk_prepare_enable(priv->clk);
+ if (ret) {
+ dev_err(dev, "failed to enable the clock: %d\n", ret);
+ return ret;
+ }
+ }
+
+ ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
+ if (ret)
+ goto clk_err;
+
+ ci_pdata->name = dev_name(&pdev->dev);
+
+ priv->ci_pdev = ci_hdrc_add_device(dev, pdev->resource,
+ pdev->num_resources, ci_pdata);
+ if (IS_ERR(priv->ci_pdev)) {
+ ret = PTR_ERR(priv->ci_pdev);
+ if (ret != -EPROBE_DEFER)
+ dev_err(dev,
+ "failed to register ci_hdrc platform device: %d\n",
+ ret);
+ goto clk_err;
+ }
+
+ platform_set_drvdata(pdev, priv);
+
+ pm_runtime_no_callbacks(dev);
+ pm_runtime_enable(dev);
+
+ return 0;
+
+clk_err:
+ if (!IS_ERR(priv->clk))
+ clk_disable_unprepare(priv->clk);
+ return ret;
+}
+
+static int ci_hdrc_usb2_remove(struct platform_device *pdev)
+{
+ struct ci_hdrc_usb2_priv *priv = platform_get_drvdata(pdev);
+
+ pm_runtime_disable(&pdev->dev);
+ ci_hdrc_remove_device(priv->ci_pdev);
+ clk_disable_unprepare(priv->clk);
+
+ return 0;
+}
+
+static const struct of_device_id ci_hdrc_usb2_of_match[] = {
+ { .compatible = "chipidea,usb2" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, ci_hdrc_usb2_of_match);
+
+static struct platform_driver ci_hdrc_usb2_driver = {
+ .probe = ci_hdrc_usb2_probe,
+ .remove = ci_hdrc_usb2_remove,
+ .driver = {
+ .name = "chipidea-usb2",
+ .owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(ci_hdrc_usb2_of_match),
+ },
+};
+module_platform_driver(ci_hdrc_usb2_driver);
+
+MODULE_DESCRIPTION("ChipIdea HDRC USB2 binding for ci13xxx");
+MODULE_AUTHOR("Antoine Tenart <[email protected]>");
+MODULE_LICENSE("GPL");
--
2.1.0
Document the USB2 ChipIdea driver (ci13xxx) bindings.
Signed-off-by: Antoine Tenart <[email protected]>
---
.../devicetree/bindings/usb/ci-hdrc-usb2.txt | 24 ++++++++++++++++++++++
1 file changed, 24 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
new file mode 100644
index 000000000000..27f8b1e5ee46
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
@@ -0,0 +1,24 @@
+* USB2 ChipIdea USB controller for ci13xxx
+
+Required properties:
+- compatible: should be "chipidea,usb2"
+- reg: base address and length of the registers
+- interrupts: interrupt for the USB controller
+
+Optional properties:
+- clocks: reference to the USB clock
+- phys: reference to the USB PHY
+- phy-names: should be "usb-phy"
+- vbus-supply: reference to the VBUS regulator
+
+Example:
+
+ usb@f7ed0000 {
+ compatible = "chipidea,usb2";
+ reg = <0xf7ed0000 0x10000>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&chip CLKID_USB0>;
+ phys = <&usb_phy0>;
+ phy-names = "usb-phy";
+ vbus-supply = <®_usb0_vbus>;
+ };
--
2.1.0
Adds nodes describing the Marvell Berlin BG2Q USB PHY and USB. The BG2Q
SoC has 3 USB host controller, compatible with ChipIdea.
Signed-off-by: Antoine Tenart <[email protected]>
---
arch/arm/boot/dts/berlin2q.dtsi | 55 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 2de8d6f8973c..834142bdfbb1 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -114,6 +114,40 @@
#interrupt-cells = <3>;
};
+ usb_phy2: phy@a2f400 {
+ compatible = "marvell,berlin2-usb-phy";
+ reg = <0xa2f400 0x128>;
+ #phy-cells = <0>;
+ resets = <&chip 0x104 14>;
+ status = "disabled";
+ };
+
+ usb2: usb@a30000 {
+ compatible = "chipidea,usb2";
+ reg = <0xa30000 0x10000>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&chip CLKID_USB2>;
+ phys = <&usb_phy2>;
+ phy-names = "usb-phy";
+ status = "disabled";
+ };
+
+ usb_phy0: phy@b74000 {
+ compatible = "marvell,berlin2-usb-phy";
+ reg = <0xb74000 0x128>;
+ #phy-cells = <0>;
+ resets = <&chip 0x104 12>;
+ status = "disabled";
+ };
+
+ usb_phy1: phy@b78000 {
+ compatible = "marvell,berlin2-usb-phy";
+ reg = <0xb78000 0x128>;
+ #phy-cells = <0>;
+ resets = <&chip 0x104 13>;
+ status = "disabled";
+ };
+
eth0: ethernet@b90000 {
compatible = "marvell,pxa168-eth";
reg = <0xb90000 0x10000>;
@@ -365,6 +399,26 @@
};
};
+ usb0: usb@ed0000 {
+ compatible = "chipidea,usb2";
+ reg = <0xed0000 0x10000>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&chip CLKID_USB0>;
+ phys = <&usb_phy0>;
+ phy-names = "usb-phy";
+ status = "disabled";
+ };
+
+ usb1: usb@ee0000 {
+ compatible = "chipidea,usb2";
+ reg = <0xee0000 0x10000>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&chip CLKID_USB1>;
+ phys = <&usb_phy1>;
+ phy-names = "usb-phy";
+ status = "disabled";
+ };
+
apb@fc0000 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -457,5 +511,6 @@
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
};
};
+
};
};
--
2.1.0
Add the driver driving the Marvell Berlin USB PHY. This allows to
initialize the PHY and to use it from the USB driver later.
Signed-off-by: Antoine Tenart <[email protected]>
---
drivers/phy/Kconfig | 7 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-berlin-usb.c | 224 +++++++++++++++++++++++++++++++++++++++++++
3 files changed, 232 insertions(+)
create mode 100644 drivers/phy/phy-berlin-usb.c
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 2a436e607f99..b6da75f563e7 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -15,6 +15,13 @@ config GENERIC_PHY
phy users can obtain reference to the PHY. All the users of this
framework should select this config.
+config PHY_BERLIN_USB
+ tristate "Marvell Berlin USB PHY Driver"
+ depends on ARCH_BERLIN && HAS_IOMEM && OF
+ select GENERIC_PHY
+ help
+ Enable this to support the USB PHY on Marvell Berlin SoCs.
+
config PHY_BERLIN_SATA
tristate "Marvell Berlin SATA PHY driver"
depends on ARCH_BERLIN && HAS_IOMEM && OF
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index c4590fce082f..6fd1f776fd8d 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -3,6 +3,7 @@
#
obj-$(CONFIG_GENERIC_PHY) += phy-core.o
+obj-$(CONFIG_PHY_BERLIN_USB) += phy-berlin-usb.o
obj-$(CONFIG_PHY_BERLIN_SATA) += phy-berlin-sata.o
obj-$(CONFIG_BCM_KONA_USB2_PHY) += phy-bcm-kona-usb2.o
obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO) += phy-exynos-dp-video.o
diff --git a/drivers/phy/phy-berlin-usb.c b/drivers/phy/phy-berlin-usb.c
new file mode 100644
index 000000000000..f9f13067f50f
--- /dev/null
+++ b/drivers/phy/phy-berlin-usb.c
@@ -0,0 +1,224 @@
+/*
+ * Copyright (C) 2014 Marvell Technology Group Ltd.
+ *
+ * Antoine Tenart <[email protected]>
+ * Jisheng Zhang <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/gpio.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/of_gpio.h>
+#include <linux/phy/phy.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
+
+#define USB_PHY_PLL 0x04
+#define USB_PHY_PLL_CONTROL 0x08
+#define USB_PHY_TX_CTRL0 0x10
+#define USB_PHY_TX_CTRL1 0x14
+#define USB_PHY_TX_CTRL2 0x18
+#define USB_PHY_RX_CTRL 0x20
+#define USB_PHY_ANALOG 0x34
+
+/* USB_PHY_PLL */
+#define CLK_REF_DIV(x) ((x) << 4)
+#define FEEDBACK_CLK_DIV(x) ((x) << 8)
+
+/* USB_PHY_PLL_CONTROL */
+#define CLK_STABLE BIT(0)
+#define PLL_CTRL_PIN BIT(1)
+#define PLL_CTRL_REG BIT(2)
+#define PLL_ON BIT(3)
+#define PHASE_OFF_TOL_125 (0x0 << 5)
+#define PHASE_OFF_TOL_250 BIT(5)
+#define KVC0_CALIB (0x0 << 9)
+#define KVC0_REG_CTRL BIT(9)
+#define KVC0_HIGH (0x0 << 10)
+#define KVC0_LOW (0x3 << 10)
+#define CLK_BLK_EN BIT(13)
+
+/* USB_PHY_TX_CTRL0 */
+#define EXT_HS_RCAL_EN BIT(3)
+#define EXT_FS_RCAL_EN BIT(4)
+#define IMPCAL_VTH_DIV(x) ((x) << 5)
+#define EXT_RS_RCAL_DIV(x) ((x) << 8)
+#define EXT_FS_RCAL_DIV(x) ((x) << 12)
+
+/* USB_PHY_TX_CTRL1 */
+#define TX_VDD15_14 (0x0 << 4)
+#define TX_VDD15_15 BIT(4)
+#define TX_VDD15_16 (0x2 << 4)
+#define TX_VDD15_17 (0x3 << 4)
+#define TX_VDD12_VDD (0x0 << 6)
+#define TX_VDD12_11 BIT(6)
+#define TX_VDD12_12 (0x2 << 6)
+#define TX_VDD12_13 (0x3 << 6)
+#define LOW_VDD_EN BIT(8)
+#define TX_OUT_AMP(x) ((x) << 9)
+
+/* USB_PHY_TX_CTRL2 */
+#define TX_CHAN_CTRL_REG(x) ((x) << 0)
+#define DRV_SLEWRATE(x) ((x) << 4)
+#define IMP_CAL_FS_HS_DLY_0 (0x0 << 6)
+#define IMP_CAL_FS_HS_DLY_1 BIT(6)
+#define IMP_CAL_FS_HS_DLY_2 (0x2 << 6)
+#define IMP_CAL_FS_HS_DLY_3 (0x3 << 6)
+#define FS_DRV_EN_MASK(x) ((x) << 8)
+#define HS_DRV_EN_MASK(x) ((x) << 12)
+
+/* USB_PHY_RX_CTRL */
+#define PHASE_FREEZE_DLY_2_CL (0x0 << 0)
+#define PHASE_FREEZE_DLY_4_CL BIT(0)
+#define ACK_LENGTH_8_CL (0x0 << 2)
+#define ACK_LENGTH_12_CL BIT(2)
+#define ACK_LENGTH_16_CL (0x2 << 2)
+#define ACK_LENGTH_20_CL (0x3 << 2)
+#define SQ_LENGTH_3 (0x0 << 4)
+#define SQ_LENGTH_6 BIT(4)
+#define SQ_LENGTH_9 (0x2 << 4)
+#define SQ_LENGTH_12 (0x3 << 4)
+#define DISCON_THRESHOLD_260 (0x0 << 6)
+#define DISCON_THRESHOLD_270 BIT(6)
+#define DISCON_THRESHOLD_280 (0x2 << 6)
+#define DISCON_THRESHOLD_290 (0x3 << 6)
+#define SQ_THRESHOLD(x) ((x) << 8)
+#define LPF_COEF(x) ((x) << 12)
+#define INTPL_CUR_10 (0x0 << 14)
+#define INTPL_CUR_20 BIT(14)
+#define INTPL_CUR_30 (0x2 << 14)
+#define INTPL_CUR_40 (0x3 << 14)
+
+/* USB_PHY_ANALOG */
+#define ANA_PWR_UP BIT(1)
+#define ANA_PWR_DOWN BIT(2)
+#define V2I_VCO_RATIO(x) ((x) << 7)
+#define R_ROTATE_90 (0x0 << 10)
+#define R_ROTATE_0 BIT(10)
+#define MODE_TEST_EN BIT(11)
+#define ANA_TEST_DC_CTRL(x) ((x) << 12)
+
+#define to_phy_berlin_usb_priv(p) \
+ container_of((p), struct phy_berlin_usb_priv, phy)
+
+static const u32 phy_berlin_pll_dividers[] = {
+ /* Berlin 2 */
+ CLK_REF_DIV(0xc) | FEEDBACK_CLK_DIV(0x54),
+ /* Berlin 2CD */
+ CLK_REF_DIV(0x6) | FEEDBACK_CLK_DIV(0x55),
+};
+
+struct phy_berlin_usb_priv {
+ void __iomem *base;
+ struct phy *phy;
+ struct reset_control *rst_ctrl;
+ u32 pll_divider;
+};
+
+static int phy_berlin_usb_power_on(struct phy *phy)
+{
+ struct phy_berlin_usb_priv *priv = dev_get_drvdata(phy->dev.parent);
+
+ reset_control_reset(priv->rst_ctrl);
+
+ writel(priv->pll_divider,
+ priv->base + USB_PHY_PLL);
+ writel(CLK_STABLE | PLL_CTRL_REG | PHASE_OFF_TOL_250 | KVC0_REG_CTRL |
+ CLK_BLK_EN, priv->base + USB_PHY_PLL_CONTROL);
+ writel(V2I_VCO_RATIO(0x5) | R_ROTATE_0 | ANA_TEST_DC_CTRL(0x5),
+ priv->base + USB_PHY_ANALOG);
+ writel(PHASE_FREEZE_DLY_4_CL | ACK_LENGTH_16_CL | SQ_LENGTH_12 |
+ DISCON_THRESHOLD_260 | SQ_THRESHOLD(0xa) | LPF_COEF(0x2) |
+ INTPL_CUR_30, priv->base + USB_PHY_RX_CTRL);
+
+ writel(TX_VDD12_13 | TX_OUT_AMP(0x3), priv->base + USB_PHY_TX_CTRL1);
+ writel(EXT_HS_RCAL_EN | IMPCAL_VTH_DIV(0x3) | EXT_RS_RCAL_DIV(0x4),
+ priv->base + USB_PHY_TX_CTRL0);
+
+ writel(EXT_HS_RCAL_EN | IMPCAL_VTH_DIV(0x3) | EXT_RS_RCAL_DIV(0x4) |
+ EXT_FS_RCAL_DIV(0x2), priv->base + USB_PHY_TX_CTRL0);
+
+ writel(EXT_HS_RCAL_EN | IMPCAL_VTH_DIV(0x3) | EXT_RS_RCAL_DIV(0x4),
+ priv->base + USB_PHY_TX_CTRL0);
+ writel(TX_CHAN_CTRL_REG(0xf) | DRV_SLEWRATE(0x3) | IMP_CAL_FS_HS_DLY_3 |
+ FS_DRV_EN_MASK(0xd), priv->base + USB_PHY_TX_CTRL2);
+
+ return 0;
+}
+
+static struct phy_ops phy_berlin_usb_ops = {
+ .power_on = phy_berlin_usb_power_on,
+ .owner = THIS_MODULE,
+};
+
+static const struct of_device_id phy_berlin_sata_of_match[] = {
+ {
+ .compatible = "marvell,berlin2-usb-phy",
+ .data = &phy_berlin_pll_dividers[0],
+ },
+ {
+ .compatible = "marvell,berlin2cd-usb-phy",
+ .data = &phy_berlin_pll_dividers[1],
+ },
+ { },
+};
+MODULE_DEVICE_TABLE(of, phy_berlin_sata_of_match);
+
+static int phy_berlin_usb_probe(struct platform_device *pdev)
+{
+ const struct of_device_id *match =
+ of_match_device(phy_berlin_sata_of_match, &pdev->dev);
+ struct phy_berlin_usb_priv *priv;
+ struct resource *res;
+ struct phy_provider *phy_provider;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ priv->base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(priv->base))
+ return PTR_ERR(priv->base);
+
+ priv->rst_ctrl = devm_reset_control_get(&pdev->dev, NULL);
+ if (IS_ERR(priv->rst_ctrl))
+ return PTR_ERR(priv->rst_ctrl);
+
+ priv->pll_divider = *((u32 *)match->data);
+
+ priv->phy = devm_phy_create(&pdev->dev, NULL, &phy_berlin_usb_ops,
+ NULL);
+ if (IS_ERR(priv->phy)) {
+ dev_err(&pdev->dev, "failed to create PHY\n");
+ return PTR_ERR(priv->phy);
+ }
+
+ platform_set_drvdata(pdev, priv);
+
+ phy_provider =
+ devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate);
+ if (IS_ERR(phy_provider))
+ return PTR_ERR(phy_provider);
+
+ return 0;
+}
+
+static struct platform_driver phy_berlin_usb_driver = {
+ .probe = phy_berlin_usb_probe,
+ .driver = {
+ .name = "phy-berlin-usb",
+ .owner = THIS_MODULE,
+ .of_match_table = phy_berlin_sata_of_match,
+ },
+};
+module_platform_driver(phy_berlin_usb_driver);
+
+MODULE_AUTHOR("Antoine Tenart <[email protected]>");
+MODULE_DESCRIPTION("Marvell Berlin PHY driver for USB");
+MODULE_LICENSE("GPL");
--
2.1.0
The generic platform device for CI drivers is probed by calling
ci_hdrc_probe. This is not the same device as the one for the specific
driver, so the of_node isn't the one we're looking into.
This result in not being able to probe the phys. Since all CI driver are
retrieving their phys in the specific code, this didn't impact any of
them yet.
Fixes it using the right of node pointer, by using dev->parent instead
of dev in phy get functions.
Signed-off-by: Antoine Tenart <[email protected]>
---
drivers/usb/chipidea/core.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index ba0ac2723098..36318c85ad65 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -654,8 +654,8 @@ static int ci_hdrc_probe(struct platform_device *pdev)
} else if (ci->platdata->usb_phy) {
ci->usb_phy = ci->platdata->usb_phy;
} else {
- ci->phy = devm_phy_get(dev, "usb-phy");
- ci->usb_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
+ ci->phy = devm_phy_get(dev->parent, "usb-phy");
+ ci->usb_phy = devm_usb_get_phy(dev->parent, USB_PHY_TYPE_USB2);
/* if both generic PHY and USB PHY layers aren't enabled */
if (PTR_ERR(ci->phy) == -ENOSYS &&
--
2.1.0
The Marvell Berlin SoCs now has a reset controller. Add the needed
configuration.
Signed-off-by: Antoine Tenart <[email protected]>
---
arch/arm/mach-berlin/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-berlin/Kconfig b/arch/arm/mach-berlin/Kconfig
index 24f85be71671..5803f773a065 100644
--- a/arch/arm/mach-berlin/Kconfig
+++ b/arch/arm/mach-berlin/Kconfig
@@ -1,11 +1,13 @@
menuconfig ARCH_BERLIN
bool "Marvell Berlin SoCs" if ARCH_MULTI_V7
+ select ARCH_HAS_RESET_CONTROLLER
select ARCH_REQUIRE_GPIOLIB
select ARM_GIC
select GENERIC_IRQ_CHIP
select DW_APB_ICTL
select DW_APB_TIMER_OF
select PINCTRL
+ select RESET_CONTROLLER
if ARCH_BERLIN
--
2.1.0
The chip controller node now also describes the Marvell Berlin reset
controller. Add the required 'reset-cells' property.
Signed-off-by: Antoine Tenart <[email protected]>
Acked-by: Philipp Zabel <[email protected]>
---
arch/arm/boot/dts/berlin2.dtsi | 1 +
arch/arm/boot/dts/berlin2cd.dtsi | 1 +
arch/arm/boot/dts/berlin2q.dtsi | 1 +
3 files changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi
index 9d7c810ebd0b..d7e81e124de0 100644
--- a/arch/arm/boot/dts/berlin2.dtsi
+++ b/arch/arm/boot/dts/berlin2.dtsi
@@ -249,6 +249,7 @@
chip: chip-control@ea0000 {
compatible = "marvell,berlin2-chip-ctrl";
#clock-cells = <1>;
+ #reset-cells = <2>;
reg = <0xea0000 0x400>;
clocks = <&refclk>;
clock-names = "refclk";
diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi
index cc1df65da504..68f7032b4686 100644
--- a/arch/arm/boot/dts/berlin2cd.dtsi
+++ b/arch/arm/boot/dts/berlin2cd.dtsi
@@ -231,6 +231,7 @@
chip: chip-control@ea0000 {
compatible = "marvell,berlin2cd-chip-ctrl";
#clock-cells = <1>;
+ #reset-cells = <2>;
reg = <0xea0000 0x400>;
clocks = <&refclk>;
clock-names = "refclk";
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 891d56b03922..2de8d6f8973c 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -349,6 +349,7 @@
chip: chip-control@ea0000 {
compatible = "marvell,berlin2q-chip-ctrl";
#clock-cells = <1>;
+ #reset-cells = <2>;
reg = <0xea0000 0x400>, <0xdd0170 0x10>;
clocks = <&refclk>;
clock-names = "refclk";
--
2.1.0
On Friday 14 November 2014 16:25:53 Antoine Tenart wrote:
> menuconfig ARCH_BERLIN
> bool "Marvell Berlin SoCs" if ARCH_MULTI_V7
> + select ARCH_HAS_RESET_CONTROLLER
> select ARCH_REQUIRE_GPIOLIB
> select ARM_GIC
> select GENERIC_IRQ_CHIP
> select DW_APB_ICTL
> select DW_APB_TIMER_OF
> select PINCTRL
> + select RESET_CONTROLLER
RESET_CONTROLLER is meant to be user-selectable, don't add a 'select' here,
but instead make the driver 'depends on RESET_CONTROLLER'.
Arnd
On 11/14/2014 04:33 PM, Arnd Bergmann wrote:
> On Friday 14 November 2014 16:25:53 Antoine Tenart wrote:
>> menuconfig ARCH_BERLIN
>> bool "Marvell Berlin SoCs" if ARCH_MULTI_V7
>> + select ARCH_HAS_RESET_CONTROLLER
>> select ARCH_REQUIRE_GPIOLIB
>> select ARM_GIC
>> select GENERIC_IRQ_CHIP
>> select DW_APB_ICTL
>> select DW_APB_TIMER_OF
>> select PINCTRL
>> + select RESET_CONTROLLER
>
> RESET_CONTROLLER is meant to be user-selectable, don't add a 'select' here,
> but instead make the driver 'depends on RESET_CONTROLLER'.
It already went into arm-soc for v3.19 - ergo, we need an extra
patch for removing the current 'select'.
Sebastian
Sebastian,
On Fri, Nov 14, 2014 at 04:36:50PM +0100, Sebastian Hesselbarth wrote:
> On 11/14/2014 04:33 PM, Arnd Bergmann wrote:
> >On Friday 14 November 2014 16:25:53 Antoine Tenart wrote:
> >> menuconfig ARCH_BERLIN
> >> bool "Marvell Berlin SoCs" if ARCH_MULTI_V7
> >>+ select ARCH_HAS_RESET_CONTROLLER
> >> select ARCH_REQUIRE_GPIOLIB
> >> select ARM_GIC
> >> select GENERIC_IRQ_CHIP
> >> select DW_APB_ICTL
> >> select DW_APB_TIMER_OF
> >> select PINCTRL
> >>+ select RESET_CONTROLLER
> >
> >RESET_CONTROLLER is meant to be user-selectable, don't add a 'select' here,
> >but instead make the driver 'depends on RESET_CONTROLLER'.
>
> It already went into arm-soc for v3.19 - ergo, we need an extra
> patch for removing the current 'select'.
Do you want me to send the extra patch fixing this issue?
Antoine
--
Antoine T?nart, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
Hello.
On 11/14/2014 06:26 PM, Antoine Tenart wrote:
> Enable the 2 available USB PHY and USB nodes on the Marvell Berlin BG2Q
> DMP.
> Signed-off-by: Antoine Tenart <[email protected]>
> ---
> arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 53 ++++++++++++++++++++++++++++++
> 1 file changed, 53 insertions(+)
> diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
> index ea1f99b8eed6..f7c25580e122 100644
> --- a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
> +++ b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
[...]
> @@ -21,6 +23,39 @@
> choosen {
> bootargs = "console=ttyS0,115200 earlyprintk";
> };
> +
> + regulators {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + reg_usb0_vbus: regulator@0 {
Erm, I'm not seeing the "reg" prop. The <unit-address> part of the name
shouldn't be used without the "reg" prop.
[...]
WBR, Sergei
On 14.11.2014 18:28, Antoine Tenart wrote:
> Sebastian,
>
> On Fri, Nov 14, 2014 at 04:36:50PM +0100, Sebastian Hesselbarth wrote:
>> On 11/14/2014 04:33 PM, Arnd Bergmann wrote:
>>> On Friday 14 November 2014 16:25:53 Antoine Tenart wrote:
>>>> menuconfig ARCH_BERLIN
>>>> bool "Marvell Berlin SoCs" if ARCH_MULTI_V7
>>>> + select ARCH_HAS_RESET_CONTROLLER
>>>> select ARCH_REQUIRE_GPIOLIB
>>>> select ARM_GIC
>>>> select GENERIC_IRQ_CHIP
>>>> select DW_APB_ICTL
>>>> select DW_APB_TIMER_OF
>>>> select PINCTRL
>>>> + select RESET_CONTROLLER
>>>
>>> RESET_CONTROLLER is meant to be user-selectable, don't add a 'select' here,
>>> but instead make the driver 'depends on RESET_CONTROLLER'.
>>
>> It already went into arm-soc for v3.19 - ergo, we need an extra
>> patch for removing the current 'select'.
>
> Do you want me to send the extra patch fixing this issue?
Yes, please. The patch in question is already in a tagged, stabled,
and pulled branch - so there is nothing I can do about it.
You can just send it as an independent patch, I'll pick it up quickly.
Sebastian
On Fri, Nov 14, 2014 at 04:25:58PM +0100, Antoine Tenart wrote:
> Add a USB2 ChipIdea driver for ci13xxx, with optional PHY, clock
> and DMA mask, to support USB2 ChipIdea controllers that don't need
> specific functions.
>
> Tested on the Marvell Berlin SoCs USB controllers.
>
> Signed-off-by: Antoine Tenart <[email protected]>
> ---
> drivers/usb/chipidea/Makefile | 1 +
> drivers/usb/chipidea/ci_hdrc_usb2.c | 117 ++++++++++++++++++++++++++++++++++++
> 2 files changed, 118 insertions(+)
> create mode 100644 drivers/usb/chipidea/ci_hdrc_usb2.c
>
> diff --git a/drivers/usb/chipidea/Makefile b/drivers/usb/chipidea/Makefile
> index 2f099c7df7b5..1fc86a2ca22d 100644
> --- a/drivers/usb/chipidea/Makefile
> +++ b/drivers/usb/chipidea/Makefile
> @@ -10,6 +10,7 @@ ci_hdrc-$(CONFIG_USB_OTG_FSM) += otg_fsm.o
>
> # Glue/Bridge layers go here
>
> +obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc_usb2.o
usb2 is too generic, you should call it ci_hdcr_marvell, or something
like that.
--
balbi
Felipe,
On Fri, Nov 14, 2014 at 03:08:32PM -0600, Felipe Balbi wrote:
> On Fri, Nov 14, 2014 at 04:25:58PM +0100, Antoine Tenart wrote:
> > Add a USB2 ChipIdea driver for ci13xxx, with optional PHY, clock
> > and DMA mask, to support USB2 ChipIdea controllers that don't need
> > specific functions.
> >
> > Tested on the Marvell Berlin SoCs USB controllers.
> >
> > Signed-off-by: Antoine Tenart <[email protected]>
> > ---
> > drivers/usb/chipidea/Makefile | 1 +
> > drivers/usb/chipidea/ci_hdrc_usb2.c | 117 ++++++++++++++++++++++++++++++++++++
> > 2 files changed, 118 insertions(+)
> > create mode 100644 drivers/usb/chipidea/ci_hdrc_usb2.c
> >
> > diff --git a/drivers/usb/chipidea/Makefile b/drivers/usb/chipidea/Makefile
> > index 2f099c7df7b5..1fc86a2ca22d 100644
> > --- a/drivers/usb/chipidea/Makefile
> > +++ b/drivers/usb/chipidea/Makefile
> > @@ -10,6 +10,7 @@ ci_hdrc-$(CONFIG_USB_OTG_FSM) += otg_fsm.o
> >
> > # Glue/Bridge layers go here
> >
> > +obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc_usb2.o
>
> usb2 is too generic, you should call it ci_hdcr_marvell, or something
> like that.
This driver is generic, and not only for Marvell Berlin SoCs. It is part
of the Berlin USB series as it is the first SoC to use it but Xilinx can
also use it for example.
Antoine
--
Antoine T?nart, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
On Fri, Nov 14, 2014 at 10:10:52PM +0100, Antoine Tenart wrote:
> Felipe,
>
> On Fri, Nov 14, 2014 at 03:08:32PM -0600, Felipe Balbi wrote:
> > On Fri, Nov 14, 2014 at 04:25:58PM +0100, Antoine Tenart wrote:
> > > Add a USB2 ChipIdea driver for ci13xxx, with optional PHY, clock
> > > and DMA mask, to support USB2 ChipIdea controllers that don't need
> > > specific functions.
> > >
> > > Tested on the Marvell Berlin SoCs USB controllers.
> > >
> > > Signed-off-by: Antoine Tenart <[email protected]>
> > > ---
> > > drivers/usb/chipidea/Makefile | 1 +
> > > drivers/usb/chipidea/ci_hdrc_usb2.c | 117 ++++++++++++++++++++++++++++++++++++
> > > 2 files changed, 118 insertions(+)
> > > create mode 100644 drivers/usb/chipidea/ci_hdrc_usb2.c
> > >
> > > diff --git a/drivers/usb/chipidea/Makefile b/drivers/usb/chipidea/Makefile
> > > index 2f099c7df7b5..1fc86a2ca22d 100644
> > > --- a/drivers/usb/chipidea/Makefile
> > > +++ b/drivers/usb/chipidea/Makefile
> > > @@ -10,6 +10,7 @@ ci_hdrc-$(CONFIG_USB_OTG_FSM) += otg_fsm.o
> > >
> > > # Glue/Bridge layers go here
> > >
> > > +obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc_usb2.o
> >
> > usb2 is too generic, you should call it ci_hdcr_marvell, or something
> > like that.
>
> This driver is generic, and not only for Marvell Berlin SoCs. It is part
> of the Berlin USB series as it is the first SoC to use it but Xilinx can
> also use it for example.
then how about ci_hdrc_generic.c ?
--
balbi
Hi,
On Fri, Nov 14, 2014 at 09:47:11PM +0300, Sergei Shtylyov wrote:
> On 11/14/2014 06:26 PM, Antoine Tenart wrote:
>
> >Enable the 2 available USB PHY and USB nodes on the Marvell Berlin BG2Q
> >DMP.
>
> >Signed-off-by: Antoine Tenart <[email protected]>
> >---
> > arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 53 ++++++++++++++++++++++++++++++
> > 1 file changed, 53 insertions(+)
>
> >diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
> >index ea1f99b8eed6..f7c25580e122 100644
> >--- a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
> >+++ b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
> [...]
> >@@ -21,6 +23,39 @@
> > choosen {
> > bootargs = "console=ttyS0,115200 earlyprintk";
> > };
> >+
> >+ regulators {
> >+ compatible = "simple-bus";
> >+ #address-cells = <1>;
> >+ #size-cells = <0>;
> >+
> >+ reg_usb0_vbus: regulator@0 {
>
> Erm, I'm not seeing the "reg" prop. The <unit-address> part of the name
> shouldn't be used without the "reg" prop.
>
> [...]
Well, I respect the bindings described at:
Documentation/devicetree/bindings/regulator/fixed-regulator.txt
Antoine
--
Antoine T?nart, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
On Fri, Nov 14, 2014 at 04:25:58PM +0100, Antoine Tenart wrote:
> Add a USB2 ChipIdea driver for ci13xxx, with optional PHY, clock
> and DMA mask, to support USB2 ChipIdea controllers that don't need
> specific functions.
>
> Tested on the Marvell Berlin SoCs USB controllers.
>
> Signed-off-by: Antoine Tenart <[email protected]>
I remember someone tested it before, you can add his tested-by if you
can find it.
> ---
> drivers/usb/chipidea/Makefile | 1 +
> drivers/usb/chipidea/ci_hdrc_usb2.c | 117 ++++++++++++++++++++++++++++++++++++
> 2 files changed, 118 insertions(+)
> create mode 100644 drivers/usb/chipidea/ci_hdrc_usb2.c
>
> diff --git a/drivers/usb/chipidea/Makefile b/drivers/usb/chipidea/Makefile
> index 2f099c7df7b5..1fc86a2ca22d 100644
> --- a/drivers/usb/chipidea/Makefile
> +++ b/drivers/usb/chipidea/Makefile
> @@ -10,6 +10,7 @@ ci_hdrc-$(CONFIG_USB_OTG_FSM) += otg_fsm.o
>
> # Glue/Bridge layers go here
>
> +obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc_usb2.o
> obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc_msm.o
> obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc_zevio.o
>
> diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c b/drivers/usb/chipidea/ci_hdrc_usb2.c
> new file mode 100644
> index 000000000000..15a0947483b8
> --- /dev/null
> +++ b/drivers/usb/chipidea/ci_hdrc_usb2.c
> @@ -0,0 +1,117 @@
> +/*
> + * Copyright (C) 2014 Marvell Technology Group Ltd.
> + *
> + * Antoine Tenart <[email protected]>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/dma-mapping.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/phy/phy.h>
> +#include <linux/platform_device.h>
> +#include <linux/usb/chipidea.h>
> +#include <linux/usb/hcd.h>
> +#include <linux/usb/ulpi.h>
> +
> +#include "ci.h"
> +
> +struct ci_hdrc_usb2_priv {
> + struct platform_device *ci_pdev;
> + struct clk *clk;
> +};
> +
> +static struct ci_hdrc_platform_data ci_default_pdata = {
> + .capoffset = DEF_CAPOFFSET,
> + .flags = CI_HDRC_REQUIRE_TRANSCEIVER |
> + CI_HDRC_DISABLE_STREAMING,
> +};
> +
"CI_HDRC_REQUIRE_TRANSCEIVER" is deleted, have you rebased my next tree?
> +static int ci_hdrc_usb2_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct ci_hdrc_usb2_priv *priv;
> + struct ci_hdrc_platform_data *ci_pdata = dev_get_platdata(&pdev->dev);
You can dev instead of &pdev->dev.
> + int ret;
> +
> + if (!ci_pdata)
> + ci_pdata = &ci_default_pdata;
> +
> + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> + if (!priv)
> + return -ENOMEM;
> +
> + priv->clk = devm_clk_get(dev, NULL);
> + if (!IS_ERR(priv->clk)) {
> + ret = clk_prepare_enable(priv->clk);
> + if (ret) {
> + dev_err(dev, "failed to enable the clock: %d\n", ret);
> + return ret;
> + }
> + }
> +
> + ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
> + if (ret)
> + goto clk_err;
> +
> + ci_pdata->name = dev_name(&pdev->dev);
> +
> + priv->ci_pdev = ci_hdrc_add_device(dev, pdev->resource,
> + pdev->num_resources, ci_pdata);
> + if (IS_ERR(priv->ci_pdev)) {
> + ret = PTR_ERR(priv->ci_pdev);
> + if (ret != -EPROBE_DEFER)
> + dev_err(dev,
> + "failed to register ci_hdrc platform device: %d\n",
> + ret);
> + goto clk_err;
> + }
> +
> + platform_set_drvdata(pdev, priv);
> +
> + pm_runtime_no_callbacks(dev);
> + pm_runtime_enable(dev);
> +
> + return 0;
> +
> +clk_err:
> + if (!IS_ERR(priv->clk))
> + clk_disable_unprepare(priv->clk);
> + return ret;
> +}
> +
> +static int ci_hdrc_usb2_remove(struct platform_device *pdev)
> +{
> + struct ci_hdrc_usb2_priv *priv = platform_get_drvdata(pdev);
> +
> + pm_runtime_disable(&pdev->dev);
> + ci_hdrc_remove_device(priv->ci_pdev);
> + clk_disable_unprepare(priv->clk);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id ci_hdrc_usb2_of_match[] = {
> + { .compatible = "chipidea,usb2" },
> + { }
> +};
> +MODULE_DEVICE_TABLE(of, ci_hdrc_usb2_of_match);
> +
> +static struct platform_driver ci_hdrc_usb2_driver = {
> + .probe = ci_hdrc_usb2_probe,
> + .remove = ci_hdrc_usb2_remove,
> + .driver = {
> + .name = "chipidea-usb2",
> + .owner = THIS_MODULE,
> + .of_match_table = of_match_ptr(ci_hdrc_usb2_of_match),
> + },
> +};
> +module_platform_driver(ci_hdrc_usb2_driver);
> +
> +MODULE_DESCRIPTION("ChipIdea HDRC USB2 binding for ci13xxx");
> +MODULE_AUTHOR("Antoine Tenart <[email protected]>");
> +MODULE_LICENSE("GPL");
> --
> 2.1.0
>
--
Best Regards,
Peter Chen
On Fri, Nov 14, 2014 at 04:25:57PM +0100, Antoine Tenart wrote:
> The generic platform device for CI drivers is probed by calling
> ci_hdrc_probe. This is not the same device as the one for the specific
> driver, so the of_node isn't the one we're looking into.
>
> This result in not being able to probe the phys. Since all CI driver are
> retrieving their phys in the specific code, this didn't impact any of
> them yet.
>
> Fixes it using the right of node pointer, by using dev->parent instead
> of dev in phy get functions.
It is a correct fix, but the description need to be refined, it is
not related to "of_node" or "node", it is related child/parent device.
>
> Signed-off-by: Antoine Tenart <[email protected]>
> ---
> drivers/usb/chipidea/core.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
> index ba0ac2723098..36318c85ad65 100644
> --- a/drivers/usb/chipidea/core.c
> +++ b/drivers/usb/chipidea/core.c
> @@ -654,8 +654,8 @@ static int ci_hdrc_probe(struct platform_device *pdev)
> } else if (ci->platdata->usb_phy) {
> ci->usb_phy = ci->platdata->usb_phy;
> } else {
> - ci->phy = devm_phy_get(dev, "usb-phy");
> - ci->usb_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
> + ci->phy = devm_phy_get(dev->parent, "usb-phy");
> + ci->usb_phy = devm_usb_get_phy(dev->parent, USB_PHY_TYPE_USB2);
>
> /* if both generic PHY and USB PHY layers aren't enabled */
> if (PTR_ERR(ci->phy) == -ENOSYS &&
> --
> 2.1.0
>
--
Best Regards,
Peter Chen
On Fri, Nov 14, 2014 at 04:25:59PM +0100, Antoine Tenart wrote:
> Document the USB2 ChipIdea driver (ci13xxx) bindings.
>
> Signed-off-by: Antoine Tenart <[email protected]>
> ---
> .../devicetree/bindings/usb/ci-hdrc-usb2.txt | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
>
> diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
> new file mode 100644
> index 000000000000..27f8b1e5ee46
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
> @@ -0,0 +1,24 @@
> +* USB2 ChipIdea USB controller for ci13xxx
> +
> +Required properties:
> +- compatible: should be "chipidea,usb2"
> +- reg: base address and length of the registers
> +- interrupts: interrupt for the USB controller
> +
> +Optional properties:
> +- clocks: reference to the USB clock
> +- phys: reference to the USB PHY
> +- phy-names: should be "usb-phy"
> +- vbus-supply: reference to the VBUS regulator
> +
> +Example:
> +
> + usb@f7ed0000 {
> + compatible = "chipidea,usb2";
> + reg = <0xf7ed0000 0x10000>;
> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&chip CLKID_USB0>;
> + phys = <&usb_phy0>;
> + phy-names = "usb-phy";
> + vbus-supply = <®_usb0_vbus>;
> + };
> --
> 2.1.0
>
Acked-by: Peter Chen <[email protected]>
--
Best Regards,
Peter Chen
Felipe,
On Fri, Nov 14, 2014 at 03:13:34PM -0600, Felipe Balbi wrote:
> On Fri, Nov 14, 2014 at 10:10:52PM +0100, Antoine Tenart wrote:
> > On Fri, Nov 14, 2014 at 03:08:32PM -0600, Felipe Balbi wrote:
> > > On Fri, Nov 14, 2014 at 04:25:58PM +0100, Antoine Tenart wrote:
> > > > Add a USB2 ChipIdea driver for ci13xxx, with optional PHY, clock
> > > > and DMA mask, to support USB2 ChipIdea controllers that don't need
> > > > specific functions.
> > > >
> > > > Tested on the Marvell Berlin SoCs USB controllers.
> > > >
> > > > Signed-off-by: Antoine Tenart <[email protected]>
> > > > ---
> > > > drivers/usb/chipidea/Makefile | 1 +
> > > > drivers/usb/chipidea/ci_hdrc_usb2.c | 117 ++++++++++++++++++++++++++++++++++++
> > > > 2 files changed, 118 insertions(+)
> > > > create mode 100644 drivers/usb/chipidea/ci_hdrc_usb2.c
> > > >
> > > > diff --git a/drivers/usb/chipidea/Makefile b/drivers/usb/chipidea/Makefile
> > > > index 2f099c7df7b5..1fc86a2ca22d 100644
> > > > --- a/drivers/usb/chipidea/Makefile
> > > > +++ b/drivers/usb/chipidea/Makefile
> > > > @@ -10,6 +10,7 @@ ci_hdrc-$(CONFIG_USB_OTG_FSM) += otg_fsm.o
> > > >
> > > > # Glue/Bridge layers go here
> > > >
> > > > +obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc_usb2.o
> > >
> > > usb2 is too generic, you should call it ci_hdcr_marvell, or something
> > > like that.
> >
> > This driver is generic, and not only for Marvell Berlin SoCs. It is part
> > of the Berlin USB series as it is the first SoC to use it but Xilinx can
> > also use it for example.
>
> then how about ci_hdrc_generic.c ?
We had this discussion during in the v2 thread of this series[1]. I tend
to prefer not using the 'generic' keyword. I think using 'usb2' is
generic enough here.
Antoine
[1] https://lkml.org/lkml/2014/6/24/197
--
Antoine T?nart, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com