The goal of this series was to add missing I2C bindings for BLSP_I2C1,
BLSP_I2C3, and BLSP_I2C5. But while working on this, I noticed some
styling issues and decided to tackle them in the same patchset, mostly
because they touch the same files and the same people will be involved
for the review.
In this second version, I followed the recommandation of Bjorn Andersson
and splitted pinmuxing and pinconf. The reason behind that is that the
pinmuxing is common as functions cannot be routed to other pins, but
pinconfs are board-specific.
Damien Riegel (10):
arm64: dts: qcom: pm8916: fix wcd_codec indentation
arm64: dts: qcom: msm8916-pins: remove assignments to bias-disable
arm64: dts: qcom: msm8916-pins: keep cdc_dmic pins in suspend mode
arm64: dts: qcom: msm8916: drop unused board-specific nodes
arm64: dts: qcom: apq8016-sbc: sort nodes alphabetically
arm64: dts: qcom: msm8916: move pinconfs to board files
arm64: dts: qcom: msm8916: drop remaining unused pinconfs
arm64: dts: qcom: msm8916-pins: move sdhc2 cd node with its siblings
arm64: dts: qcom: msm8916: normalize I2C and SPI nodes
arm64: dts: qcom: msm8916: add nodes for i2c1, i2c3, i2c5
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 446 ++++++++++++++++++++++++++++-
arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi | 17 ++
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 393 ++++---------------------
arch/arm64/boot/dts/qcom/msm8916.dtsi | 69 ++++-
arch/arm64/boot/dts/qcom/pm8916.dtsi | 82 +++---
5 files changed, 604 insertions(+), 403 deletions(-)
--
2.15.0
Nodes relative to the first sdhc node were interlaced with node of the
second sdhc. Move sdhc2_cd_pin with its siblings to prevent that. Also
rename the grouping node from sdhc2_cd_pin to pmx_sdc2_cd_pin, as
"pmx_sdc" is the prefix used by other nodes.
Signed-off-by: Damien Riegel <[email protected]>
---
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 30 +++++++++++++++---------------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index c79301f204b7..7704ddecb6c4 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -194,21 +194,6 @@
};
};
- sdhc2_cd_pin {
- sdc2_cd_on: cd_on {
- pinmux {
- function = "gpio";
- pins = "gpio38";
- };
- };
- sdc2_cd_off: cd_off {
- pinmux {
- function = "gpio";
- pins = "gpio38";
- };
- };
- };
-
pmx_sdc1_clk {
sdc1_clk_on: clk_on {
pinmux {
@@ -287,6 +272,21 @@
};
};
+ pmx_sdc2_cd_pin {
+ sdc2_cd_on: cd_on {
+ pinmux {
+ function = "gpio";
+ pins = "gpio38";
+ };
+ };
+ sdc2_cd_off: cd_off {
+ pinmux {
+ function = "gpio";
+ pins = "gpio38";
+ };
+ };
+ };
+
cdc-pdm-lines {
cdc_pdm_lines_act: pdm_lines_on {
pinmux {
--
2.15.0
This commit drops pin configs that cannot be moved to board files as
no boards use them.
Signed-off-by: Damien Riegel <[email protected]>
---
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 33 ------------------------------
1 file changed, 33 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 0790232c4654..c79301f204b7 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -311,26 +311,13 @@
pins = "gpio113", "gpio114", "gpio115",
"gpio116";
};
- pinconf {
- pins = "gpio113", "gpio114", "gpio115",
- "gpio116";
- drive-strength = <8>;
- bias-pull-none;
- };
};
-
ext_pri_tlmm_lines_sus: ext_pa_off {
pinmux {
function = "pri_mi2s";
pins = "gpio113", "gpio114", "gpio115",
"gpio116";
};
- pinconf {
- pins = "gpio113", "gpio114", "gpio115",
- "gpio116";
- drive-strength = <2>;
- bias-disable;
- };
};
};
@@ -340,23 +327,12 @@
function = "pri_mi2s_ws";
pins = "gpio110";
};
- pinconf {
- pins = "gpio110";
- drive-strength = <8>;
- bias-pull-none;
- };
};
-
ext_pri_ws_sus: ext_pa_off {
pinmux {
function = "pri_mi2s_ws";
pins = "gpio110";
};
- pinconf {
- pins = "gpio110";
- drive-strength = <2>;
- bias-disable;
- };
};
};
@@ -403,10 +379,6 @@
function = "dmic0_data";
pins = "gpio1";
};
- pinconf {
- pins = "gpio0", "gpio1";
- drive-strength = <8>;
- };
};
cdc_dmic_lines_sus: dmic_lines_off {
pinmux_dmic0_clk {
@@ -417,11 +389,6 @@
function = "dmic0_data";
pins = "gpio1";
};
- pinconf {
- pins = "gpio0", "gpio1";
- drive-strength = <2>;
- bias-disable;
- };
};
};
--
2.15.0
Drop assignments to bias-disable as the documentation [1] states that
this property doesn't take a value. Other occurrences of this property
respect that.
[1] Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.txt
Signed-off-by: Damien Riegel <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
---
Changes in v2:
- Added Reviewed-by Bjorn Andersson
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 4cb0b5834143..c67ad8ed8b60 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -278,7 +278,7 @@
pinconf {
pins = "gpio6", "gpio7";
drive-strength = <16>;
- bias-disable = <0>;
+ bias-disable;
};
};
@@ -290,7 +290,7 @@
pinconf {
pins = "gpio6", "gpio7";
drive-strength = <2>;
- bias-disable = <0>;
+ bias-disable;
};
};
@@ -302,7 +302,7 @@
pinconf {
pins = "gpio14", "gpio15";
drive-strength = <16>;
- bias-disable = <0>;
+ bias-disable;
};
};
@@ -314,7 +314,7 @@
pinconf {
pins = "gpio14", "gpio15";
drive-strength = <2>;
- bias-disable = <0>;
+ bias-disable;
};
};
@@ -326,7 +326,7 @@
pinconf {
pins = "gpio22", "gpio23";
drive-strength = <16>;
- bias-disable = <0>;
+ bias-disable;
};
};
@@ -338,7 +338,7 @@
pinconf {
pins = "gpio22", "gpio23";
drive-strength = <2>;
- bias-disable = <0>;
+ bias-disable;
};
};
--
2.15.0
Also, it was using whitespaces for indentation on some lines, fix that
while moving it.
Signed-off-by: Damien Riegel <[email protected]>
---
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index d4b35d81a282..981450f50e10 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -544,14 +544,6 @@
};
};
-&wcd_codec {
- status = "okay";
- clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;
- clock-names = "mclk";
- qcom,mbhc-vthreshold-low = <75 150 237 450 500>;
- qcom,mbhc-vthreshold-high = <75 150 237 450 500>;
-};
-
&smd_rpm_regulators {
vdd_l1_l2_l3-supply = <&pm8916_s3>;
vdd_l5-supply = <&pm8916_s3>;
@@ -671,3 +663,11 @@
regulator-max-microvolt = <3337000>;
};
};
+
+&wcd_codec {
+ status = "okay";
+ clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;
+ clock-names = "mclk";
+ qcom,mbhc-vthreshold-low = <75 150 237 450 500>;
+ qcom,mbhc-vthreshold-high = <75 150 237 450 500>;
+};
--
2.15.0
These nodes reserve and configure some pins as GPIOs. They are not
generic pinctrls, they actually belong to board files but they are not
used by any other node, so just drop them altogether.
Signed-off-by: Damien Riegel <[email protected]>
---
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 52 ------------------------------
1 file changed, 52 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 10fc1fc90682..21f144c55638 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -505,32 +505,6 @@
};
};
- ext-codec-lines {
- ext_codec_lines_act: lines_on {
- pinmux {
- function = "gpio";
- pins = "gpio67";
- };
- pinconf {
- pins = "gpio67";
- drive-strength = <8>;
- bias-disable;
- output-high;
- };
- };
- ext_codec_lines_sus: lines_off {
- pinmux {
- function = "gpio";
- pins = "gpio67";
- };
- pinconf {
- pins = "gpio67";
- drive-strength = <2>;
- bias-disable;
- };
- };
- };
-
cdc-pdm-lines {
cdc_pdm_lines_act: pdm_lines_on {
pinmux {
@@ -703,32 +677,6 @@
};
};
- cross-conn-det {
- cross_conn_det_act: lines_on {
- pinmux {
- function = "gpio";
- pins = "gpio120";
- };
- pinconf {
- pins = "gpio120";
- drive-strength = <8>;
- output-low;
- bias-pull-down;
- };
- };
- cross_conn_det_sus: lines_off {
- pinmux {
- function = "gpio";
- pins = "gpio120";
- };
- pinconf {
- pins = "gpio120";
- drive-strength = <2>;
- bias-disable;
- };
- };
- };
-
wcnss_pin_a: wcnss-active {
pinmux {
pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44";
--
2.15.0
The QUP core can be used either for I2C or SPI, so the same IP is mapped
by a driver or the other. SPI bindings use a leading 0 for the start
address and a size of 0x600, I2C bindings don't have the leading 0 and
have a size 0x1000.
To make them more similar, add the leading 0 to I2C bindings and changes
the size to 0x500 for all of them, as this is the actual size of these
blocks. Also align the second entry of the clocks array.
Signed-off-by: Damien Riegel <[email protected]>
---
Changes in v2:
- Set size to 0x500
arch/arm64/boot/dts/qcom/msm8916.dtsi | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index e16ba8334518..ac440f287633 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -355,7 +355,7 @@
blsp_spi1: spi@78b5000 {
compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b5000 0x600>;
+ reg = <0x078b5000 0x500>;
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -372,7 +372,7 @@
blsp_spi2: spi@78b6000 {
compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b6000 0x600>;
+ reg = <0x078b6000 0x500>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -389,7 +389,7 @@
blsp_spi3: spi@78b7000 {
compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b7000 0x600>;
+ reg = <0x078b7000 0x500>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -406,7 +406,7 @@
blsp_spi4: spi@78b8000 {
compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b8000 0x600>;
+ reg = <0x078b8000 0x500>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -423,7 +423,7 @@
blsp_spi5: spi@78b9000 {
compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b9000 0x600>;
+ reg = <0x078b9000 0x500>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP5_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -440,7 +440,7 @@
blsp_spi6: spi@78ba000 {
compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078ba000 0x600>;
+ reg = <0x078ba000 0x500>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP6_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -457,10 +457,10 @@
blsp_i2c2: i2c@78b6000 {
compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x78b6000 0x1000>;
+ reg = <0x078b6000 0x500>;
interrupts = <GIC_SPI 96 0>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
- <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
+ <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
clock-names = "iface", "core";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c2_default>;
@@ -472,10 +472,10 @@
blsp_i2c4: i2c@78b8000 {
compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x78b8000 0x1000>;
+ reg = <0x078b8000 0x500>;
interrupts = <GIC_SPI 98 0>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
- <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
+ <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
clock-names = "iface", "core";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c4_default>;
@@ -487,10 +487,10 @@
blsp_i2c6: i2c@78ba000 {
compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x78ba000 0x1000>;
+ reg = <0x078ba000 0x500>;
interrupts = <GIC_SPI 100 0>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
- <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
+ <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
clock-names = "iface", "core";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c6_default>;
--
2.15.0
Following a suggestion from Bjorn Andersson [1], this commit moves
electrical specifications which were defined in mms8916-pins.dtsi to
board files, where they actually belong.
Pinmuxing is kept in the platform file because there are no alternative
pins on which all these functions could be routed, so this part is
indeed common to all boards using this SoC.
[1] https://www.spinics.net/lists/devicetree/msg201764.html
Signed-off-by: Damien Riegel <[email protected]>
Suggested-by: Bjorn Andersson <[email protected]>
---
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 386 +++++++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi | 17 ++
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 258 -------------------
3 files changed, 403 insertions(+), 258 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 981450f50e10..53c1ddd281a4 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -544,6 +544,384 @@
};
};
+&blsp1_uart1_default {
+ pinconf {
+ pins = "gpio0", "gpio1",
+ "gpio2", "gpio3";
+ drive-strength = <16>;
+ bias-disable;
+ };
+};
+
+&blsp1_uart1_sleep {
+ pinconf {
+ pins = "gpio0", "gpio1",
+ "gpio2", "gpio3";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
+&blsp1_uart2_default {
+ pinconf {
+ pins = "gpio4", "gpio5";
+ drive-strength = <16>;
+ bias-disable;
+ };
+};
+
+&blsp1_uart2_sleep {
+ pinconf {
+ pins = "gpio4", "gpio5";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
+&cdc_pdm_lines_act {
+ pinconf {
+ pins = "gpio63", "gpio64", "gpio65", "gpio66",
+ "gpio67", "gpio68";
+ drive-strength = <8>;
+ bias-pull-none;
+ };
+};
+
+&cdc_pdm_lines_sus {
+ pinconf {
+ pins = "gpio63", "gpio64", "gpio65", "gpio66",
+ "gpio67", "gpio68";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
+&ext_mclk_tlmm_lines_act {
+ pinconf {
+ pins = "gpio116";
+ drive-strength = <8>;
+ bias-pull-none;
+ };
+};
+
+&ext_mclk_tlmm_lines_sus {
+ pinconf {
+ pins = "gpio116";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
+&ext_sec_tlmm_lines_act {
+ pinconf {
+ pins = "gpio112", "gpio117", "gpio118",
+ "gpio119";
+ drive-strength = <8>;
+ bias-pull-none;
+ };
+};
+
+&ext_sec_tlmm_lines_sus {
+ pinconf {
+ pins = "gpio112", "gpio117", "gpio118",
+ "gpio119";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
+&i2c2_default {
+ pinconf {
+ pins = "gpio6", "gpio7";
+ drive-strength = <16>;
+ bias-disable;
+ };
+};
+
+&i2c2_sleep {
+ pinconf {
+ pins = "gpio6", "gpio7";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
+&i2c4_default {
+ pinconf {
+ pins = "gpio14", "gpio15";
+ drive-strength = <16>;
+ bias-disable;
+ };
+};
+
+&i2c4_sleep {
+ pinconf {
+ pins = "gpio14", "gpio15";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
+&i2c6_default {
+ pinconf {
+ pins = "gpio22", "gpio23";
+ drive-strength = <16>;
+ bias-disable;
+ };
+};
+
+&i2c6_sleep {
+ pinconf {
+ pins = "gpio22", "gpio23";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
+&sdc1_clk_on {
+ pinconf {
+ pins = "sdc1_clk";
+ bias-disable;
+ drive-strength = <16>;
+ };
+};
+
+&sdc1_clk_off {
+ pinconf {
+ pins = "sdc1_clk";
+ bias-disable;
+ drive-strength = <2>;
+ };
+};
+
+&sdc1_cmd_on {
+ pinconf {
+ pins = "sdc1_cmd";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+};
+
+&sdc1_cmd_off {
+ pinconf {
+ pins = "sdc1_cmd";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+};
+
+&sdc1_data_on {
+ pinconf {
+ pins = "sdc1_data";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+};
+
+&sdc1_data_off {
+ pinconf {
+ pins = "sdc1_data";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+};
+
+&sdc2_clk_on {
+ pinconf {
+ pins = "sdc2_clk";
+ bias-disable;
+ drive-strength = <16>;
+ };
+};
+
+&sdc2_clk_off {
+ pinconf {
+ pins = "sdc2_clk";
+ bias-disable;
+ drive-strength = <2>;
+ };
+};
+
+&sdc2_cmd_on {
+ pinconf {
+ pins = "sdc2_cmd";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+};
+
+&sdc2_cmd_off {
+ pinconf {
+ pins = "sdc2_cmd";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+};
+
+&sdc2_data_on {
+ pinconf {
+ pins = "sdc2_data";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+};
+
+&sdc2_data_off {
+ pinconf {
+ pins = "sdc2_data";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+};
+
+&sdc2_cd_on {
+ pinconf {
+ pins = "gpio38";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+};
+
+&sdc2_cd_off {
+ pinconf {
+ pins = "gpio38";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
+&spi1_default {
+ pinconf {
+ pins = "gpio0", "gpio1", "gpio3";
+ drive-strength = <12>;
+ bias-disable;
+ };
+ pinconf_cs {
+ pins = "gpio2";
+ drive-strength = <16>;
+ bias-disable;
+ output-high;
+ };
+};
+
+&spi1_sleep {
+ pinconf {
+ pins = "gpio0", "gpio1", "gpio2", "gpio3";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
+&spi2_default {
+ pinconf {
+ pins = "gpio4", "gpio5", "gpio7";
+ drive-strength = <12>;
+ bias-disable;
+ };
+ pinconf_cs {
+ pins = "gpio6";
+ drive-strength = <16>;
+ bias-disable;
+ output-high;
+ };
+};
+
+&spi2_sleep {
+ pinconf {
+ pins = "gpio4", "gpio5", "gpio6", "gpio7";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
+&spi3_default {
+ pinconf {
+ pins = "gpio8", "gpio9", "gpio11";
+ drive-strength = <12>;
+ bias-disable;
+ };
+ pinconf_cs {
+ pins = "gpio10";
+ drive-strength = <16>;
+ bias-disable;
+ output-high;
+ };
+};
+
+&spi3_sleep {
+ pinconf {
+ pins = "gpio8", "gpio9", "gpio10", "gpio11";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
+&spi4_default {
+ pinconf {
+ pins = "gpio12", "gpio13", "gpio15";
+ drive-strength = <12>;
+ bias-disable;
+ };
+ pinconf_cs {
+ pins = "gpio14";
+ drive-strength = <16>;
+ bias-disable;
+ output-high;
+ };
+};
+
+&spi4_sleep {
+ pinconf {
+ pins = "gpio12", "gpio13", "gpio14", "gpio15";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
+&spi5_default {
+ pinconf {
+ pins = "gpio16", "gpio17", "gpio19";
+ drive-strength = <12>;
+ bias-disable;
+ };
+ pinconf_cs {
+ pins = "gpio18";
+ drive-strength = <16>;
+ bias-disable;
+ output-high;
+ };
+};
+
+&spi5_sleep {
+ pinconf {
+ pins = "gpio16", "gpio17", "gpio18", "gpio19";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
+&spi6_default {
+ pinconf {
+ pins = "gpio20", "gpio21", "gpio23";
+ drive-strength = <12>;
+ bias-disable;
+ };
+ pinconf_cs {
+ pins = "gpio22";
+ drive-strength = <16>;
+ bias-disable;
+ output-high;
+ };
+};
+
+&spi6_sleep {
+ pinconf {
+ pins = "gpio20", "gpio21", "gpio22", "gpio23";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
&smd_rpm_regulators {
vdd_l1_l2_l3-supply = <&pm8916_s3>;
vdd_l5-supply = <&pm8916_s3>;
@@ -671,3 +1049,11 @@
qcom,mbhc-vthreshold-low = <75 150 237 450 500>;
qcom,mbhc-vthreshold-high = <75 150 237 450 500>;
};
+
+&wcnss_pin_a {
+ pinconf {
+ pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <6>;
+ bias-pull-up;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
index ceeb8a6feed6..9f15148f8a03 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
@@ -33,3 +33,20 @@
};
};
};
+
+&blsp1_uart2_default {
+ pinconf {
+ pins = "gpio4", "gpio5";
+ drive-strength = <16>;
+ bias-disable;
+ };
+};
+
+&blsp1_uart2_sleep {
+ pinconf {
+ pins = "gpio4", "gpio5";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 21f144c55638..0790232c4654 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -20,12 +20,6 @@
pins = "gpio0", "gpio1",
"gpio2", "gpio3";
};
- pinconf {
- pins = "gpio0", "gpio1",
- "gpio2", "gpio3";
- drive-strength = <16>;
- bias-disable;
- };
};
blsp1_uart1_sleep: blsp1_uart1_sleep {
@@ -34,12 +28,6 @@
pins = "gpio0", "gpio1",
"gpio2", "gpio3";
};
- pinconf {
- pins = "gpio0", "gpio1",
- "gpio2", "gpio3";
- drive-strength = <2>;
- bias-pull-down;
- };
};
blsp1_uart2_default: blsp1_uart2_default {
@@ -47,11 +35,6 @@
function = "blsp_uart2";
pins = "gpio4", "gpio5";
};
- pinconf {
- pins = "gpio4", "gpio5";
- drive-strength = <16>;
- bias-disable;
- };
};
blsp1_uart2_sleep: blsp1_uart2_sleep {
@@ -59,11 +42,6 @@
function = "gpio";
pins = "gpio4", "gpio5";
};
- pinconf {
- pins = "gpio4", "gpio5";
- drive-strength = <2>;
- bias-pull-down;
- };
};
spi1_default: spi1_default {
@@ -75,17 +53,6 @@
function = "gpio";
pins = "gpio2";
};
- pinconf {
- pins = "gpio0", "gpio1", "gpio3";
- drive-strength = <12>;
- bias-disable;
- };
- pinconf_cs {
- pins = "gpio2";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
};
spi1_sleep: spi1_sleep {
@@ -93,11 +60,6 @@
function = "gpio";
pins = "gpio0", "gpio1", "gpio2", "gpio3";
};
- pinconf {
- pins = "gpio0", "gpio1", "gpio2", "gpio3";
- drive-strength = <2>;
- bias-pull-down;
- };
};
spi2_default: spi2_default {
@@ -109,17 +71,6 @@
function = "gpio";
pins = "gpio6";
};
- pinconf {
- pins = "gpio4", "gpio5", "gpio7";
- drive-strength = <12>;
- bias-disable;
- };
- pinconf_cs {
- pins = "gpio6";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
};
spi2_sleep: spi2_sleep {
@@ -127,11 +78,6 @@
function = "gpio";
pins = "gpio4", "gpio5", "gpio6", "gpio7";
};
- pinconf {
- pins = "gpio4", "gpio5", "gpio6", "gpio7";
- drive-strength = <2>;
- bias-pull-down;
- };
};
spi3_default: spi3_default {
@@ -143,17 +89,6 @@
function = "gpio";
pins = "gpio10";
};
- pinconf {
- pins = "gpio8", "gpio9", "gpio11";
- drive-strength = <12>;
- bias-disable;
- };
- pinconf_cs {
- pins = "gpio10";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
};
spi3_sleep: spi3_sleep {
@@ -161,11 +96,6 @@
function = "gpio";
pins = "gpio8", "gpio9", "gpio10", "gpio11";
};
- pinconf {
- pins = "gpio8", "gpio9", "gpio10", "gpio11";
- drive-strength = <2>;
- bias-pull-down;
- };
};
spi4_default: spi4_default {
@@ -177,17 +107,6 @@
function = "gpio";
pins = "gpio14";
};
- pinconf {
- pins = "gpio12", "gpio13", "gpio15";
- drive-strength = <12>;
- bias-disable;
- };
- pinconf_cs {
- pins = "gpio14";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
};
spi4_sleep: spi4_sleep {
@@ -195,11 +114,6 @@
function = "gpio";
pins = "gpio12", "gpio13", "gpio14", "gpio15";
};
- pinconf {
- pins = "gpio12", "gpio13", "gpio14", "gpio15";
- drive-strength = <2>;
- bias-pull-down;
- };
};
spi5_default: spi5_default {
@@ -211,17 +125,6 @@
function = "gpio";
pins = "gpio18";
};
- pinconf {
- pins = "gpio16", "gpio17", "gpio19";
- drive-strength = <12>;
- bias-disable;
- };
- pinconf_cs {
- pins = "gpio18";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
};
spi5_sleep: spi5_sleep {
@@ -229,11 +132,6 @@
function = "gpio";
pins = "gpio16", "gpio17", "gpio18", "gpio19";
};
- pinconf {
- pins = "gpio16", "gpio17", "gpio18", "gpio19";
- drive-strength = <2>;
- bias-pull-down;
- };
};
spi6_default: spi6_default {
@@ -245,17 +143,6 @@
function = "gpio";
pins = "gpio22";
};
- pinconf {
- pins = "gpio20", "gpio21", "gpio23";
- drive-strength = <12>;
- bias-disable;
- };
- pinconf_cs {
- pins = "gpio22";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
};
spi6_sleep: spi6_sleep {
@@ -263,11 +150,6 @@
function = "gpio";
pins = "gpio20", "gpio21", "gpio22", "gpio23";
};
- pinconf {
- pins = "gpio20", "gpio21", "gpio22", "gpio23";
- drive-strength = <2>;
- bias-pull-down;
- };
};
i2c2_default: i2c2_default {
@@ -275,11 +157,6 @@
function = "blsp_i2c2";
pins = "gpio6", "gpio7";
};
- pinconf {
- pins = "gpio6", "gpio7";
- drive-strength = <16>;
- bias-disable;
- };
};
i2c2_sleep: i2c2_sleep {
@@ -287,11 +164,6 @@
function = "gpio";
pins = "gpio6", "gpio7";
};
- pinconf {
- pins = "gpio6", "gpio7";
- drive-strength = <2>;
- bias-disable;
- };
};
i2c4_default: i2c4_default {
@@ -299,11 +171,6 @@
function = "blsp_i2c4";
pins = "gpio14", "gpio15";
};
- pinconf {
- pins = "gpio14", "gpio15";
- drive-strength = <16>;
- bias-disable;
- };
};
i2c4_sleep: i2c4_sleep {
@@ -311,11 +178,6 @@
function = "gpio";
pins = "gpio14", "gpio15";
};
- pinconf {
- pins = "gpio14", "gpio15";
- drive-strength = <2>;
- bias-disable;
- };
};
i2c6_default: i2c6_default {
@@ -323,11 +185,6 @@
function = "blsp_i2c6";
pins = "gpio22", "gpio23";
};
- pinconf {
- pins = "gpio22", "gpio23";
- drive-strength = <16>;
- bias-disable;
- };
};
i2c6_sleep: i2c6_sleep {
@@ -335,11 +192,6 @@
function = "gpio";
pins = "gpio22", "gpio23";
};
- pinconf {
- pins = "gpio22", "gpio23";
- drive-strength = <2>;
- bias-disable;
- };
};
sdhc2_cd_pin {
@@ -348,22 +200,12 @@
function = "gpio";
pins = "gpio38";
};
- pinconf {
- pins = "gpio38";
- drive-strength = <2>;
- bias-pull-up;
- };
};
sdc2_cd_off: cd_off {
pinmux {
function = "gpio";
pins = "gpio38";
};
- pinconf {
- pins = "gpio38";
- drive-strength = <2>;
- bias-disable;
- };
};
};
@@ -372,21 +214,11 @@
pinmux {
pins = "sdc1_clk";
};
- pinconf {
- pins = "sdc1_clk";
- bias-disable;
- drive-strength = <16>;
- };
};
sdc1_clk_off: clk_off {
pinmux {
pins = "sdc1_clk";
};
- pinconf {
- pins = "sdc1_clk";
- bias-disable;
- drive-strength = <2>;
- };
};
};
@@ -395,21 +227,11 @@
pinmux {
pins = "sdc1_cmd";
};
- pinconf {
- pins = "sdc1_cmd";
- bias-pull-up;
- drive-strength = <10>;
- };
};
sdc1_cmd_off: cmd_off {
pinmux {
pins = "sdc1_cmd";
};
- pinconf {
- pins = "sdc1_cmd";
- bias-pull-up;
- drive-strength = <2>;
- };
};
};
@@ -418,21 +240,11 @@
pinmux {
pins = "sdc1_data";
};
- pinconf {
- pins = "sdc1_data";
- bias-pull-up;
- drive-strength = <10>;
- };
};
sdc1_data_off: data_off {
pinmux {
pins = "sdc1_data";
};
- pinconf {
- pins = "sdc1_data";
- bias-pull-up;
- drive-strength = <2>;
- };
};
};
@@ -441,21 +253,11 @@
pinmux {
pins = "sdc2_clk";
};
- pinconf {
- pins = "sdc2_clk";
- bias-disable;
- drive-strength = <16>;
- };
};
sdc2_clk_off: clk_off {
pinmux {
pins = "sdc2_clk";
};
- pinconf {
- pins = "sdc2_clk";
- bias-disable;
- drive-strength = <2>;
- };
};
};
@@ -464,21 +266,11 @@
pinmux {
pins = "sdc2_cmd";
};
- pinconf {
- pins = "sdc2_cmd";
- bias-pull-up;
- drive-strength = <10>;
- };
};
sdc2_cmd_off: cmd_off {
pinmux {
pins = "sdc2_cmd";
};
- pinconf {
- pins = "sdc2_cmd";
- bias-pull-up;
- drive-strength = <2>;
- };
};
};
@@ -487,21 +279,11 @@
pinmux {
pins = "sdc2_data";
};
- pinconf {
- pins = "sdc2_data";
- bias-pull-up;
- drive-strength = <10>;
- };
};
sdc2_data_off: data_off {
pinmux {
pins = "sdc2_data";
};
- pinconf {
- pins = "sdc2_data";
- bias-pull-up;
- drive-strength = <2>;
- };
};
};
@@ -512,12 +294,6 @@
pins = "gpio63", "gpio64", "gpio65", "gpio66",
"gpio67", "gpio68";
};
- pinconf {
- pins = "gpio63", "gpio64", "gpio65", "gpio66",
- "gpio67", "gpio68";
- drive-strength = <8>;
- bias-pull-none;
- };
};
cdc_pdm_lines_sus: pdm_lines_off {
pinmux {
@@ -525,12 +301,6 @@
pins = "gpio63", "gpio64", "gpio65", "gpio66",
"gpio67", "gpio68";
};
- pinconf {
- pins = "gpio63", "gpio64", "gpio65", "gpio66",
- "gpio67", "gpio68";
- drive-strength = <2>;
- bias-disable;
- };
};
};
@@ -596,22 +366,12 @@
function = "pri_mi2s";
pins = "gpio116";
};
- pinconf {
- pins = "gpio116";
- drive-strength = <8>;
- bias-pull-none;
- };
};
ext_mclk_tlmm_lines_sus: mclk_lines_off {
pinmux {
function = "pri_mi2s";
pins = "gpio116";
};
- pinconf {
- pins = "gpio116";
- drive-strength = <2>;
- bias-disable;
- };
};
};
@@ -623,12 +383,6 @@
pins = "gpio112", "gpio117", "gpio118",
"gpio119";
};
- pinconf {
- pins = "gpio112", "gpio117", "gpio118",
- "gpio119";
- drive-strength = <8>;
- bias-pull-none;
- };
};
ext_sec_tlmm_lines_sus: tlmm_lines_off {
pinmux {
@@ -636,12 +390,6 @@
pins = "gpio112", "gpio117", "gpio118",
"gpio119";
};
- pinconf {
- pins = "gpio112", "gpio117", "gpio118",
- "gpio119";
- drive-strength = <2>;
- bias-disable;
- };
};
};
@@ -682,11 +430,5 @@
pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44";
function = "wcss_wlan";
};
-
- pinconf {
- pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44";
- drive-strength = <6>;
- bias-pull-up;
- };
};
};
--
2.15.0
Signed-off-by: Damien Riegel <[email protected]>
---
Changes in v2:
- Reworded commit title
- Changed size to 0x500
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 48 ++++++++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 42 ++++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/msm8916.dtsi | 45 ++++++++++++++++++++++++++++
3 files changed, 135 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 53c1ddd281a4..11305015ba0b 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -630,6 +630,22 @@
};
};
+&i2c1_default {
+ pinconf {
+ pins = "gpio2", "gpio3";
+ drive-strength = <16>;
+ bias-disable;
+ };
+};
+
+&i2c1_sleep {
+ pinconf {
+ pins = "gpio2", "gpio3";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
&i2c2_default {
pinconf {
pins = "gpio6", "gpio7";
@@ -646,6 +662,22 @@
};
};
+&i2c3_default {
+ pinconf {
+ pins = "gpio10", "gpio11";
+ drive-strength = <16>;
+ bias-disable;
+ };
+};
+
+&i2c3_sleep {
+ pinconf {
+ pins = "gpio10", "gpio11";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
&i2c4_default {
pinconf {
pins = "gpio14", "gpio15";
@@ -662,6 +694,22 @@
};
};
+&i2c5_default {
+ pinconf {
+ pins = "gpio18", "gpio19";
+ drive-strength = <16>;
+ bias-disable;
+ };
+};
+
+&i2c5_sleep {
+ pinconf {
+ pins = "gpio18", "gpio19";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
&i2c6_default {
pinconf {
pins = "gpio22", "gpio23";
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 7704ddecb6c4..44e68860fc8c 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -152,6 +152,20 @@
};
};
+ i2c1_default: i2c1_default {
+ pinmux {
+ function = "blsp_i2c1";
+ pins = "gpio2", "gpio3";
+ };
+ };
+
+ i2c1_sleep: i2c1_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio2", "gpio3";
+ };
+ };
+
i2c2_default: i2c2_default {
pinmux {
function = "blsp_i2c2";
@@ -166,6 +180,20 @@
};
};
+ i2c3_default: i2c3_default {
+ pinmux {
+ function = "blsp_i2c3";
+ pins = "gpio10", "gpio11";
+ };
+ };
+
+ i2c3_sleep: i2c3_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio10", "gpio11";
+ };
+ };
+
i2c4_default: i2c4_default {
pinmux {
function = "blsp_i2c4";
@@ -180,6 +208,20 @@
};
};
+ i2c5_default: i2c5_default {
+ pinmux {
+ function = "blsp_i2c5";
+ pins = "gpio18", "gpio19";
+ };
+ };
+
+ i2c5_sleep: i2c5_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio18", "gpio19";
+ };
+ };
+
i2c6_default: i2c6_default {
pinmux {
function = "blsp_i2c6";
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index ac440f287633..7478c7337995 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -455,6 +455,21 @@
status = "disabled";
};
+ blsp_i2c1: i2c@78b5000 {
+ compatible = "qcom,i2c-qup-v2.2.1";
+ reg = <0x078b5000 0x500>;
+ interrupts = <GIC_SPI 95 0>;
+ clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+ <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>;
+ clock-names = "iface", "core";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&i2c1_default>;
+ pinctrl-1 = <&i2c1_sleep>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
blsp_i2c2: i2c@78b6000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x078b6000 0x500>;
@@ -470,6 +485,21 @@
status = "disabled";
};
+ blsp_i2c3: i2c@78b7000 {
+ compatible = "qcom,i2c-qup-v2.2.1";
+ reg = <0x078b7000 0x500>;
+ interrupts = <GIC_SPI 97 0>;
+ clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+ <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;
+ clock-names = "iface", "core";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&i2c3_default>;
+ pinctrl-1 = <&i2c3_sleep>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
blsp_i2c4: i2c@78b8000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x078b8000 0x500>;
@@ -485,6 +515,21 @@
status = "disabled";
};
+ blsp_i2c5: i2c@78b9000 {
+ compatible = "qcom,i2c-qup-v2.2.1";
+ reg = <0x078b9000 0x500>;
+ interrupts = <GIC_SPI 99 0>;
+ clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+ <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>;
+ clock-names = "iface", "core";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&i2c5_default>;
+ pinctrl-1 = <&i2c5_sleep>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
blsp_i2c6: i2c@78ba000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x078ba000 0x500>;
--
2.15.0
Indentation did not respect kernel standards, so fix that for the usual
indent with tabs, align with spaces. While at it, remove some empty
lines before and after the closing parenthesis of this block.
Signed-off-by: Damien Riegel <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
---
Changes in v2:
- Added Reviewed-by Bjorn Andersson
arch/arm64/boot/dts/qcom/pm8916.dtsi | 82 ++++++++++++++++++------------------
1 file changed, 40 insertions(+), 42 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/pm8916.dtsi b/arch/arm64/boot/dts/qcom/pm8916.dtsi
index 53deebf9f515..d19f4cb9a5f3 100644
--- a/arch/arm64/boot/dts/qcom/pm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8916.dtsi
@@ -96,47 +96,45 @@
#address-cells = <1>;
#size-cells = <0>;
- wcd_codec: codec@f000 {
- compatible = "qcom,pm8916-wcd-analog-codec";
- reg = <0xf000 0x200>;
- reg-names = "pmic-codec-core";
- clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;
- clock-names = "mclk";
- interrupt-parent = <&spmi_bus>;
- interrupts = <0x1 0xf0 0x0 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x1 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x2 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x3 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x4 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x5 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x6 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x7 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x0 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x1 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x2 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x3 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x4 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x5 IRQ_TYPE_NONE>;
- interrupt-names = "cdc_spk_cnp_int",
- "cdc_spk_clip_int",
- "cdc_spk_ocp_int",
- "mbhc_ins_rem_det1",
- "mbhc_but_rel_det",
- "mbhc_but_press_det",
- "mbhc_ins_rem_det",
- "mbhc_switch_int",
- "cdc_ear_ocp_int",
- "cdc_hphr_ocp_int",
- "cdc_hphl_ocp_det",
- "cdc_ear_cnp_int",
- "cdc_hphr_cnp_int",
- "cdc_hphl_cnp_int";
- vdd-cdc-io-supply = <&pm8916_l5>;
- vdd-cdc-tx-rx-cx-supply = <&pm8916_l5>;
- vdd-micbias-supply = <&pm8916_l13>;
- #sound-dai-cells = <1>;
-
- };
-
+ wcd_codec: codec@f000 {
+ compatible = "qcom,pm8916-wcd-analog-codec";
+ reg = <0xf000 0x200>;
+ reg-names = "pmic-codec-core";
+ clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;
+ clock-names = "mclk";
+ interrupt-parent = <&spmi_bus>;
+ interrupts = <0x1 0xf0 0x0 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x1 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x2 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x3 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x4 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x5 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x6 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x7 IRQ_TYPE_NONE>,
+ <0x1 0xf1 0x0 IRQ_TYPE_NONE>,
+ <0x1 0xf1 0x1 IRQ_TYPE_NONE>,
+ <0x1 0xf1 0x2 IRQ_TYPE_NONE>,
+ <0x1 0xf1 0x3 IRQ_TYPE_NONE>,
+ <0x1 0xf1 0x4 IRQ_TYPE_NONE>,
+ <0x1 0xf1 0x5 IRQ_TYPE_NONE>;
+ interrupt-names = "cdc_spk_cnp_int",
+ "cdc_spk_clip_int",
+ "cdc_spk_ocp_int",
+ "mbhc_ins_rem_det1",
+ "mbhc_but_rel_det",
+ "mbhc_but_press_det",
+ "mbhc_ins_rem_det",
+ "mbhc_switch_int",
+ "cdc_ear_ocp_int",
+ "cdc_hphr_ocp_int",
+ "cdc_hphl_ocp_det",
+ "cdc_ear_cnp_int",
+ "cdc_hphr_cnp_int",
+ "cdc_hphl_cnp_int";
+ vdd-cdc-io-supply = <&pm8916_l5>;
+ vdd-cdc-tx-rx-cx-supply = <&pm8916_l5>;
+ vdd-micbias-supply = <&pm8916_l13>;
+ #sound-dai-cells = <1>;
+ };
};
};
--
2.15.0
This node was the only one that didn't have the same set of pins in
active and suspend mode.
Signed-off-by: Damien Riegel <[email protected]>
---
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index c67ad8ed8b60..10fc1fc90682 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -687,6 +687,14 @@
};
};
cdc_dmic_lines_sus: dmic_lines_off {
+ pinmux_dmic0_clk {
+ function = "dmic0_clk";
+ pins = "gpio0";
+ };
+ pinmux_dmic0_data {
+ function = "dmic0_data";
+ pins = "gpio1";
+ };
pinconf {
pins = "gpio0", "gpio1";
drive-strength = <2>;
--
2.15.0
On Thu 07 Dec 07:19 PST 2017, Damien Riegel wrote:
> These nodes reserve and configure some pins as GPIOs. They are not
> generic pinctrls, they actually belong to board files but they are not
> used by any other node, so just drop them altogether.
>
> Signed-off-by: Damien Riegel <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
Let's introduce them back into the db410c when we define a client.
Regards,
Bjorn
On Thu 07 Dec 07:19 PST 2017, Damien Riegel wrote:
> Also, it was using whitespaces for indentation on some lines, fix that
> while moving it.
>
> Signed-off-by: Damien Riegel <[email protected]>
Rather than extending single nodes like this I would prefer that we
bring in the associated pmic node, by this we avoid just having a huge
flat list of nodes. I.e. that we make this:
&pm8916_1 {
codec@f000 {
status = "okay";
clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;
clock-names = "mclk";
qcom,mbhc-vthreshold-low = <75 150 237 450 500>;
qcom,mbhc-vthreshold-high = <75 150 237 450 500>;
};
};
Regards,
Bjorn
On Thu 07 Dec 07:19 PST 2017, Damien Riegel wrote:
> Following a suggestion from Bjorn Andersson [1], this commit moves
> electrical specifications which were defined in mms8916-pins.dtsi to
> board files, where they actually belong.
>
> Pinmuxing is kept in the platform file because there are no alternative
> pins on which all these functions could be routed, so this part is
> indeed common to all boards using this SoC.
>
> [1] https://www.spinics.net/lists/devicetree/msg201764.html
>
> Signed-off-by: Damien Riegel <[email protected]>
> Suggested-by: Bjorn Andersson <[email protected]>
I like the move, but I would prefer that you mimic the base structure,
rather than just appending properties based on labels.
Regards,
Bjorn
On Thu 07 Dec 07:19 PST 2017, Damien Riegel wrote:
> This commit drops pin configs that cannot be moved to board files as
> no boards use them.
>
> Signed-off-by: Damien Riegel <[email protected]>
Acked-by: Bjorn Andersson <[email protected]>
Regards,
Bjorn
On Thu 07 Dec 07:19 PST 2017, Damien Riegel wrote:
> Nodes relative to the first sdhc node were interlaced with node of the
> second sdhc. Move sdhc2_cd_pin with its siblings to prevent that. Also
> rename the grouping node from sdhc2_cd_pin to pmx_sdc2_cd_pin, as
> "pmx_sdc" is the prefix used by other nodes.
>
> Signed-off-by: Damien Riegel <[email protected]>
Acked-by: Bjorn Andersson <[email protected]>
Regards,
Bjorn
On Thu 07 Dec 07:19 PST 2017, Damien Riegel wrote:
> The QUP core can be used either for I2C or SPI, so the same IP is mapped
> by a driver or the other. SPI bindings use a leading 0 for the start
> address and a size of 0x600, I2C bindings don't have the leading 0 and
> have a size 0x1000.
>
> To make them more similar, add the leading 0 to I2C bindings and changes
> the size to 0x500 for all of them, as this is the actual size of these
> blocks. Also align the second entry of the clocks array.
>
> Signed-off-by: Damien Riegel <[email protected]>
Acked-by: Bjorn Andersson <[email protected]>
Regards,
Bjorn
On Thu 07 Dec 07:19 PST 2017, Damien Riegel wrote:
> Signed-off-by: Damien Riegel <[email protected]>
Please move pinconf settings into the structure in
apq8016-sbc-soc-pins.dtsi (didn't see this when commenting on the
previous patch).
Apart from this, the patch looks good.
Regards,
Bjorn
> ---
> Changes in v2:
> - Reworded commit title
> - Changed size to 0x500
>
> arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 48 ++++++++++++++++++++++++++++++
> arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 42 ++++++++++++++++++++++++++
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 45 ++++++++++++++++++++++++++++
> 3 files changed, 135 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
> index 53c1ddd281a4..11305015ba0b 100644
> --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
> +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
> @@ -630,6 +630,22 @@
> };
> };
>
> +&i2c1_default {
> + pinconf {
> + pins = "gpio2", "gpio3";
> + drive-strength = <16>;
> + bias-disable;
> + };
> +};
> +
> +&i2c1_sleep {
> + pinconf {
> + pins = "gpio2", "gpio3";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +};
> +
> &i2c2_default {
> pinconf {
> pins = "gpio6", "gpio7";
> @@ -646,6 +662,22 @@
> };
> };
>
> +&i2c3_default {
> + pinconf {
> + pins = "gpio10", "gpio11";
> + drive-strength = <16>;
> + bias-disable;
> + };
> +};
> +
> +&i2c3_sleep {
> + pinconf {
> + pins = "gpio10", "gpio11";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +};
> +
> &i2c4_default {
> pinconf {
> pins = "gpio14", "gpio15";
> @@ -662,6 +694,22 @@
> };
> };
>
> +&i2c5_default {
> + pinconf {
> + pins = "gpio18", "gpio19";
> + drive-strength = <16>;
> + bias-disable;
> + };
> +};
> +
> +&i2c5_sleep {
> + pinconf {
> + pins = "gpio18", "gpio19";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +};
> +
> &i2c6_default {
> pinconf {
> pins = "gpio22", "gpio23";
> diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
> index 7704ddecb6c4..44e68860fc8c 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
> @@ -152,6 +152,20 @@
> };
> };
>
> + i2c1_default: i2c1_default {
> + pinmux {
> + function = "blsp_i2c1";
> + pins = "gpio2", "gpio3";
> + };
> + };
> +
> + i2c1_sleep: i2c1_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio2", "gpio3";
> + };
> + };
> +
> i2c2_default: i2c2_default {
> pinmux {
> function = "blsp_i2c2";
> @@ -166,6 +180,20 @@
> };
> };
>
> + i2c3_default: i2c3_default {
> + pinmux {
> + function = "blsp_i2c3";
> + pins = "gpio10", "gpio11";
> + };
> + };
> +
> + i2c3_sleep: i2c3_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio10", "gpio11";
> + };
> + };
> +
> i2c4_default: i2c4_default {
> pinmux {
> function = "blsp_i2c4";
> @@ -180,6 +208,20 @@
> };
> };
>
> + i2c5_default: i2c5_default {
> + pinmux {
> + function = "blsp_i2c5";
> + pins = "gpio18", "gpio19";
> + };
> + };
> +
> + i2c5_sleep: i2c5_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio18", "gpio19";
> + };
> + };
> +
> i2c6_default: i2c6_default {
> pinmux {
> function = "blsp_i2c6";
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index ac440f287633..7478c7337995 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -455,6 +455,21 @@
> status = "disabled";
> };
>
> + blsp_i2c1: i2c@78b5000 {
> + compatible = "qcom,i2c-qup-v2.2.1";
> + reg = <0x078b5000 0x500>;
> + interrupts = <GIC_SPI 95 0>;
> + clocks = <&gcc GCC_BLSP1_AHB_CLK>,
> + <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>;
> + clock-names = "iface", "core";
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&i2c1_default>;
> + pinctrl-1 = <&i2c1_sleep>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> blsp_i2c2: i2c@78b6000 {
> compatible = "qcom,i2c-qup-v2.2.1";
> reg = <0x078b6000 0x500>;
> @@ -470,6 +485,21 @@
> status = "disabled";
> };
>
> + blsp_i2c3: i2c@78b7000 {
> + compatible = "qcom,i2c-qup-v2.2.1";
> + reg = <0x078b7000 0x500>;
> + interrupts = <GIC_SPI 97 0>;
> + clocks = <&gcc GCC_BLSP1_AHB_CLK>,
> + <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;
> + clock-names = "iface", "core";
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&i2c3_default>;
> + pinctrl-1 = <&i2c3_sleep>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> blsp_i2c4: i2c@78b8000 {
> compatible = "qcom,i2c-qup-v2.2.1";
> reg = <0x078b8000 0x500>;
> @@ -485,6 +515,21 @@
> status = "disabled";
> };
>
> + blsp_i2c5: i2c@78b9000 {
> + compatible = "qcom,i2c-qup-v2.2.1";
> + reg = <0x078b9000 0x500>;
> + interrupts = <GIC_SPI 99 0>;
> + clocks = <&gcc GCC_BLSP1_AHB_CLK>,
> + <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>;
> + clock-names = "iface", "core";
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&i2c5_default>;
> + pinctrl-1 = <&i2c5_sleep>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> blsp_i2c6: i2c@78ba000 {
> compatible = "qcom,i2c-qup-v2.2.1";
> reg = <0x078ba000 0x500>;
> --
> 2.15.0
>