Patches serie add support or RNG, CRYP and CRC IPs for stm32mp157c SoC
and add RNG default support for ev1 board.
Lionel Debieve (4):
ARM: dts: stm32: Add RNG support on stm32mp157c
ARM: dts: stm32: Enable RNG for stm32mp157c-ed1
ARM: dts: stm32: Add CRYP support on stm32mp157c
ARM: dts: stm32: Add CRC support on stm32mp157c
arch/arm/boot/dts/stm32mp157c-ed1.dts | 4 ++++
arch/arm/boot/dts/stm32mp157c.dtsi | 25 +++++++++++++++++++++++++
2 files changed, 29 insertions(+)
--
2.15.1
This patch add RNG instance of the stm32mp157c SoC
Signed-off-by: Lionel Debieve <[email protected]>
---
arch/arm/boot/dts/stm32mp157c.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index bc3eddc3eda6..bf00885971b3 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -5,6 +5,7 @@
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/stm32mp1-clks.h>
+#include <dt-bindings/reset/stm32mp1-resets.h>
/ {
#address-cells = <1>;
@@ -167,6 +168,14 @@
#reset-cells = <1>;
};
+ rng1: rng@54003000 {
+ compatible = "st,stm32-rng";
+ reg = <0x54003000 0x400>;
+ clocks = <&rcc RNG1_K>;
+ resets = <&rcc RNG1_R>;
+ status = "disabled";
+ };
+
usart1: serial@5c000000 {
compatible = "st,stm32h7-uart";
reg = <0x5c000000 0x400>;
--
2.15.1
Enable stm32-hwrng for ed1 and ev1 boards
Signed-off-by: Lionel Debieve <[email protected]>
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts b/arch/arm/boot/dts/stm32mp157c-ed1.dts
index 9f90337a22e3..2a992525919c 100644
--- a/arch/arm/boot/dts/stm32mp157c-ed1.dts
+++ b/arch/arm/boot/dts/stm32mp157c-ed1.dts
@@ -25,6 +25,10 @@
};
};
+&rng1 {
+ status = "okay";
+};
+
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins_a>;
--
2.15.1
This patch add CRYP instance of the stm32mp157c SoC
Signed-off-by: Lionel Debieve <[email protected]>
---
arch/arm/boot/dts/stm32mp157c.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index bf00885971b3..5ce7d28f8a1f 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -168,6 +168,15 @@
#reset-cells = <1>;
};
+ cryp1: cryp@54001000 {
+ compatible = "st,stm32mp1-cryp";
+ reg = <0x54001000 0x400>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc CRYP1>;
+ resets = <&rcc CRYP1_R>;
+ status = "disabled";
+ };
+
rng1: rng@54003000 {
compatible = "st,stm32-rng";
reg = <0x54003000 0x400>;
--
2.15.1
This patch add CRC instance of the stm32mp157c SoC
Signed-off-by: Lionel Debieve <[email protected]>
---
arch/arm/boot/dts/stm32mp157c.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index 5ce7d28f8a1f..2962decacd87 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -185,6 +185,13 @@
status = "disabled";
};
+ crc1: crc@58009000 {
+ compatible = "st,stm32f7-crc";
+ reg = <0x58009000 0x400>;
+ clocks = <&rcc CRC1>;
+ status = "disabled";
+ };
+
usart1: serial@5c000000 {
compatible = "st,stm32h7-uart";
reg = <0x5c000000 0x400>;
--
2.15.1
Hi Lionel,
On 04/23/2018 05:19 PM, Lionel Debieve wrote:
> Patches serie add support or RNG, CRYP and CRC IPs for stm32mp157c SoC
> and add RNG default support for ev1 board.
>
> Lionel Debieve (4):
> ARM: dts: stm32: Add RNG support on stm32mp157c
> ARM: dts: stm32: Enable RNG for stm32mp157c-ed1
> ARM: dts: stm32: Add CRYP support on stm32mp157c
> ARM: dts: stm32: Add CRC support on stm32mp157c
>
> arch/arm/boot/dts/stm32mp157c-ed1.dts | 4 ++++
> arch/arm/boot/dts/stm32mp157c.dtsi | 25 +++++++++++++++++++++++++
> 2 files changed, 29 insertions(+)
>
Series applied on stm32-next.
Regards
Alex