2018-06-27 20:39:41

by Robert Jarzmik

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Subject: [PATCH v4 1/2] clk: pxa: export 32kHz PLL

This clock is especially used by the RTC driver, so export it so that
devicetree users can use it.

Signed-off-by: Robert Jarzmik <[email protected]>
---
Since v2: fix missing parenthesis in clk-pxa25x.c and clk-pxa3xx.c
---
drivers/clk/pxa/clk-pxa25x.c | 6 ++++--
drivers/clk/pxa/clk-pxa27x.c | 7 ++++---
drivers/clk/pxa/clk-pxa3xx.c | 7 ++++---
include/dt-bindings/clock/pxa-clock.h | 3 ++-
4 files changed, 14 insertions(+), 9 deletions(-)

diff --git a/drivers/clk/pxa/clk-pxa25x.c b/drivers/clk/pxa/clk-pxa25x.c
index 6416c1f8e632..e88f8e01fe3a 100644
--- a/drivers/clk/pxa/clk-pxa25x.c
+++ b/drivers/clk/pxa/clk-pxa25x.c
@@ -292,8 +292,10 @@ static void __init pxa25x_register_plls(void)
{
clk_register_fixed_rate(NULL, "osc_3_6864mhz", NULL,
CLK_GET_RATE_NOCACHE, 3686400);
- clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,
- CLK_GET_RATE_NOCACHE, 32768);
+ clkdev_pxa_register(CLK_OSC32k768, "osc_32_768khz", NULL,
+ clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,
+ CLK_GET_RATE_NOCACHE,
+ 32768));
clk_register_fixed_rate(NULL, "clk_dummy", NULL, 0, 0);
clk_register_fixed_factor(NULL, "ppll_95_85mhz", "osc_3_6864mhz",
0, 26, 1);
diff --git a/drivers/clk/pxa/clk-pxa27x.c b/drivers/clk/pxa/clk-pxa27x.c
index 25a30194d27a..d40b63e7bbce 100644
--- a/drivers/clk/pxa/clk-pxa27x.c
+++ b/drivers/clk/pxa/clk-pxa27x.c
@@ -314,9 +314,10 @@ static void __init pxa27x_register_plls(void)
clk_register_fixed_rate(NULL, "osc_13mhz", NULL,
CLK_GET_RATE_NOCACHE,
13 * MHz);
- clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,
- CLK_GET_RATE_NOCACHE,
- 32768 * KHz);
+ clkdev_pxa_register(CLK_OSC32k768, "osc_32_768khz", NULL,
+ clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,
+ CLK_GET_RATE_NOCACHE,
+ 32768 * KHz));
clk_register_fixed_rate(NULL, "clk_dummy", NULL, 0, 0);
clk_register_fixed_factor(NULL, "ppll_312mhz", "osc_13mhz", 0, 24, 1);
}
diff --git a/drivers/clk/pxa/clk-pxa3xx.c b/drivers/clk/pxa/clk-pxa3xx.c
index 2d126df2bccd..7aa120c3bd08 100644
--- a/drivers/clk/pxa/clk-pxa3xx.c
+++ b/drivers/clk/pxa/clk-pxa3xx.c
@@ -286,9 +286,10 @@ static void __init pxa3xx_register_plls(void)
clk_register_fixed_rate(NULL, "osc_13mhz", NULL,
CLK_GET_RATE_NOCACHE,
13 * MHz);
- clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,
- CLK_GET_RATE_NOCACHE,
- 32768);
+ clkdev_pxa_register(CLK_OSC32k768, "osc_32_768khz", NULL,
+ clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,
+ CLK_GET_RATE_NOCACHE,
+ 32768));
clk_register_fixed_rate(NULL, "ring_osc_120mhz", NULL,
CLK_GET_RATE_NOCACHE,
120 * MHz);
diff --git a/include/dt-bindings/clock/pxa-clock.h b/include/dt-bindings/clock/pxa-clock.h
index e65803b1dc7e..0b0fd2b01538 100644
--- a/include/dt-bindings/clock/pxa-clock.h
+++ b/include/dt-bindings/clock/pxa-clock.h
@@ -72,6 +72,7 @@
#define CLK_USIM 58
#define CLK_USIM1 59
#define CLK_USMI0 60
-#define CLK_MAX 61
+#define CLK_OSC32k768 61
+#define CLK_MAX 62

#endif
--
2.11.0



2018-06-27 20:38:14

by Robert Jarzmik

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Subject: [PATCH v4 2/2] ARM: dts: pxa: fix the rtc controller

The RTC controller is fed by an external fixed 32kHz clock. Yet the
driver wants to acquire this clock, even though it doesn't make any use
of it, ie. doesn't get the rate to make calculation.

Therefore, use the exported 32.768kHz clock in the PXA clock tree to
make the driver happy and working.

Signed-off-by: Robert Jarzmik <[email protected]>
---
Since v1: change the dummy clock by the actual 32.768kHz
Since v3: remove spurious bracket
---
arch/arm/boot/dts/pxa25x.dtsi | 4 ++++
arch/arm/boot/dts/pxa27x.dtsi | 4 ++++
2 files changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/pxa25x.dtsi b/arch/arm/boot/dts/pxa25x.dtsi
index 95d59be97213..8494b5787170 100644
--- a/arch/arm/boot/dts/pxa25x.dtsi
+++ b/arch/arm/boot/dts/pxa25x.dtsi
@@ -80,6 +80,10 @@
#pwm-cells = <1>;
clocks = <&clks CLK_PWM1>;
};
+
+ rtc@40900000 {
+ clocks = <&clks CLK_OSC32k768>;
+ };
};

timer@40a00000 {
diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi
index 747f750f675d..2ab6986433c8 100644
--- a/arch/arm/boot/dts/pxa27x.dtsi
+++ b/arch/arm/boot/dts/pxa27x.dtsi
@@ -113,6 +113,10 @@

status = "disabled";
};
+
+ rtc@40900000 {
+ clocks = <&clks CLK_OSC32k768>;
+ };
};

clocks {
--
2.11.0


2018-06-27 21:46:24

by Rob Herring

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Subject: Re: [PATCH v4 2/2] ARM: dts: pxa: fix the rtc controller

On Wed, Jun 27, 2018 at 1:41 PM Robert Jarzmik <[email protected]> wrote:
>
> The RTC controller is fed by an external fixed 32kHz clock. Yet the
> driver wants to acquire this clock, even though it doesn't make any use
> of it, ie. doesn't get the rate to make calculation.
>
> Therefore, use the exported 32.768kHz clock in the PXA clock tree to
> make the driver happy and working.
>
> Signed-off-by: Robert Jarzmik <[email protected]>
> ---
> Since v1: change the dummy clock by the actual 32.768kHz
> Since v3: remove spurious bracket
> ---
> arch/arm/boot/dts/pxa25x.dtsi | 4 ++++
> arch/arm/boot/dts/pxa27x.dtsi | 4 ++++
> 2 files changed, 8 insertions(+)

Reviewed-by: Rob Herring <[email protected]>

2018-07-06 20:54:24

by Stephen Boyd

[permalink] [raw]
Subject: Re: [PATCH v4 1/2] clk: pxa: export 32kHz PLL

Quoting Robert Jarzmik (2018-07-04 22:34:10)
> Robert Jarzmik <[email protected]> writes:
>
> > This clock is especially used by the RTC driver, so export it so that
> > devicetree users can use it.
> >
> > Signed-off-by: Robert Jarzmik <[email protected]>
> > ---
> > Since v2: fix missing parenthesis in clk-pxa25x.c and clk-pxa3xx.c
>
> Hi Michael and Stephen,
>
> Could you have a look please ?
>

I'll apply patch 1, and leave patch 2 to someone else?


2018-07-06 20:55:07

by Stephen Boyd

[permalink] [raw]
Subject: Re: [PATCH v4 1/2] clk: pxa: export 32kHz PLL

Quoting Robert Jarzmik (2018-06-27 12:41:23)
> This clock is especially used by the RTC driver, so export it so that
> devicetree users can use it.
>
> Signed-off-by: Robert Jarzmik <[email protected]>
> ---

Applied to clk-next


2018-07-07 19:31:40

by Robert Jarzmik

[permalink] [raw]
Subject: Re: [PATCH v4 1/2] clk: pxa: export 32kHz PLL

Stephen Boyd <[email protected]> writes:

> Quoting Robert Jarzmik (2018-07-04 22:34:10)
>> Robert Jarzmik <[email protected]> writes:
>>
>> > This clock is especially used by the RTC driver, so export it so that
>> > devicetree users can use it.
>> >
>> > Signed-off-by: Robert Jarzmik <[email protected]>
>> > ---
>> > Since v2: fix missing parenthesis in clk-pxa25x.c and clk-pxa3xx.c
>>
>> Hi Michael and Stephen,
>>
>> Could you have a look please ?
>>
>
> I'll apply patch 1, and leave patch 2 to someone else?
As there is a dependency of patch 2 on patch 1, and with the Reviewed-by
provided by Rob, I'd appreciate you take it as well. If not, I'll queue it up
for the next cycle in my pxa tree.

Cheers.

--
Robert