Hi Kishon, All,
As was discussed in [1] I'm posting series which introduces rework of
phy_set_mode to accept phy mode and submode. I've dropped TI specific patches as
this change is pretty big by itself.
Patch 1 is cumulative change which refactors PHY framework code to
support dual level PHYs mode configuration - PHY mode and PHY submode. It
extends .set_mode() callback to support additional parameter "int submode"
and converts all corresponding PHY drivers to support new .set_mode()
callback declaration.
The new extended PHY API
int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode)
is introduced to support dual level PHYs mode configuration and existing
phy_set_mode() API is converted to macros, so PHY framework consumers do
not need to be changed (~21 matches).
Patches 2-4: Add new PHY's mode to be used by Ethernet PHY interface drivers or
multipurpose PHYs like serdes and convert ocelot-serdes and mvebu-cp110-comphy
PHY drivers to use recently introduced PHY_MODE_ETHERNET and phy_set_mode_ext().
Patch 5 - removes unused, ethernet specific phy modes from enum phy_mode.
Testing:
- series tested on TI am335x/am437x/am5(dra7) paltforms.
- other driver build tested.
changes in v2:
- marvell PHY and net drivers updated as recommended by Russell King
v1: https://lkml.org/lkml/2018/11/8/260
[1] https://lkml.org/lkml/2018/10/25/366
Grygorii Strashko (5):
phy: core: rework phy_set_mode to accept phy mode and submode
phy: core: add PHY_MODE_ETHERNET
phy: ocelot-serdes: convert to use eth phy mode and submode
phy: mvebu-cp110-comphy: convert to use eth phy mode and submode
phy: core: clean up unused ethernet specific phy modes
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 19 +-----
drivers/net/ethernet/mscc/ocelot.c | 9 +--
drivers/phy/allwinner/phy-sun4i-usb.c | 3 +-
drivers/phy/amlogic/phy-meson-gxl-usb2.c | 5 +-
drivers/phy/amlogic/phy-meson-gxl-usb3.c | 5 +-
drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 86 ++++++++++++++-----------
drivers/phy/mediatek/phy-mtk-tphy.c | 2 +-
drivers/phy/mediatek/phy-mtk-xsphy.c | 2 +-
drivers/phy/mscc/phy-ocelot-serdes.c | 16 +++--
drivers/phy/phy-core.c | 6 +-
drivers/phy/qualcomm/phy-qcom-qmp.c | 3 +-
drivers/phy/qualcomm/phy-qcom-qusb2.c | 3 +-
drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.c | 3 +-
drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.c | 3 +-
drivers/phy/qualcomm/phy-qcom-usb-hs.c | 3 +-
drivers/phy/ti/phy-da8xx-usb.c | 3 +-
drivers/phy/ti/phy-tusb1210.c | 2 +-
include/linux/phy/phy.h | 18 ++++--
18 files changed, 100 insertions(+), 91 deletions(-)
--
2.10.5
Convert mvebu-cp110-comphy PHY driver to use recently introduced
PHY_MODE_ETHERNET and phy_set_mode_ext().
Signed-off-by: Grygorii Strashko <[email protected]>
---
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 19 +-----
drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 83 ++++++++++++++-----------
2 files changed, 48 insertions(+), 54 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
index 7a37a37..731793a 100644
--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
+++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
@@ -1165,28 +1165,13 @@ static void mvpp22_gop_setup_irq(struct mvpp2_port *port)
*/
static int mvpp22_comphy_init(struct mvpp2_port *port)
{
- enum phy_mode mode;
int ret;
if (!port->comphy)
return 0;
- switch (port->phy_interface) {
- case PHY_INTERFACE_MODE_SGMII:
- case PHY_INTERFACE_MODE_1000BASEX:
- mode = PHY_MODE_SGMII;
- break;
- case PHY_INTERFACE_MODE_2500BASEX:
- mode = PHY_MODE_2500SGMII;
- break;
- case PHY_INTERFACE_MODE_10GKR:
- mode = PHY_MODE_10GKR;
- break;
- default:
- return -EINVAL;
- }
-
- ret = phy_set_mode(port->comphy, mode);
+ ret = phy_set_mode_ext(port->comphy, PHY_MODE_ETHERNET,
+ port->phy_interface);
if (ret)
return ret;
diff --git a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
index 79b52c3..7dee72b 100644
--- a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
+++ b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
@@ -9,6 +9,7 @@
#include <linux/iopoll.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
+#include <linux/phy.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
@@ -131,26 +132,26 @@ struct mvebu_comhy_conf {
static const struct mvebu_comhy_conf mvebu_comphy_cp110_modes[] = {
/* lane 0 */
- MVEBU_COMPHY_CONF(0, 1, PHY_MODE_SGMII, 0x1),
- MVEBU_COMPHY_CONF(0, 1, PHY_MODE_2500SGMII, 0x1),
+ MVEBU_COMPHY_CONF(0, 1, PHY_INTERFACE_MODE_SGMII, 0x1),
+ MVEBU_COMPHY_CONF(0, 1, PHY_INTERFACE_MODE_2500BASEX, 0x1),
/* lane 1 */
- MVEBU_COMPHY_CONF(1, 2, PHY_MODE_SGMII, 0x1),
- MVEBU_COMPHY_CONF(1, 2, PHY_MODE_2500SGMII, 0x1),
+ MVEBU_COMPHY_CONF(1, 2, PHY_INTERFACE_MODE_SGMII, 0x1),
+ MVEBU_COMPHY_CONF(1, 2, PHY_INTERFACE_MODE_2500BASEX, 0x1),
/* lane 2 */
- MVEBU_COMPHY_CONF(2, 0, PHY_MODE_SGMII, 0x1),
- MVEBU_COMPHY_CONF(2, 0, PHY_MODE_2500SGMII, 0x1),
- MVEBU_COMPHY_CONF(2, 0, PHY_MODE_10GKR, 0x1),
+ MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_SGMII, 0x1),
+ MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_2500BASEX, 0x1),
+ MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_10GKR, 0x1),
/* lane 3 */
- MVEBU_COMPHY_CONF(3, 1, PHY_MODE_SGMII, 0x2),
- MVEBU_COMPHY_CONF(3, 1, PHY_MODE_2500SGMII, 0x2),
+ MVEBU_COMPHY_CONF(3, 1, PHY_INTERFACE_MODE_SGMII, 0x2),
+ MVEBU_COMPHY_CONF(3, 1, PHY_INTERFACE_MODE_2500BASEX, 0x2),
/* lane 4 */
- MVEBU_COMPHY_CONF(4, 0, PHY_MODE_SGMII, 0x2),
- MVEBU_COMPHY_CONF(4, 0, PHY_MODE_2500SGMII, 0x2),
- MVEBU_COMPHY_CONF(4, 0, PHY_MODE_10GKR, 0x2),
- MVEBU_COMPHY_CONF(4, 1, PHY_MODE_SGMII, 0x1),
+ MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_SGMII, 0x2),
+ MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_2500BASEX, 0x2),
+ MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_10GKR, 0x2),
+ MVEBU_COMPHY_CONF(4, 1, PHY_INTERFACE_MODE_SGMII, 0x1),
/* lane 5 */
- MVEBU_COMPHY_CONF(5, 2, PHY_MODE_SGMII, 0x1),
- MVEBU_COMPHY_CONF(5, 2, PHY_MODE_2500SGMII, 0x1),
+ MVEBU_COMPHY_CONF(5, 2, PHY_INTERFACE_MODE_SGMII, 0x1),
+ MVEBU_COMPHY_CONF(5, 2, PHY_INTERFACE_MODE_2500BASEX, 0x1),
};
struct mvebu_comphy_priv {
@@ -163,10 +164,12 @@ struct mvebu_comphy_lane {
struct mvebu_comphy_priv *priv;
unsigned id;
enum phy_mode mode;
+ int submode;
int port;
};
-static int mvebu_comphy_get_mux(int lane, int port, enum phy_mode mode)
+static int mvebu_comphy_get_mux(int lane, int port,
+ enum phy_mode mode, int submode)
{
int i, n = ARRAY_SIZE(mvebu_comphy_cp110_modes);
@@ -177,7 +180,7 @@ static int mvebu_comphy_get_mux(int lane, int port, enum phy_mode mode)
for (i = 0; i < n; i++) {
if (mvebu_comphy_cp110_modes[i].lane == lane &&
mvebu_comphy_cp110_modes[i].port == port &&
- mvebu_comphy_cp110_modes[i].mode == mode)
+ mvebu_comphy_cp110_modes[i].mode == submode)
break;
}
@@ -187,8 +190,7 @@ static int mvebu_comphy_get_mux(int lane, int port, enum phy_mode mode)
return mvebu_comphy_cp110_modes[i].mux;
}
-static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane,
- enum phy_mode mode)
+static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane)
{
struct mvebu_comphy_priv *priv = lane->priv;
u32 val;
@@ -206,14 +208,14 @@ static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane,
MVEBU_COMPHY_SERDES_CFG0_HALF_BUS |
MVEBU_COMPHY_SERDES_CFG0_GEN_RX(0xf) |
MVEBU_COMPHY_SERDES_CFG0_GEN_TX(0xf));
- if (mode == PHY_MODE_10GKR)
+ if (lane->submode == PHY_INTERFACE_MODE_10GKR)
val |= MVEBU_COMPHY_SERDES_CFG0_GEN_RX(0xe) |
MVEBU_COMPHY_SERDES_CFG0_GEN_TX(0xe);
- else if (mode == PHY_MODE_2500SGMII)
+ else if (lane->submode == PHY_INTERFACE_MODE_2500BASEX)
val |= MVEBU_COMPHY_SERDES_CFG0_GEN_RX(0x8) |
MVEBU_COMPHY_SERDES_CFG0_GEN_TX(0x8) |
MVEBU_COMPHY_SERDES_CFG0_HALF_BUS;
- else if (mode == PHY_MODE_SGMII)
+ else if (lane->submode == PHY_INTERFACE_MODE_SGMII)
val |= MVEBU_COMPHY_SERDES_CFG0_GEN_RX(0x6) |
MVEBU_COMPHY_SERDES_CFG0_GEN_TX(0x6) |
MVEBU_COMPHY_SERDES_CFG0_HALF_BUS;
@@ -243,7 +245,7 @@ static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane,
/* refclk selection */
val = readl(priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id));
val &= ~MVEBU_COMPHY_MISC_CTRL0_REFCLK_SEL;
- if (mode == PHY_MODE_10GKR)
+ if (lane->submode == PHY_INTERFACE_MODE_10GKR)
val |= MVEBU_COMPHY_MISC_CTRL0_ICP_FORCE;
writel(val, priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id));
@@ -261,8 +263,7 @@ static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane,
writel(val, priv->base + MVEBU_COMPHY_LOOPBACK(lane->id));
}
-static int mvebu_comphy_init_plls(struct mvebu_comphy_lane *lane,
- enum phy_mode mode)
+static int mvebu_comphy_init_plls(struct mvebu_comphy_lane *lane)
{
struct mvebu_comphy_priv *priv = lane->priv;
u32 val;
@@ -303,13 +304,13 @@ static int mvebu_comphy_init_plls(struct mvebu_comphy_lane *lane,
return 0;
}
-static int mvebu_comphy_set_mode_sgmii(struct phy *phy, enum phy_mode mode)
+static int mvebu_comphy_set_mode_sgmii(struct phy *phy)
{
struct mvebu_comphy_lane *lane = phy_get_drvdata(phy);
struct mvebu_comphy_priv *priv = lane->priv;
u32 val;
- mvebu_comphy_ethernet_init_reset(lane, mode);
+ mvebu_comphy_ethernet_init_reset(lane);
val = readl(priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id));
val &= ~MVEBU_COMPHY_RX_CTRL1_CLK8T_EN;
@@ -330,7 +331,7 @@ static int mvebu_comphy_set_mode_sgmii(struct phy *phy, enum phy_mode mode)
val |= MVEBU_COMPHY_GEN1_S0_TX_EMPH(0x1);
writel(val, priv->base + MVEBU_COMPHY_GEN1_S0(lane->id));
- return mvebu_comphy_init_plls(lane, PHY_MODE_SGMII);
+ return mvebu_comphy_init_plls(lane);
}
static int mvebu_comphy_set_mode_10gkr(struct phy *phy)
@@ -339,7 +340,7 @@ static int mvebu_comphy_set_mode_10gkr(struct phy *phy)
struct mvebu_comphy_priv *priv = lane->priv;
u32 val;
- mvebu_comphy_ethernet_init_reset(lane, PHY_MODE_10GKR);
+ mvebu_comphy_ethernet_init_reset(lane);
val = readl(priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id));
val |= MVEBU_COMPHY_RX_CTRL1_RXCLK2X_SEL |
@@ -469,7 +470,7 @@ static int mvebu_comphy_set_mode_10gkr(struct phy *phy)
val |= MVEBU_COMPHY_EXT_SELV_RX_SAMPL(0x1a);
writel(val, priv->base + MVEBU_COMPHY_EXT_SELV(lane->id));
- return mvebu_comphy_init_plls(lane, PHY_MODE_10GKR);
+ return mvebu_comphy_init_plls(lane);
}
static int mvebu_comphy_power_on(struct phy *phy)
@@ -479,7 +480,8 @@ static int mvebu_comphy_power_on(struct phy *phy)
int ret, mux;
u32 val;
- mux = mvebu_comphy_get_mux(lane->id, lane->port, lane->mode);
+ mux = mvebu_comphy_get_mux(lane->id, lane->port,
+ lane->mode, lane->submode);
if (mux < 0)
return -ENOTSUPP;
@@ -492,12 +494,12 @@ static int mvebu_comphy_power_on(struct phy *phy)
val |= mux << MVEBU_COMPHY_SELECTOR_PHY(lane->id);
regmap_write(priv->regmap, MVEBU_COMPHY_SELECTOR, val);
- switch (lane->mode) {
- case PHY_MODE_SGMII:
- case PHY_MODE_2500SGMII:
- ret = mvebu_comphy_set_mode_sgmii(phy, lane->mode);
+ switch (lane->submode) {
+ case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_2500BASEX:
+ ret = mvebu_comphy_set_mode_sgmii(phy);
break;
- case PHY_MODE_10GKR:
+ case PHY_INTERFACE_MODE_10GKR:
ret = mvebu_comphy_set_mode_10gkr(phy);
break;
default:
@@ -517,10 +519,17 @@ static int mvebu_comphy_set_mode(struct phy *phy,
{
struct mvebu_comphy_lane *lane = phy_get_drvdata(phy);
- if (mvebu_comphy_get_mux(lane->id, lane->port, mode) < 0)
+ if (mode != PHY_MODE_ETHERNET)
+ return -EINVAL;
+
+ if (submode == PHY_INTERFACE_MODE_1000BASEX)
+ submode = PHY_INTERFACE_MODE_SGMII;
+
+ if (mvebu_comphy_get_mux(lane->id, lane->port, mode, submode) < 0)
return -EINVAL;
lane->mode = mode;
+ lane->submode = submode;
return 0;
}
--
2.10.5
Currently the attempt to add support for Ethernet interface mode PHY
(MII/GMII/RGMII) will lead to the necessity of extending enum phy_mode and
duplicate there values from phy_interface_t enum (or introduce more PHY
callbacks) [1]. Both approaches are ineffective and would lead to fast
bloating of enum phy_mode or struct phy_ops in the process of adding more
PHYs for different subsystems which will make them unmaintainable.
As discussed in [1] the solution could be to introduce dual level PHYs mode
configuration - PHY mode and PHY submode. The PHY mode will define generic
PHY type (subsystem - PCIE/ETHERNET/USB_) while the PHY submode - subsystem
specific interface mode. The last is usually already defined in
corresponding subsystem headers (phy_interface_t for Ethernet, enum
usb_device_speed for USB).
This patch is cumulative change which refactors PHY framework code to
support dual level PHYs mode configuration - PHY mode and PHY submode. It
extends .set_mode() callback to support additional parameter "int submode"
and converts all corresponding PHY drivers to support new .set_mode()
callback declaration.
The new extended PHY API
int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode)
is introduced to support dual level PHYs mode configuration and existing
phy_set_mode() API is converted to macros, so PHY framework consumers do
not need to be changed (~21 matches).
[1] https://lkml.org/lkml/2018/10/25/366
Signed-off-by: Grygorii Strashko <[email protected]>
---
drivers/phy/allwinner/phy-sun4i-usb.c | 3 ++-
drivers/phy/amlogic/phy-meson-gxl-usb2.c | 5 +++--
drivers/phy/amlogic/phy-meson-gxl-usb3.c | 5 +++--
drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 3 ++-
drivers/phy/mediatek/phy-mtk-tphy.c | 2 +-
drivers/phy/mediatek/phy-mtk-xsphy.c | 2 +-
drivers/phy/mscc/phy-ocelot-serdes.c | 2 +-
drivers/phy/phy-core.c | 6 +++---
drivers/phy/qualcomm/phy-qcom-qmp.c | 3 ++-
drivers/phy/qualcomm/phy-qcom-qusb2.c | 3 ++-
drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.c | 3 ++-
drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.c | 3 ++-
drivers/phy/qualcomm/phy-qcom-usb-hs.c | 3 ++-
drivers/phy/ti/phy-da8xx-usb.c | 3 ++-
drivers/phy/ti/phy-tusb1210.c | 2 +-
include/linux/phy/phy.h | 13 ++++++++++---
16 files changed, 39 insertions(+), 22 deletions(-)
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c
index d4dcd39..1acdd73 100644
--- a/drivers/phy/allwinner/phy-sun4i-usb.c
+++ b/drivers/phy/allwinner/phy-sun4i-usb.c
@@ -474,7 +474,8 @@ static int sun4i_usb_phy_power_off(struct phy *_phy)
return 0;
}
-static int sun4i_usb_phy_set_mode(struct phy *_phy, enum phy_mode mode)
+static int sun4i_usb_phy_set_mode(struct phy *_phy,
+ enum phy_mode mode, int submode)
{
struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
diff --git a/drivers/phy/amlogic/phy-meson-gxl-usb2.c b/drivers/phy/amlogic/phy-meson-gxl-usb2.c
index 9f9b541..148ef0b 100644
--- a/drivers/phy/amlogic/phy-meson-gxl-usb2.c
+++ b/drivers/phy/amlogic/phy-meson-gxl-usb2.c
@@ -152,7 +152,8 @@ static int phy_meson_gxl_usb2_reset(struct phy *phy)
return 0;
}
-static int phy_meson_gxl_usb2_set_mode(struct phy *phy, enum phy_mode mode)
+static int phy_meson_gxl_usb2_set_mode(struct phy *phy,
+ enum phy_mode mode, int submode)
{
struct phy_meson_gxl_usb2_priv *priv = phy_get_drvdata(phy);
@@ -209,7 +210,7 @@ static int phy_meson_gxl_usb2_power_on(struct phy *phy)
/* power on the PHY by taking it out of reset mode */
regmap_update_bits(priv->regmap, U2P_R0, U2P_R0_POWER_ON_RESET, 0);
- ret = phy_meson_gxl_usb2_set_mode(phy, priv->mode);
+ ret = phy_meson_gxl_usb2_set_mode(phy, priv->mode, 0);
if (ret) {
phy_meson_gxl_usb2_power_off(phy);
diff --git a/drivers/phy/amlogic/phy-meson-gxl-usb3.c b/drivers/phy/amlogic/phy-meson-gxl-usb3.c
index d37d94d..c0e9e4c 100644
--- a/drivers/phy/amlogic/phy-meson-gxl-usb3.c
+++ b/drivers/phy/amlogic/phy-meson-gxl-usb3.c
@@ -119,7 +119,8 @@ static int phy_meson_gxl_usb3_power_off(struct phy *phy)
return 0;
}
-static int phy_meson_gxl_usb3_set_mode(struct phy *phy, enum phy_mode mode)
+static int phy_meson_gxl_usb3_set_mode(struct phy *phy,
+ enum phy_mode mode, int submode)
{
struct phy_meson_gxl_usb3_priv *priv = phy_get_drvdata(phy);
@@ -164,7 +165,7 @@ static int phy_meson_gxl_usb3_init(struct phy *phy)
if (ret)
goto err_disable_clk_phy;
- ret = phy_meson_gxl_usb3_set_mode(phy, priv->mode);
+ ret = phy_meson_gxl_usb3_set_mode(phy, priv->mode, 0);
if (ret)
goto err_disable_clk_peripheral;
diff --git a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
index 86a5f7b..79b52c3 100644
--- a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
+++ b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
@@ -512,7 +512,8 @@ static int mvebu_comphy_power_on(struct phy *phy)
return ret;
}
-static int mvebu_comphy_set_mode(struct phy *phy, enum phy_mode mode)
+static int mvebu_comphy_set_mode(struct phy *phy,
+ enum phy_mode mode, int submode)
{
struct mvebu_comphy_lane *lane = phy_get_drvdata(phy);
diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c
index 3eb8e1b..5b6a470 100644
--- a/drivers/phy/mediatek/phy-mtk-tphy.c
+++ b/drivers/phy/mediatek/phy-mtk-tphy.c
@@ -971,7 +971,7 @@ static int mtk_phy_exit(struct phy *phy)
return 0;
}
-static int mtk_phy_set_mode(struct phy *phy, enum phy_mode mode)
+static int mtk_phy_set_mode(struct phy *phy, enum phy_mode mode, int submode)
{
struct mtk_phy_instance *instance = phy_get_drvdata(phy);
struct mtk_tphy *tphy = dev_get_drvdata(phy->dev.parent);
diff --git a/drivers/phy/mediatek/phy-mtk-xsphy.c b/drivers/phy/mediatek/phy-mtk-xsphy.c
index 020cd02..8c51131 100644
--- a/drivers/phy/mediatek/phy-mtk-xsphy.c
+++ b/drivers/phy/mediatek/phy-mtk-xsphy.c
@@ -426,7 +426,7 @@ static int mtk_phy_exit(struct phy *phy)
return 0;
}
-static int mtk_phy_set_mode(struct phy *phy, enum phy_mode mode)
+static int mtk_phy_set_mode(struct phy *phy, enum phy_mode mode, int submode)
{
struct xsphy_instance *inst = phy_get_drvdata(phy);
struct mtk_xsphy *xsphy = dev_get_drvdata(phy->dev.parent);
diff --git a/drivers/phy/mscc/phy-ocelot-serdes.c b/drivers/phy/mscc/phy-ocelot-serdes.c
index cbb49d9..c61a9890 100644
--- a/drivers/phy/mscc/phy-ocelot-serdes.c
+++ b/drivers/phy/mscc/phy-ocelot-serdes.c
@@ -158,7 +158,7 @@ static const struct serdes_mux ocelot_serdes_muxes[] = {
HSIO_HW_CFG_PCIE_ENA),
};
-static int serdes_set_mode(struct phy *phy, enum phy_mode mode)
+static int serdes_set_mode(struct phy *phy, enum phy_mode mode, int submode)
{
struct serdes_macro *macro = phy_get_drvdata(phy);
unsigned int i;
diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c
index 35fd38c..df3d4ba 100644
--- a/drivers/phy/phy-core.c
+++ b/drivers/phy/phy-core.c
@@ -360,7 +360,7 @@ int phy_power_off(struct phy *phy)
}
EXPORT_SYMBOL_GPL(phy_power_off);
-int phy_set_mode(struct phy *phy, enum phy_mode mode)
+int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode)
{
int ret;
@@ -368,14 +368,14 @@ int phy_set_mode(struct phy *phy, enum phy_mode mode)
return 0;
mutex_lock(&phy->mutex);
- ret = phy->ops->set_mode(phy, mode);
+ ret = phy->ops->set_mode(phy, mode, submode);
if (!ret)
phy->attrs.mode = mode;
mutex_unlock(&phy->mutex);
return ret;
}
-EXPORT_SYMBOL_GPL(phy_set_mode);
+EXPORT_SYMBOL_GPL(phy_set_mode_ext);
int phy_reset(struct phy *phy)
{
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index a833324..514db72 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -1365,7 +1365,8 @@ static int qcom_qmp_phy_poweron(struct phy *phy)
return ret;
}
-static int qcom_qmp_phy_set_mode(struct phy *phy, enum phy_mode mode)
+static int qcom_qmp_phy_set_mode(struct phy *phy,
+ enum phy_mode mode, int submode)
{
struct qmp_phy *qphy = phy_get_drvdata(phy);
struct qcom_qmp *qmp = qphy->qmp;
diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c b/drivers/phy/qualcomm/phy-qcom-qusb2.c
index 9ce5311..098d793 100644
--- a/drivers/phy/qualcomm/phy-qcom-qusb2.c
+++ b/drivers/phy/qualcomm/phy-qcom-qusb2.c
@@ -423,7 +423,8 @@ static void qusb2_phy_set_tune2_param(struct qusb2_phy *qphy)
}
-static int qusb2_phy_set_mode(struct phy *phy, enum phy_mode mode)
+static int qusb2_phy_set_mode(struct phy *phy,
+ enum phy_mode mode, int submode)
{
struct qusb2_phy *qphy = phy_get_drvdata(phy);
diff --git a/drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.c b/drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.c
index ba1895b..1e0d4f2 100644
--- a/drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.c
+++ b/drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.c
@@ -65,7 +65,8 @@ static int ufs_qcom_phy_qmp_14nm_exit(struct phy *generic_phy)
}
static
-int ufs_qcom_phy_qmp_14nm_set_mode(struct phy *generic_phy, enum phy_mode mode)
+int ufs_qcom_phy_qmp_14nm_set_mode(struct phy *generic_phy,
+ enum phy_mode mode, int submode)
{
struct ufs_qcom_phy *phy_common = get_ufs_qcom_phy(generic_phy);
diff --git a/drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.c b/drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.c
index 49f435c..aef40f7 100644
--- a/drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.c
+++ b/drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.c
@@ -84,7 +84,8 @@ static int ufs_qcom_phy_qmp_20nm_exit(struct phy *generic_phy)
}
static
-int ufs_qcom_phy_qmp_20nm_set_mode(struct phy *generic_phy, enum phy_mode mode)
+int ufs_qcom_phy_qmp_20nm_set_mode(struct phy *generic_phy,
+ enum phy_mode mode, int submode)
{
struct ufs_qcom_phy *phy_common = get_ufs_qcom_phy(generic_phy);
diff --git a/drivers/phy/qualcomm/phy-qcom-usb-hs.c b/drivers/phy/qualcomm/phy-qcom-usb-hs.c
index abbbe75..04934f8 100644
--- a/drivers/phy/qualcomm/phy-qcom-usb-hs.c
+++ b/drivers/phy/qualcomm/phy-qcom-usb-hs.c
@@ -42,7 +42,8 @@ struct qcom_usb_hs_phy {
struct notifier_block vbus_notify;
};
-static int qcom_usb_hs_phy_set_mode(struct phy *phy, enum phy_mode mode)
+static int qcom_usb_hs_phy_set_mode(struct phy *phy,
+ enum phy_mode mode, int submode)
{
struct qcom_usb_hs_phy *uphy = phy_get_drvdata(phy);
u8 addr;
diff --git a/drivers/phy/ti/phy-da8xx-usb.c b/drivers/phy/ti/phy-da8xx-usb.c
index befb886..d5f4fbc 100644
--- a/drivers/phy/ti/phy-da8xx-usb.c
+++ b/drivers/phy/ti/phy-da8xx-usb.c
@@ -93,7 +93,8 @@ static int da8xx_usb20_phy_power_off(struct phy *phy)
return 0;
}
-static int da8xx_usb20_phy_set_mode(struct phy *phy, enum phy_mode mode)
+static int da8xx_usb20_phy_set_mode(struct phy *phy,
+ enum phy_mode mode, int submode)
{
struct da8xx_usb_phy *d_phy = phy_get_drvdata(phy);
u32 val;
diff --git a/drivers/phy/ti/phy-tusb1210.c b/drivers/phy/ti/phy-tusb1210.c
index b8ec39a..329fb93 100644
--- a/drivers/phy/ti/phy-tusb1210.c
+++ b/drivers/phy/ti/phy-tusb1210.c
@@ -53,7 +53,7 @@ static int tusb1210_power_off(struct phy *phy)
return 0;
}
-static int tusb1210_set_mode(struct phy *phy, enum phy_mode mode)
+static int tusb1210_set_mode(struct phy *phy, enum phy_mode mode, int submode)
{
struct tusb1210 *tusb = phy_get_drvdata(phy);
int ret;
diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index 03b319f..b17e770 100644
--- a/include/linux/phy/phy.h
+++ b/include/linux/phy/phy.h
@@ -60,7 +60,7 @@ struct phy_ops {
int (*exit)(struct phy *phy);
int (*power_on)(struct phy *phy);
int (*power_off)(struct phy *phy);
- int (*set_mode)(struct phy *phy, enum phy_mode mode);
+ int (*set_mode)(struct phy *phy, enum phy_mode mode, int submode);
int (*reset)(struct phy *phy);
int (*calibrate)(struct phy *phy);
struct module *owner;
@@ -164,7 +164,10 @@ int phy_init(struct phy *phy);
int phy_exit(struct phy *phy);
int phy_power_on(struct phy *phy);
int phy_power_off(struct phy *phy);
-int phy_set_mode(struct phy *phy, enum phy_mode mode);
+int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode);
+#define phy_set_mode(phy, mode) \
+ phy_set_mode_ext(phy, mode, 0)
+
static inline enum phy_mode phy_get_mode(struct phy *phy)
{
return phy->attrs.mode;
@@ -278,13 +281,17 @@ static inline int phy_power_off(struct phy *phy)
return -ENOSYS;
}
-static inline int phy_set_mode(struct phy *phy, enum phy_mode mode)
+static inline int phy_set_mode_ext(struct phy *phy, enum phy_mode mode,
+ int submode)
{
if (!phy)
return 0;
return -ENOSYS;
}
+#define phy_set_mode(phy, mode) \
+ phy_set_mode_ext(phy, mode, 0)
+
static inline enum phy_mode phy_get_mode(struct phy *phy)
{
return PHY_MODE_INVALID;
--
2.10.5
Convert ocelot-serdes PHY driver to use recently introduced
PHY_MODE_ETHERNET and phy_set_mode_ext().
Signed-off-by: Grygorii Strashko <[email protected]>
---
drivers/net/ethernet/mscc/ocelot.c | 9 ++-------
drivers/phy/mscc/phy-ocelot-serdes.c | 14 ++++++++++----
2 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/drivers/net/ethernet/mscc/ocelot.c b/drivers/net/ethernet/mscc/ocelot.c
index 3238b9e..3edb608 100644
--- a/drivers/net/ethernet/mscc/ocelot.c
+++ b/drivers/net/ethernet/mscc/ocelot.c
@@ -472,7 +472,6 @@ static int ocelot_port_open(struct net_device *dev)
{
struct ocelot_port *port = netdev_priv(dev);
struct ocelot *ocelot = port->ocelot;
- enum phy_mode phy_mode;
int err;
/* Enable receiving frames on the port, and activate auto-learning of
@@ -484,12 +483,8 @@ static int ocelot_port_open(struct net_device *dev)
ANA_PORT_PORT_CFG, port->chip_port);
if (port->serdes) {
- if (port->phy_mode == PHY_INTERFACE_MODE_SGMII)
- phy_mode = PHY_MODE_SGMII;
- else
- phy_mode = PHY_MODE_QSGMII;
-
- err = phy_set_mode(port->serdes, phy_mode);
+ err = phy_set_mode_ext(port->serdes, PHY_MODE_ETHERNET,
+ port->phy_mode);
if (err) {
netdev_err(dev, "Could not set mode of SerDes\n");
return err;
diff --git a/drivers/phy/mscc/phy-ocelot-serdes.c b/drivers/phy/mscc/phy-ocelot-serdes.c
index c61a9890..f525a21 100644
--- a/drivers/phy/mscc/phy-ocelot-serdes.c
+++ b/drivers/phy/mscc/phy-ocelot-serdes.c
@@ -11,6 +11,7 @@
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_platform.h>
+#include <linux/phy.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
@@ -116,8 +117,10 @@ struct serdes_mux {
.mux = _mux, \
}
-#define SERDES_MUX_SGMII(i, p, m, c) SERDES_MUX(i, p, PHY_MODE_SGMII, m, c)
-#define SERDES_MUX_QSGMII(i, p, m, c) SERDES_MUX(i, p, PHY_MODE_QSGMII, m, c)
+#define SERDES_MUX_SGMII(i, p, m, c) \
+ SERDES_MUX(i, p, PHY_INTERFACE_MODE_SGMII, m, c)
+#define SERDES_MUX_QSGMII(i, p, m, c) \
+ SERDES_MUX(i, p, PHY_INTERFACE_MODE_QSGMII, m, c)
static const struct serdes_mux ocelot_serdes_muxes[] = {
SERDES_MUX_SGMII(SERDES1G(0), 0, 0, 0),
@@ -164,12 +167,15 @@ static int serdes_set_mode(struct phy *phy, enum phy_mode mode, int submode)
unsigned int i;
int ret;
+ if (mode != PHY_MODE_ETHERNET)
+ return -EINVAL;
+
for (i = 0; i < ARRAY_SIZE(ocelot_serdes_muxes); i++) {
if (macro->idx != ocelot_serdes_muxes[i].idx ||
- mode != ocelot_serdes_muxes[i].mode)
+ submode != ocelot_serdes_muxes[i].mode)
continue;
- if (mode != PHY_MODE_QSGMII &&
+ if (submode != PHY_INTERFACE_MODE_QSGMII &&
macro->port != ocelot_serdes_muxes[i].port)
continue;
--
2.10.5
Hi Quentin, David Miller
Need your ACK on this patch.
Thanks
Kishon
On 10/11/18 5:17 AM, Grygorii Strashko wrote:
> Convert ocelot-serdes PHY driver to use recently introduced
> PHY_MODE_ETHERNET and phy_set_mode_ext().
>
> Signed-off-by: Grygorii Strashko <[email protected]>
> ---
> drivers/net/ethernet/mscc/ocelot.c | 9 ++-------
> drivers/phy/mscc/phy-ocelot-serdes.c | 14 ++++++++++----
> 2 files changed, 12 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/net/ethernet/mscc/ocelot.c b/drivers/net/ethernet/mscc/ocelot.c
> index 3238b9e..3edb608 100644
> --- a/drivers/net/ethernet/mscc/ocelot.c
> +++ b/drivers/net/ethernet/mscc/ocelot.c
> @@ -472,7 +472,6 @@ static int ocelot_port_open(struct net_device *dev)
> {
> struct ocelot_port *port = netdev_priv(dev);
> struct ocelot *ocelot = port->ocelot;
> - enum phy_mode phy_mode;
> int err;
>
> /* Enable receiving frames on the port, and activate auto-learning of
> @@ -484,12 +483,8 @@ static int ocelot_port_open(struct net_device *dev)
> ANA_PORT_PORT_CFG, port->chip_port);
>
> if (port->serdes) {
> - if (port->phy_mode == PHY_INTERFACE_MODE_SGMII)
> - phy_mode = PHY_MODE_SGMII;
> - else
> - phy_mode = PHY_MODE_QSGMII;
> -
> - err = phy_set_mode(port->serdes, phy_mode);
> + err = phy_set_mode_ext(port->serdes, PHY_MODE_ETHERNET,
> + port->phy_mode);
> if (err) {
> netdev_err(dev, "Could not set mode of SerDes\n");
> return err;
> diff --git a/drivers/phy/mscc/phy-ocelot-serdes.c b/drivers/phy/mscc/phy-ocelot-serdes.c
> index c61a9890..f525a21 100644
> --- a/drivers/phy/mscc/phy-ocelot-serdes.c
> +++ b/drivers/phy/mscc/phy-ocelot-serdes.c
> @@ -11,6 +11,7 @@
> #include <linux/module.h>
> #include <linux/of.h>
> #include <linux/of_platform.h>
> +#include <linux/phy.h>
> #include <linux/phy/phy.h>
> #include <linux/platform_device.h>
> #include <linux/regmap.h>
> @@ -116,8 +117,10 @@ struct serdes_mux {
> .mux = _mux, \
> }
>
> -#define SERDES_MUX_SGMII(i, p, m, c) SERDES_MUX(i, p, PHY_MODE_SGMII, m, c)
> -#define SERDES_MUX_QSGMII(i, p, m, c) SERDES_MUX(i, p, PHY_MODE_QSGMII, m, c)
> +#define SERDES_MUX_SGMII(i, p, m, c) \
> + SERDES_MUX(i, p, PHY_INTERFACE_MODE_SGMII, m, c)
> +#define SERDES_MUX_QSGMII(i, p, m, c) \
> + SERDES_MUX(i, p, PHY_INTERFACE_MODE_QSGMII, m, c)
>
> static const struct serdes_mux ocelot_serdes_muxes[] = {
> SERDES_MUX_SGMII(SERDES1G(0), 0, 0, 0),
> @@ -164,12 +167,15 @@ static int serdes_set_mode(struct phy *phy, enum phy_mode mode, int submode)
> unsigned int i;
> int ret;
>
> + if (mode != PHY_MODE_ETHERNET)
> + return -EINVAL;
> +
> for (i = 0; i < ARRAY_SIZE(ocelot_serdes_muxes); i++) {
> if (macro->idx != ocelot_serdes_muxes[i].idx ||
> - mode != ocelot_serdes_muxes[i].mode)
> + submode != ocelot_serdes_muxes[i].mode)
> continue;
>
> - if (mode != PHY_MODE_QSGMII &&
> + if (submode != PHY_INTERFACE_MODE_QSGMII &&
> macro->port != ocelot_serdes_muxes[i].port)
> continue;
>
>
Hi Grygorii,
On Fri, Nov 09, 2018 at 05:47:53PM -0600, Grygorii Strashko wrote:
> Convert ocelot-serdes PHY driver to use recently introduced
> PHY_MODE_ETHERNET and phy_set_mode_ext().
>
Thanks for the patch, it's annoying to have to map PHY_MODE_SGMII and
PHY_INTERFACE_MODE_SGMII :)
> Signed-off-by: Grygorii Strashko <[email protected]>
> ---
> drivers/net/ethernet/mscc/ocelot.c | 9 ++-------
> drivers/phy/mscc/phy-ocelot-serdes.c | 14 ++++++++++----
> 2 files changed, 12 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/net/ethernet/mscc/ocelot.c b/drivers/net/ethernet/mscc/ocelot.c
> index 3238b9e..3edb608 100644
> --- a/drivers/net/ethernet/mscc/ocelot.c
> +++ b/drivers/net/ethernet/mscc/ocelot.c
> @@ -472,7 +472,6 @@ static int ocelot_port_open(struct net_device *dev)
> {
> struct ocelot_port *port = netdev_priv(dev);
> struct ocelot *ocelot = port->ocelot;
> - enum phy_mode phy_mode;
> int err;
>
> /* Enable receiving frames on the port, and activate auto-learning of
> @@ -484,12 +483,8 @@ static int ocelot_port_open(struct net_device *dev)
> ANA_PORT_PORT_CFG, port->chip_port);
>
> if (port->serdes) {
> - if (port->phy_mode == PHY_INTERFACE_MODE_SGMII)
> - phy_mode = PHY_MODE_SGMII;
> - else
> - phy_mode = PHY_MODE_QSGMII;
> -
> - err = phy_set_mode(port->serdes, phy_mode);
> + err = phy_set_mode_ext(port->serdes, PHY_MODE_ETHERNET,
> + port->phy_mode);
> if (err) {
> netdev_err(dev, "Could not set mode of SerDes\n");
> return err;
> diff --git a/drivers/phy/mscc/phy-ocelot-serdes.c b/drivers/phy/mscc/phy-ocelot-serdes.c
> index c61a9890..f525a21 100644
> --- a/drivers/phy/mscc/phy-ocelot-serdes.c
> +++ b/drivers/phy/mscc/phy-ocelot-serdes.c
> @@ -11,6 +11,7 @@
> #include <linux/module.h>
> #include <linux/of.h>
> #include <linux/of_platform.h>
> +#include <linux/phy.h>
> #include <linux/phy/phy.h>
> #include <linux/platform_device.h>
> #include <linux/regmap.h>
> @@ -116,8 +117,10 @@ struct serdes_mux {
> .mux = _mux, \
> }
>
> -#define SERDES_MUX_SGMII(i, p, m, c) SERDES_MUX(i, p, PHY_MODE_SGMII, m, c)
> -#define SERDES_MUX_QSGMII(i, p, m, c) SERDES_MUX(i, p, PHY_MODE_QSGMII, m, c)
> +#define SERDES_MUX_SGMII(i, p, m, c) \
> + SERDES_MUX(i, p, PHY_INTERFACE_MODE_SGMII, m, c)
> +#define SERDES_MUX_QSGMII(i, p, m, c) \
> + SERDES_MUX(i, p, PHY_INTERFACE_MODE_QSGMII, m, c)
>
> static const struct serdes_mux ocelot_serdes_muxes[] = {
> SERDES_MUX_SGMII(SERDES1G(0), 0, 0, 0),
> @@ -164,12 +167,15 @@ static int serdes_set_mode(struct phy *phy, enum phy_mode mode, int submode)
> unsigned int i;
> int ret;
>
> + if (mode != PHY_MODE_ETHERNET)
> + return -EINVAL;
> +
This works for now because we only support Ethernet muxes for now but
this IP also supports PHY_MODE_PCIE.
It seems weird to me that the day we'll add support for PCIE muxing we
will have in ocelot_serdes_muxes[i].mode either a PHY_INTERFACE_MODE_*
or a PHY_MODE_PCIE. This is not an issue for now since you do the mode
!= PHY_MODE_ETHERNET just above but once we get rid of this, we only
test for submode != ocelot_serdes_muxes[i].mode and both
PHY_INTERFACE_MODE_1000BASEX and PHY_MODE_PCIE will have the same index
thus might be confused.
Should we add a submode to the SERDES_MUX macro, move PHY_MODE_*MII to
this submode and have PHY_MODE_ETHERNET/PCIE in the mode field?
Thanks,
Quentin
Hi Grygorii,
On Fri, 9 Nov 2018 17:47:54 -0600
Grygorii Strashko <[email protected]> wrote:
>Convert mvebu-cp110-comphy PHY driver to use recently introduced
>PHY_MODE_ETHERNET and phy_set_mode_ext().
Sorry I missed your V2, hopefully I tested the right version this time.
Tested on MCBin, this works just fine.
Thanks,
Tested-by: Maxime Chevallier <[email protected]>
>Signed-off-by: Grygorii Strashko <[email protected]>
>---
> drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 19 +-----
> drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 83 ++++++++++++++-----------
> 2 files changed, 48 insertions(+), 54 deletions(-)
>
>diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
>index 7a37a37..731793a 100644
>--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
>+++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
>@@ -1165,28 +1165,13 @@ static void mvpp22_gop_setup_irq(struct mvpp2_port *port)
> */
> static int mvpp22_comphy_init(struct mvpp2_port *port)
> {
>- enum phy_mode mode;
> int ret;
>
> if (!port->comphy)
> return 0;
>
>- switch (port->phy_interface) {
>- case PHY_INTERFACE_MODE_SGMII:
>- case PHY_INTERFACE_MODE_1000BASEX:
>- mode = PHY_MODE_SGMII;
>- break;
>- case PHY_INTERFACE_MODE_2500BASEX:
>- mode = PHY_MODE_2500SGMII;
>- break;
>- case PHY_INTERFACE_MODE_10GKR:
>- mode = PHY_MODE_10GKR;
>- break;
>- default:
>- return -EINVAL;
>- }
>-
>- ret = phy_set_mode(port->comphy, mode);
>+ ret = phy_set_mode_ext(port->comphy, PHY_MODE_ETHERNET,
>+ port->phy_interface);
> if (ret)
> return ret;
>
>diff --git a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
>index 79b52c3..7dee72b 100644
>--- a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
>+++ b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
>@@ -9,6 +9,7 @@
> #include <linux/iopoll.h>
> #include <linux/mfd/syscon.h>
> #include <linux/module.h>
>+#include <linux/phy.h>
> #include <linux/phy/phy.h>
> #include <linux/platform_device.h>
> #include <linux/regmap.h>
>@@ -131,26 +132,26 @@ struct mvebu_comhy_conf {
>
> static const struct mvebu_comhy_conf mvebu_comphy_cp110_modes[] = {
> /* lane 0 */
>- MVEBU_COMPHY_CONF(0, 1, PHY_MODE_SGMII, 0x1),
>- MVEBU_COMPHY_CONF(0, 1, PHY_MODE_2500SGMII, 0x1),
>+ MVEBU_COMPHY_CONF(0, 1, PHY_INTERFACE_MODE_SGMII, 0x1),
>+ MVEBU_COMPHY_CONF(0, 1, PHY_INTERFACE_MODE_2500BASEX, 0x1),
> /* lane 1 */
>- MVEBU_COMPHY_CONF(1, 2, PHY_MODE_SGMII, 0x1),
>- MVEBU_COMPHY_CONF(1, 2, PHY_MODE_2500SGMII, 0x1),
>+ MVEBU_COMPHY_CONF(1, 2, PHY_INTERFACE_MODE_SGMII, 0x1),
>+ MVEBU_COMPHY_CONF(1, 2, PHY_INTERFACE_MODE_2500BASEX, 0x1),
> /* lane 2 */
>- MVEBU_COMPHY_CONF(2, 0, PHY_MODE_SGMII, 0x1),
>- MVEBU_COMPHY_CONF(2, 0, PHY_MODE_2500SGMII, 0x1),
>- MVEBU_COMPHY_CONF(2, 0, PHY_MODE_10GKR, 0x1),
>+ MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_SGMII, 0x1),
>+ MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_2500BASEX, 0x1),
>+ MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_10GKR, 0x1),
> /* lane 3 */
>- MVEBU_COMPHY_CONF(3, 1, PHY_MODE_SGMII, 0x2),
>- MVEBU_COMPHY_CONF(3, 1, PHY_MODE_2500SGMII, 0x2),
>+ MVEBU_COMPHY_CONF(3, 1, PHY_INTERFACE_MODE_SGMII, 0x2),
>+ MVEBU_COMPHY_CONF(3, 1, PHY_INTERFACE_MODE_2500BASEX, 0x2),
> /* lane 4 */
>- MVEBU_COMPHY_CONF(4, 0, PHY_MODE_SGMII, 0x2),
>- MVEBU_COMPHY_CONF(4, 0, PHY_MODE_2500SGMII, 0x2),
>- MVEBU_COMPHY_CONF(4, 0, PHY_MODE_10GKR, 0x2),
>- MVEBU_COMPHY_CONF(4, 1, PHY_MODE_SGMII, 0x1),
>+ MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_SGMII, 0x2),
>+ MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_2500BASEX, 0x2),
>+ MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_10GKR, 0x2),
>+ MVEBU_COMPHY_CONF(4, 1, PHY_INTERFACE_MODE_SGMII, 0x1),
> /* lane 5 */
>- MVEBU_COMPHY_CONF(5, 2, PHY_MODE_SGMII, 0x1),
>- MVEBU_COMPHY_CONF(5, 2, PHY_MODE_2500SGMII, 0x1),
>+ MVEBU_COMPHY_CONF(5, 2, PHY_INTERFACE_MODE_SGMII, 0x1),
>+ MVEBU_COMPHY_CONF(5, 2, PHY_INTERFACE_MODE_2500BASEX, 0x1),
> };
>
> struct mvebu_comphy_priv {
>@@ -163,10 +164,12 @@ struct mvebu_comphy_lane {
> struct mvebu_comphy_priv *priv;
> unsigned id;
> enum phy_mode mode;
>+ int submode;
> int port;
> };
>
>-static int mvebu_comphy_get_mux(int lane, int port, enum phy_mode mode)
>+static int mvebu_comphy_get_mux(int lane, int port,
>+ enum phy_mode mode, int submode)
> {
> int i, n = ARRAY_SIZE(mvebu_comphy_cp110_modes);
>
>@@ -177,7 +180,7 @@ static int mvebu_comphy_get_mux(int lane, int port, enum phy_mode mode)
> for (i = 0; i < n; i++) {
> if (mvebu_comphy_cp110_modes[i].lane == lane &&
> mvebu_comphy_cp110_modes[i].port == port &&
>- mvebu_comphy_cp110_modes[i].mode == mode)
>+ mvebu_comphy_cp110_modes[i].mode == submode)
> break;
> }
>
>@@ -187,8 +190,7 @@ static int mvebu_comphy_get_mux(int lane, int port, enum phy_mode mode)
> return mvebu_comphy_cp110_modes[i].mux;
> }
>
>-static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane,
>- enum phy_mode mode)
>+static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane)
> {
> struct mvebu_comphy_priv *priv = lane->priv;
> u32 val;
>@@ -206,14 +208,14 @@ static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane,
> MVEBU_COMPHY_SERDES_CFG0_HALF_BUS |
> MVEBU_COMPHY_SERDES_CFG0_GEN_RX(0xf) |
> MVEBU_COMPHY_SERDES_CFG0_GEN_TX(0xf));
>- if (mode == PHY_MODE_10GKR)
>+ if (lane->submode == PHY_INTERFACE_MODE_10GKR)
> val |= MVEBU_COMPHY_SERDES_CFG0_GEN_RX(0xe) |
> MVEBU_COMPHY_SERDES_CFG0_GEN_TX(0xe);
>- else if (mode == PHY_MODE_2500SGMII)
>+ else if (lane->submode == PHY_INTERFACE_MODE_2500BASEX)
> val |= MVEBU_COMPHY_SERDES_CFG0_GEN_RX(0x8) |
> MVEBU_COMPHY_SERDES_CFG0_GEN_TX(0x8) |
> MVEBU_COMPHY_SERDES_CFG0_HALF_BUS;
>- else if (mode == PHY_MODE_SGMII)
>+ else if (lane->submode == PHY_INTERFACE_MODE_SGMII)
> val |= MVEBU_COMPHY_SERDES_CFG0_GEN_RX(0x6) |
> MVEBU_COMPHY_SERDES_CFG0_GEN_TX(0x6) |
> MVEBU_COMPHY_SERDES_CFG0_HALF_BUS;
>@@ -243,7 +245,7 @@ static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane,
> /* refclk selection */
> val = readl(priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id));
> val &= ~MVEBU_COMPHY_MISC_CTRL0_REFCLK_SEL;
>- if (mode == PHY_MODE_10GKR)
>+ if (lane->submode == PHY_INTERFACE_MODE_10GKR)
> val |= MVEBU_COMPHY_MISC_CTRL0_ICP_FORCE;
> writel(val, priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id));
>
>@@ -261,8 +263,7 @@ static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane,
> writel(val, priv->base + MVEBU_COMPHY_LOOPBACK(lane->id));
> }
>
>-static int mvebu_comphy_init_plls(struct mvebu_comphy_lane *lane,
>- enum phy_mode mode)
>+static int mvebu_comphy_init_plls(struct mvebu_comphy_lane *lane)
> {
> struct mvebu_comphy_priv *priv = lane->priv;
> u32 val;
>@@ -303,13 +304,13 @@ static int mvebu_comphy_init_plls(struct mvebu_comphy_lane *lane,
> return 0;
> }
>
>-static int mvebu_comphy_set_mode_sgmii(struct phy *phy, enum phy_mode mode)
>+static int mvebu_comphy_set_mode_sgmii(struct phy *phy)
> {
> struct mvebu_comphy_lane *lane = phy_get_drvdata(phy);
> struct mvebu_comphy_priv *priv = lane->priv;
> u32 val;
>
>- mvebu_comphy_ethernet_init_reset(lane, mode);
>+ mvebu_comphy_ethernet_init_reset(lane);
>
> val = readl(priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id));
> val &= ~MVEBU_COMPHY_RX_CTRL1_CLK8T_EN;
>@@ -330,7 +331,7 @@ static int mvebu_comphy_set_mode_sgmii(struct phy *phy, enum phy_mode mode)
> val |= MVEBU_COMPHY_GEN1_S0_TX_EMPH(0x1);
> writel(val, priv->base + MVEBU_COMPHY_GEN1_S0(lane->id));
>
>- return mvebu_comphy_init_plls(lane, PHY_MODE_SGMII);
>+ return mvebu_comphy_init_plls(lane);
> }
>
> static int mvebu_comphy_set_mode_10gkr(struct phy *phy)
>@@ -339,7 +340,7 @@ static int mvebu_comphy_set_mode_10gkr(struct phy *phy)
> struct mvebu_comphy_priv *priv = lane->priv;
> u32 val;
>
>- mvebu_comphy_ethernet_init_reset(lane, PHY_MODE_10GKR);
>+ mvebu_comphy_ethernet_init_reset(lane);
>
> val = readl(priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id));
> val |= MVEBU_COMPHY_RX_CTRL1_RXCLK2X_SEL |
>@@ -469,7 +470,7 @@ static int mvebu_comphy_set_mode_10gkr(struct phy *phy)
> val |= MVEBU_COMPHY_EXT_SELV_RX_SAMPL(0x1a);
> writel(val, priv->base + MVEBU_COMPHY_EXT_SELV(lane->id));
>
>- return mvebu_comphy_init_plls(lane, PHY_MODE_10GKR);
>+ return mvebu_comphy_init_plls(lane);
> }
>
> static int mvebu_comphy_power_on(struct phy *phy)
>@@ -479,7 +480,8 @@ static int mvebu_comphy_power_on(struct phy *phy)
> int ret, mux;
> u32 val;
>
>- mux = mvebu_comphy_get_mux(lane->id, lane->port, lane->mode);
>+ mux = mvebu_comphy_get_mux(lane->id, lane->port,
>+ lane->mode, lane->submode);
> if (mux < 0)
> return -ENOTSUPP;
>
>@@ -492,12 +494,12 @@ static int mvebu_comphy_power_on(struct phy *phy)
> val |= mux << MVEBU_COMPHY_SELECTOR_PHY(lane->id);
> regmap_write(priv->regmap, MVEBU_COMPHY_SELECTOR, val);
>
>- switch (lane->mode) {
>- case PHY_MODE_SGMII:
>- case PHY_MODE_2500SGMII:
>- ret = mvebu_comphy_set_mode_sgmii(phy, lane->mode);
>+ switch (lane->submode) {
>+ case PHY_INTERFACE_MODE_SGMII:
>+ case PHY_INTERFACE_MODE_2500BASEX:
>+ ret = mvebu_comphy_set_mode_sgmii(phy);
> break;
>- case PHY_MODE_10GKR:
>+ case PHY_INTERFACE_MODE_10GKR:
> ret = mvebu_comphy_set_mode_10gkr(phy);
> break;
> default:
>@@ -517,10 +519,17 @@ static int mvebu_comphy_set_mode(struct phy *phy,
> {
> struct mvebu_comphy_lane *lane = phy_get_drvdata(phy);
>
>- if (mvebu_comphy_get_mux(lane->id, lane->port, mode) < 0)
>+ if (mode != PHY_MODE_ETHERNET)
>+ return -EINVAL;
>+
>+ if (submode == PHY_INTERFACE_MODE_1000BASEX)
>+ submode = PHY_INTERFACE_MODE_SGMII;
>+
>+ if (mvebu_comphy_get_mux(lane->id, lane->port, mode, submode) < 0)
> return -EINVAL;
>
> lane->mode = mode;
>+ lane->submode = submode;
> return 0;
> }
>
--
Maxime Chevallier, Bootlin
Embedded Linux and kernel engineering
https://bootlin.com
Hi,
On Mon, Nov 19, 2018 at 09:26:32AM +0100, Maxime Chevallier wrote:
>
> On Fri, 9 Nov 2018 17:47:54 -0600
> Grygorii Strashko <[email protected]> wrote:
>
> >Convert mvebu-cp110-comphy PHY driver to use recently introduced
> >PHY_MODE_ETHERNET and phy_set_mode_ext().
>
> Sorry I missed your V2, hopefully I tested the right version this time.
> Tested on MCBin, this works just fine.
>
> Tested-by: Maxime Chevallier <[email protected]>
Thank you for testing!
Acked-by: Antoine Tenart <[email protected]>
Antoine
> >Signed-off-by: Grygorii Strashko <[email protected]>
> >---
> > drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 19 +-----
> > drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 83 ++++++++++++++-----------
> > 2 files changed, 48 insertions(+), 54 deletions(-)
> >
> >diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> >index 7a37a37..731793a 100644
> >--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> >+++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> >@@ -1165,28 +1165,13 @@ static void mvpp22_gop_setup_irq(struct mvpp2_port *port)
> > */
> > static int mvpp22_comphy_init(struct mvpp2_port *port)
> > {
> >- enum phy_mode mode;
> > int ret;
> >
> > if (!port->comphy)
> > return 0;
> >
> >- switch (port->phy_interface) {
> >- case PHY_INTERFACE_MODE_SGMII:
> >- case PHY_INTERFACE_MODE_1000BASEX:
> >- mode = PHY_MODE_SGMII;
> >- break;
> >- case PHY_INTERFACE_MODE_2500BASEX:
> >- mode = PHY_MODE_2500SGMII;
> >- break;
> >- case PHY_INTERFACE_MODE_10GKR:
> >- mode = PHY_MODE_10GKR;
> >- break;
> >- default:
> >- return -EINVAL;
> >- }
> >-
> >- ret = phy_set_mode(port->comphy, mode);
> >+ ret = phy_set_mode_ext(port->comphy, PHY_MODE_ETHERNET,
> >+ port->phy_interface);
> > if (ret)
> > return ret;
> >
> >diff --git a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
> >index 79b52c3..7dee72b 100644
> >--- a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
> >+++ b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
> >@@ -9,6 +9,7 @@
> > #include <linux/iopoll.h>
> > #include <linux/mfd/syscon.h>
> > #include <linux/module.h>
> >+#include <linux/phy.h>
> > #include <linux/phy/phy.h>
> > #include <linux/platform_device.h>
> > #include <linux/regmap.h>
> >@@ -131,26 +132,26 @@ struct mvebu_comhy_conf {
> >
> > static const struct mvebu_comhy_conf mvebu_comphy_cp110_modes[] = {
> > /* lane 0 */
> >- MVEBU_COMPHY_CONF(0, 1, PHY_MODE_SGMII, 0x1),
> >- MVEBU_COMPHY_CONF(0, 1, PHY_MODE_2500SGMII, 0x1),
> >+ MVEBU_COMPHY_CONF(0, 1, PHY_INTERFACE_MODE_SGMII, 0x1),
> >+ MVEBU_COMPHY_CONF(0, 1, PHY_INTERFACE_MODE_2500BASEX, 0x1),
> > /* lane 1 */
> >- MVEBU_COMPHY_CONF(1, 2, PHY_MODE_SGMII, 0x1),
> >- MVEBU_COMPHY_CONF(1, 2, PHY_MODE_2500SGMII, 0x1),
> >+ MVEBU_COMPHY_CONF(1, 2, PHY_INTERFACE_MODE_SGMII, 0x1),
> >+ MVEBU_COMPHY_CONF(1, 2, PHY_INTERFACE_MODE_2500BASEX, 0x1),
> > /* lane 2 */
> >- MVEBU_COMPHY_CONF(2, 0, PHY_MODE_SGMII, 0x1),
> >- MVEBU_COMPHY_CONF(2, 0, PHY_MODE_2500SGMII, 0x1),
> >- MVEBU_COMPHY_CONF(2, 0, PHY_MODE_10GKR, 0x1),
> >+ MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_SGMII, 0x1),
> >+ MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_2500BASEX, 0x1),
> >+ MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_10GKR, 0x1),
> > /* lane 3 */
> >- MVEBU_COMPHY_CONF(3, 1, PHY_MODE_SGMII, 0x2),
> >- MVEBU_COMPHY_CONF(3, 1, PHY_MODE_2500SGMII, 0x2),
> >+ MVEBU_COMPHY_CONF(3, 1, PHY_INTERFACE_MODE_SGMII, 0x2),
> >+ MVEBU_COMPHY_CONF(3, 1, PHY_INTERFACE_MODE_2500BASEX, 0x2),
> > /* lane 4 */
> >- MVEBU_COMPHY_CONF(4, 0, PHY_MODE_SGMII, 0x2),
> >- MVEBU_COMPHY_CONF(4, 0, PHY_MODE_2500SGMII, 0x2),
> >- MVEBU_COMPHY_CONF(4, 0, PHY_MODE_10GKR, 0x2),
> >- MVEBU_COMPHY_CONF(4, 1, PHY_MODE_SGMII, 0x1),
> >+ MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_SGMII, 0x2),
> >+ MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_2500BASEX, 0x2),
> >+ MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_10GKR, 0x2),
> >+ MVEBU_COMPHY_CONF(4, 1, PHY_INTERFACE_MODE_SGMII, 0x1),
> > /* lane 5 */
> >- MVEBU_COMPHY_CONF(5, 2, PHY_MODE_SGMII, 0x1),
> >- MVEBU_COMPHY_CONF(5, 2, PHY_MODE_2500SGMII, 0x1),
> >+ MVEBU_COMPHY_CONF(5, 2, PHY_INTERFACE_MODE_SGMII, 0x1),
> >+ MVEBU_COMPHY_CONF(5, 2, PHY_INTERFACE_MODE_2500BASEX, 0x1),
> > };
> >
> > struct mvebu_comphy_priv {
> >@@ -163,10 +164,12 @@ struct mvebu_comphy_lane {
> > struct mvebu_comphy_priv *priv;
> > unsigned id;
> > enum phy_mode mode;
> >+ int submode;
> > int port;
> > };
> >
> >-static int mvebu_comphy_get_mux(int lane, int port, enum phy_mode mode)
> >+static int mvebu_comphy_get_mux(int lane, int port,
> >+ enum phy_mode mode, int submode)
> > {
> > int i, n = ARRAY_SIZE(mvebu_comphy_cp110_modes);
> >
> >@@ -177,7 +180,7 @@ static int mvebu_comphy_get_mux(int lane, int port, enum phy_mode mode)
> > for (i = 0; i < n; i++) {
> > if (mvebu_comphy_cp110_modes[i].lane == lane &&
> > mvebu_comphy_cp110_modes[i].port == port &&
> >- mvebu_comphy_cp110_modes[i].mode == mode)
> >+ mvebu_comphy_cp110_modes[i].mode == submode)
> > break;
> > }
> >
> >@@ -187,8 +190,7 @@ static int mvebu_comphy_get_mux(int lane, int port, enum phy_mode mode)
> > return mvebu_comphy_cp110_modes[i].mux;
> > }
> >
> >-static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane,
> >- enum phy_mode mode)
> >+static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane)
> > {
> > struct mvebu_comphy_priv *priv = lane->priv;
> > u32 val;
> >@@ -206,14 +208,14 @@ static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane,
> > MVEBU_COMPHY_SERDES_CFG0_HALF_BUS |
> > MVEBU_COMPHY_SERDES_CFG0_GEN_RX(0xf) |
> > MVEBU_COMPHY_SERDES_CFG0_GEN_TX(0xf));
> >- if (mode == PHY_MODE_10GKR)
> >+ if (lane->submode == PHY_INTERFACE_MODE_10GKR)
> > val |= MVEBU_COMPHY_SERDES_CFG0_GEN_RX(0xe) |
> > MVEBU_COMPHY_SERDES_CFG0_GEN_TX(0xe);
> >- else if (mode == PHY_MODE_2500SGMII)
> >+ else if (lane->submode == PHY_INTERFACE_MODE_2500BASEX)
> > val |= MVEBU_COMPHY_SERDES_CFG0_GEN_RX(0x8) |
> > MVEBU_COMPHY_SERDES_CFG0_GEN_TX(0x8) |
> > MVEBU_COMPHY_SERDES_CFG0_HALF_BUS;
> >- else if (mode == PHY_MODE_SGMII)
> >+ else if (lane->submode == PHY_INTERFACE_MODE_SGMII)
> > val |= MVEBU_COMPHY_SERDES_CFG0_GEN_RX(0x6) |
> > MVEBU_COMPHY_SERDES_CFG0_GEN_TX(0x6) |
> > MVEBU_COMPHY_SERDES_CFG0_HALF_BUS;
> >@@ -243,7 +245,7 @@ static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane,
> > /* refclk selection */
> > val = readl(priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id));
> > val &= ~MVEBU_COMPHY_MISC_CTRL0_REFCLK_SEL;
> >- if (mode == PHY_MODE_10GKR)
> >+ if (lane->submode == PHY_INTERFACE_MODE_10GKR)
> > val |= MVEBU_COMPHY_MISC_CTRL0_ICP_FORCE;
> > writel(val, priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id));
> >
> >@@ -261,8 +263,7 @@ static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane,
> > writel(val, priv->base + MVEBU_COMPHY_LOOPBACK(lane->id));
> > }
> >
> >-static int mvebu_comphy_init_plls(struct mvebu_comphy_lane *lane,
> >- enum phy_mode mode)
> >+static int mvebu_comphy_init_plls(struct mvebu_comphy_lane *lane)
> > {
> > struct mvebu_comphy_priv *priv = lane->priv;
> > u32 val;
> >@@ -303,13 +304,13 @@ static int mvebu_comphy_init_plls(struct mvebu_comphy_lane *lane,
> > return 0;
> > }
> >
> >-static int mvebu_comphy_set_mode_sgmii(struct phy *phy, enum phy_mode mode)
> >+static int mvebu_comphy_set_mode_sgmii(struct phy *phy)
> > {
> > struct mvebu_comphy_lane *lane = phy_get_drvdata(phy);
> > struct mvebu_comphy_priv *priv = lane->priv;
> > u32 val;
> >
> >- mvebu_comphy_ethernet_init_reset(lane, mode);
> >+ mvebu_comphy_ethernet_init_reset(lane);
> >
> > val = readl(priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id));
> > val &= ~MVEBU_COMPHY_RX_CTRL1_CLK8T_EN;
> >@@ -330,7 +331,7 @@ static int mvebu_comphy_set_mode_sgmii(struct phy *phy, enum phy_mode mode)
> > val |= MVEBU_COMPHY_GEN1_S0_TX_EMPH(0x1);
> > writel(val, priv->base + MVEBU_COMPHY_GEN1_S0(lane->id));
> >
> >- return mvebu_comphy_init_plls(lane, PHY_MODE_SGMII);
> >+ return mvebu_comphy_init_plls(lane);
> > }
> >
> > static int mvebu_comphy_set_mode_10gkr(struct phy *phy)
> >@@ -339,7 +340,7 @@ static int mvebu_comphy_set_mode_10gkr(struct phy *phy)
> > struct mvebu_comphy_priv *priv = lane->priv;
> > u32 val;
> >
> >- mvebu_comphy_ethernet_init_reset(lane, PHY_MODE_10GKR);
> >+ mvebu_comphy_ethernet_init_reset(lane);
> >
> > val = readl(priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id));
> > val |= MVEBU_COMPHY_RX_CTRL1_RXCLK2X_SEL |
> >@@ -469,7 +470,7 @@ static int mvebu_comphy_set_mode_10gkr(struct phy *phy)
> > val |= MVEBU_COMPHY_EXT_SELV_RX_SAMPL(0x1a);
> > writel(val, priv->base + MVEBU_COMPHY_EXT_SELV(lane->id));
> >
> >- return mvebu_comphy_init_plls(lane, PHY_MODE_10GKR);
> >+ return mvebu_comphy_init_plls(lane);
> > }
> >
> > static int mvebu_comphy_power_on(struct phy *phy)
> >@@ -479,7 +480,8 @@ static int mvebu_comphy_power_on(struct phy *phy)
> > int ret, mux;
> > u32 val;
> >
> >- mux = mvebu_comphy_get_mux(lane->id, lane->port, lane->mode);
> >+ mux = mvebu_comphy_get_mux(lane->id, lane->port,
> >+ lane->mode, lane->submode);
> > if (mux < 0)
> > return -ENOTSUPP;
> >
> >@@ -492,12 +494,12 @@ static int mvebu_comphy_power_on(struct phy *phy)
> > val |= mux << MVEBU_COMPHY_SELECTOR_PHY(lane->id);
> > regmap_write(priv->regmap, MVEBU_COMPHY_SELECTOR, val);
> >
> >- switch (lane->mode) {
> >- case PHY_MODE_SGMII:
> >- case PHY_MODE_2500SGMII:
> >- ret = mvebu_comphy_set_mode_sgmii(phy, lane->mode);
> >+ switch (lane->submode) {
> >+ case PHY_INTERFACE_MODE_SGMII:
> >+ case PHY_INTERFACE_MODE_2500BASEX:
> >+ ret = mvebu_comphy_set_mode_sgmii(phy);
> > break;
> >- case PHY_MODE_10GKR:
> >+ case PHY_INTERFACE_MODE_10GKR:
> > ret = mvebu_comphy_set_mode_10gkr(phy);
> > break;
> > default:
> >@@ -517,10 +519,17 @@ static int mvebu_comphy_set_mode(struct phy *phy,
> > {
> > struct mvebu_comphy_lane *lane = phy_get_drvdata(phy);
> >
> >- if (mvebu_comphy_get_mux(lane->id, lane->port, mode) < 0)
> >+ if (mode != PHY_MODE_ETHERNET)
> >+ return -EINVAL;
> >+
> >+ if (submode == PHY_INTERFACE_MODE_1000BASEX)
> >+ submode = PHY_INTERFACE_MODE_SGMII;
> >+
> >+ if (mvebu_comphy_get_mux(lane->id, lane->port, mode, submode) < 0)
> > return -EINVAL;
> >
> > lane->mode = mode;
> >+ lane->submode = submode;
> > return 0;
> > }
> >
>
>
>
> --
> Maxime Chevallier, Bootlin
> Embedded Linux and kernel engineering
> https://bootlin.com
--
Antoine T?nart, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Fri, Nov 09, 2018 at 05:47:54PM -0600, Grygorii Strashko wrote:
> Convert mvebu-cp110-comphy PHY driver to use recently introduced
> PHY_MODE_ETHERNET and phy_set_mode_ext().
>
> Signed-off-by: Grygorii Strashko <[email protected]>
> ---
> drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 19 +-----
> drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 83 ++++++++++++++-----------
> 2 files changed, 48 insertions(+), 54 deletions(-)
>
> diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> index 7a37a37..731793a 100644
> --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> @@ -1165,28 +1165,13 @@ static void mvpp22_gop_setup_irq(struct mvpp2_port *port)
> */
> static int mvpp22_comphy_init(struct mvpp2_port *port)
> {
> - enum phy_mode mode;
> int ret;
>
> if (!port->comphy)
> return 0;
>
> - switch (port->phy_interface) {
> - case PHY_INTERFACE_MODE_SGMII:
> - case PHY_INTERFACE_MODE_1000BASEX:
> - mode = PHY_MODE_SGMII;
> - break;
> - case PHY_INTERFACE_MODE_2500BASEX:
> - mode = PHY_MODE_2500SGMII;
> - break;
> - case PHY_INTERFACE_MODE_10GKR:
> - mode = PHY_MODE_10GKR;
> - break;
> - default:
> - return -EINVAL;
> - }
> -
> - ret = phy_set_mode(port->comphy, mode);
> + ret = phy_set_mode_ext(port->comphy, PHY_MODE_ETHERNET,
> + port->phy_interface);
> if (ret)
> return ret;
>
> diff --git a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
> index 79b52c3..7dee72b 100644
> --- a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
> +++ b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
> @@ -9,6 +9,7 @@
> #include <linux/iopoll.h>
> #include <linux/mfd/syscon.h>
> #include <linux/module.h>
> +#include <linux/phy.h>
> #include <linux/phy/phy.h>
> #include <linux/platform_device.h>
> #include <linux/regmap.h>
> @@ -131,26 +132,26 @@ struct mvebu_comhy_conf {
>
> static const struct mvebu_comhy_conf mvebu_comphy_cp110_modes[] = {
> /* lane 0 */
> - MVEBU_COMPHY_CONF(0, 1, PHY_MODE_SGMII, 0x1),
> - MVEBU_COMPHY_CONF(0, 1, PHY_MODE_2500SGMII, 0x1),
> + MVEBU_COMPHY_CONF(0, 1, PHY_INTERFACE_MODE_SGMII, 0x1),
> + MVEBU_COMPHY_CONF(0, 1, PHY_INTERFACE_MODE_2500BASEX, 0x1),
> /* lane 1 */
> - MVEBU_COMPHY_CONF(1, 2, PHY_MODE_SGMII, 0x1),
> - MVEBU_COMPHY_CONF(1, 2, PHY_MODE_2500SGMII, 0x1),
> + MVEBU_COMPHY_CONF(1, 2, PHY_INTERFACE_MODE_SGMII, 0x1),
> + MVEBU_COMPHY_CONF(1, 2, PHY_INTERFACE_MODE_2500BASEX, 0x1),
> /* lane 2 */
> - MVEBU_COMPHY_CONF(2, 0, PHY_MODE_SGMII, 0x1),
> - MVEBU_COMPHY_CONF(2, 0, PHY_MODE_2500SGMII, 0x1),
> - MVEBU_COMPHY_CONF(2, 0, PHY_MODE_10GKR, 0x1),
> + MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_SGMII, 0x1),
> + MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_2500BASEX, 0x1),
> + MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_10GKR, 0x1),
> /* lane 3 */
> - MVEBU_COMPHY_CONF(3, 1, PHY_MODE_SGMII, 0x2),
> - MVEBU_COMPHY_CONF(3, 1, PHY_MODE_2500SGMII, 0x2),
> + MVEBU_COMPHY_CONF(3, 1, PHY_INTERFACE_MODE_SGMII, 0x2),
> + MVEBU_COMPHY_CONF(3, 1, PHY_INTERFACE_MODE_2500BASEX, 0x2),
> /* lane 4 */
> - MVEBU_COMPHY_CONF(4, 0, PHY_MODE_SGMII, 0x2),
> - MVEBU_COMPHY_CONF(4, 0, PHY_MODE_2500SGMII, 0x2),
> - MVEBU_COMPHY_CONF(4, 0, PHY_MODE_10GKR, 0x2),
> - MVEBU_COMPHY_CONF(4, 1, PHY_MODE_SGMII, 0x1),
> + MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_SGMII, 0x2),
> + MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_2500BASEX, 0x2),
> + MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_10GKR, 0x2),
> + MVEBU_COMPHY_CONF(4, 1, PHY_INTERFACE_MODE_SGMII, 0x1),
> /* lane 5 */
> - MVEBU_COMPHY_CONF(5, 2, PHY_MODE_SGMII, 0x1),
> - MVEBU_COMPHY_CONF(5, 2, PHY_MODE_2500SGMII, 0x1),
> + MVEBU_COMPHY_CONF(5, 2, PHY_INTERFACE_MODE_SGMII, 0x1),
> + MVEBU_COMPHY_CONF(5, 2, PHY_INTERFACE_MODE_2500BASEX, 0x1),
> };
>
> struct mvebu_comphy_priv {
> @@ -163,10 +164,12 @@ struct mvebu_comphy_lane {
> struct mvebu_comphy_priv *priv;
> unsigned id;
> enum phy_mode mode;
> + int submode;
> int port;
> };
>
> -static int mvebu_comphy_get_mux(int lane, int port, enum phy_mode mode)
> +static int mvebu_comphy_get_mux(int lane, int port,
> + enum phy_mode mode, int submode)
> {
> int i, n = ARRAY_SIZE(mvebu_comphy_cp110_modes);
>
> @@ -177,7 +180,7 @@ static int mvebu_comphy_get_mux(int lane, int port, enum phy_mode mode)
> for (i = 0; i < n; i++) {
> if (mvebu_comphy_cp110_modes[i].lane == lane &&
> mvebu_comphy_cp110_modes[i].port == port &&
> - mvebu_comphy_cp110_modes[i].mode == mode)
> + mvebu_comphy_cp110_modes[i].mode == submode)
This looks like it could be a future source of problems, since we
have both a "mode" and a "submode". Is there any reason not to
rename mvebu_comphy_cp110_modes's .mode member to be .submode ?
--
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up
According to speedtest.net: 11.9Mbps down 500kbps up
Hi Russell,
On 11/19/18 11:07 AM, Russell King - ARM Linux wrote:
> On Fri, Nov 09, 2018 at 05:47:54PM -0600, Grygorii Strashko wrote:
>> Convert mvebu-cp110-comphy PHY driver to use recently introduced
>> PHY_MODE_ETHERNET and phy_set_mode_ext().
>>
>> Signed-off-by: Grygorii Strashko <[email protected]>
>> ---
>> drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 19 +-----
>> drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 83 ++++++++++++++-----------
>> 2 files changed, 48 insertions(+), 54 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
>> index 7a37a37..731793a 100644
>> --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
>> +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
>> @@ -1165,28 +1165,13 @@ static void mvpp22_gop_setup_irq(struct mvpp2_port *port)
>> */
>> static int mvpp22_comphy_init(struct mvpp2_port *port)
>> {
>> - enum phy_mode mode;
>> int ret;
>>
>> if (!port->comphy)
>> return 0;
>>
>> - switch (port->phy_interface) {
>> - case PHY_INTERFACE_MODE_SGMII:
>> - case PHY_INTERFACE_MODE_1000BASEX:
>> - mode = PHY_MODE_SGMII;
>> - break;
>> - case PHY_INTERFACE_MODE_2500BASEX:
>> - mode = PHY_MODE_2500SGMII;
>> - break;
>> - case PHY_INTERFACE_MODE_10GKR:
>> - mode = PHY_MODE_10GKR;
>> - break;
>> - default:
>> - return -EINVAL;
>> - }
>> -
>> - ret = phy_set_mode(port->comphy, mode);
>> + ret = phy_set_mode_ext(port->comphy, PHY_MODE_ETHERNET,
>> + port->phy_interface);
>> if (ret)
>> return ret;
>>
>> diff --git a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
>> index 79b52c3..7dee72b 100644
>> --- a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
>> +++ b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
>> @@ -9,6 +9,7 @@
>> #include <linux/iopoll.h>
>> #include <linux/mfd/syscon.h>
>> #include <linux/module.h>
>> +#include <linux/phy.h>
>> #include <linux/phy/phy.h>
>> #include <linux/platform_device.h>
>> #include <linux/regmap.h>
>> @@ -131,26 +132,26 @@ struct mvebu_comhy_conf {
>>
>> static const struct mvebu_comhy_conf mvebu_comphy_cp110_modes[] = {
>> /* lane 0 */
>> - MVEBU_COMPHY_CONF(0, 1, PHY_MODE_SGMII, 0x1),
>> - MVEBU_COMPHY_CONF(0, 1, PHY_MODE_2500SGMII, 0x1),
>> + MVEBU_COMPHY_CONF(0, 1, PHY_INTERFACE_MODE_SGMII, 0x1),
>> + MVEBU_COMPHY_CONF(0, 1, PHY_INTERFACE_MODE_2500BASEX, 0x1),
>> /* lane 1 */
>> - MVEBU_COMPHY_CONF(1, 2, PHY_MODE_SGMII, 0x1),
>> - MVEBU_COMPHY_CONF(1, 2, PHY_MODE_2500SGMII, 0x1),
>> + MVEBU_COMPHY_CONF(1, 2, PHY_INTERFACE_MODE_SGMII, 0x1),
>> + MVEBU_COMPHY_CONF(1, 2, PHY_INTERFACE_MODE_2500BASEX, 0x1),
>> /* lane 2 */
>> - MVEBU_COMPHY_CONF(2, 0, PHY_MODE_SGMII, 0x1),
>> - MVEBU_COMPHY_CONF(2, 0, PHY_MODE_2500SGMII, 0x1),
>> - MVEBU_COMPHY_CONF(2, 0, PHY_MODE_10GKR, 0x1),
>> + MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_SGMII, 0x1),
>> + MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_2500BASEX, 0x1),
>> + MVEBU_COMPHY_CONF(2, 0, PHY_INTERFACE_MODE_10GKR, 0x1),
>> /* lane 3 */
>> - MVEBU_COMPHY_CONF(3, 1, PHY_MODE_SGMII, 0x2),
>> - MVEBU_COMPHY_CONF(3, 1, PHY_MODE_2500SGMII, 0x2),
>> + MVEBU_COMPHY_CONF(3, 1, PHY_INTERFACE_MODE_SGMII, 0x2),
>> + MVEBU_COMPHY_CONF(3, 1, PHY_INTERFACE_MODE_2500BASEX, 0x2),
>> /* lane 4 */
>> - MVEBU_COMPHY_CONF(4, 0, PHY_MODE_SGMII, 0x2),
>> - MVEBU_COMPHY_CONF(4, 0, PHY_MODE_2500SGMII, 0x2),
>> - MVEBU_COMPHY_CONF(4, 0, PHY_MODE_10GKR, 0x2),
>> - MVEBU_COMPHY_CONF(4, 1, PHY_MODE_SGMII, 0x1),
>> + MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_SGMII, 0x2),
>> + MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_2500BASEX, 0x2),
>> + MVEBU_COMPHY_CONF(4, 0, PHY_INTERFACE_MODE_10GKR, 0x2),
>> + MVEBU_COMPHY_CONF(4, 1, PHY_INTERFACE_MODE_SGMII, 0x1),
>> /* lane 5 */
>> - MVEBU_COMPHY_CONF(5, 2, PHY_MODE_SGMII, 0x1),
>> - MVEBU_COMPHY_CONF(5, 2, PHY_MODE_2500SGMII, 0x1),
>> + MVEBU_COMPHY_CONF(5, 2, PHY_INTERFACE_MODE_SGMII, 0x1),
>> + MVEBU_COMPHY_CONF(5, 2, PHY_INTERFACE_MODE_2500BASEX, 0x1),
>> };
>>
>> struct mvebu_comphy_priv {
>> @@ -163,10 +164,12 @@ struct mvebu_comphy_lane {
>> struct mvebu_comphy_priv *priv;
>> unsigned id;
>> enum phy_mode mode;
>> + int submode;
>> int port;
>> };
>>
>> -static int mvebu_comphy_get_mux(int lane, int port, enum phy_mode mode)
>> +static int mvebu_comphy_get_mux(int lane, int port,
>> + enum phy_mode mode, int submode)
>> {
>> int i, n = ARRAY_SIZE(mvebu_comphy_cp110_modes);
>>
>> @@ -177,7 +180,7 @@ static int mvebu_comphy_get_mux(int lane, int port, enum phy_mode mode)
>> for (i = 0; i < n; i++) {
>> if (mvebu_comphy_cp110_modes[i].lane == lane &&
>> mvebu_comphy_cp110_modes[i].port == port &&
>> - mvebu_comphy_cp110_modes[i].mode == mode)
>> + mvebu_comphy_cp110_modes[i].mode == submode)
>
> This looks like it could be a future source of problems, since we
> have both a "mode" and a "submode". Is there any reason not to
> rename mvebu_comphy_cp110_modes's .mode member to be .submode ?
>
Thank you for review. I seems need to update it same way as requested
for ocelot-serdes by Quentin Schulz and add pair mode + submode handling
where needed. Will update and re-send.
--
regards,
-grygorii