2019-06-06 14:24:46

by Jacopo Mondi

[permalink] [raw]
Subject: [PATCH 15/20] drm: rcar-du: Claim CMM support for Gen3 SoCs

Add CMM to the list of supported features for Gen3 SoCs that provide it:
- R8A7795
- R8A7796
- R8A77965
- R8A7799x

Leave R8A77970 out as V3M and V3H are the only Gen3 SoCs that do not
support CMM.

Signed-off-by: Jacopo Mondi <[email protected]>
---
drivers/gpu/drm/rcar-du/rcar_du_drv.c | 12 ++++++++----
drivers/gpu/drm/rcar-du/rcar_du_drv.h | 1 +
2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
index 75ab17af13a9..1e69cfa11798 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
@@ -247,7 +247,8 @@ static const struct rcar_du_device_info rcar_du_r8a7795_info = {
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_CMM,
.channels_mask = BIT(3) | BIT(2) | BIT(1) | BIT(0),
.routes = {
/*
@@ -280,7 +281,8 @@ static const struct rcar_du_device_info rcar_du_r8a7796_info = {
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_CMM,
.channels_mask = BIT(2) | BIT(1) | BIT(0),
.routes = {
/*
@@ -309,7 +311,8 @@ static const struct rcar_du_device_info rcar_du_r8a77965_info = {
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
| RCAR_DU_FEATURE_VSP1_SOURCE
| RCAR_DU_FEATURE_INTERLACED
- | RCAR_DU_FEATURE_TVM_SYNC,
+ | RCAR_DU_FEATURE_TVM_SYNC
+ | RCAR_DU_FEATURE_CMM,
.channels_mask = BIT(3) | BIT(1) | BIT(0),
.routes = {
/*
@@ -357,7 +360,8 @@ static const struct rcar_du_device_info rcar_du_r8a77970_info = {
static const struct rcar_du_device_info rcar_du_r8a7799x_info = {
.gen = 3,
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
- | RCAR_DU_FEATURE_VSP1_SOURCE,
+ | RCAR_DU_FEATURE_VSP1_SOURCE
+ | RCAR_DU_FEATURE_CMM,
.channels_mask = BIT(1) | BIT(0),
.routes = {
/*
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
index 1327cd0df90a..a00dccc447aa 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
@@ -28,6 +28,7 @@ struct rcar_du_encoder;
#define RCAR_DU_FEATURE_VSP1_SOURCE BIT(1) /* Has inputs from VSP1 */
#define RCAR_DU_FEATURE_INTERLACED BIT(2) /* HW supports interlaced */
#define RCAR_DU_FEATURE_TVM_SYNC BIT(3) /* Has TV switch/sync modes */
+#define RCAR_DU_FEATURE_CMM BIT(4) /* Has CMM */

#define RCAR_DU_QUIRK_ALIGN_128B BIT(0) /* Align pitches to 128 bytes */

--
2.21.0


2019-06-07 12:03:23

by Laurent Pinchart

[permalink] [raw]
Subject: Re: [PATCH 15/20] drm: rcar-du: Claim CMM support for Gen3 SoCs

Hi Jacopo,

Thank you for the patch.

On Thu, Jun 06, 2019 at 04:22:15PM +0200, Jacopo Mondi wrote:
> Add CMM to the list of supported features for Gen3 SoCs that provide it:
> - R8A7795
> - R8A7796
> - R8A77965
> - R8A7799x
>
> Leave R8A77970 out as V3M and V3H are the only Gen3 SoCs that do not
> support CMM.
>
> Signed-off-by: Jacopo Mondi <[email protected]>

Do we actually need this ? Could we just skip CMM handling if the cmms
property isn't set in DT ?

> ---
> drivers/gpu/drm/rcar-du/rcar_du_drv.c | 12 ++++++++----
> drivers/gpu/drm/rcar-du/rcar_du_drv.h | 1 +
> 2 files changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> index 75ab17af13a9..1e69cfa11798 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> @@ -247,7 +247,8 @@ static const struct rcar_du_device_info rcar_du_r8a7795_info = {
> .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
> | RCAR_DU_FEATURE_VSP1_SOURCE
> | RCAR_DU_FEATURE_INTERLACED
> - | RCAR_DU_FEATURE_TVM_SYNC,
> + | RCAR_DU_FEATURE_TVM_SYNC
> + | RCAR_DU_FEATURE_CMM,
> .channels_mask = BIT(3) | BIT(2) | BIT(1) | BIT(0),
> .routes = {
> /*
> @@ -280,7 +281,8 @@ static const struct rcar_du_device_info rcar_du_r8a7796_info = {
> .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
> | RCAR_DU_FEATURE_VSP1_SOURCE
> | RCAR_DU_FEATURE_INTERLACED
> - | RCAR_DU_FEATURE_TVM_SYNC,
> + | RCAR_DU_FEATURE_TVM_SYNC
> + | RCAR_DU_FEATURE_CMM,
> .channels_mask = BIT(2) | BIT(1) | BIT(0),
> .routes = {
> /*
> @@ -309,7 +311,8 @@ static const struct rcar_du_device_info rcar_du_r8a77965_info = {
> .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
> | RCAR_DU_FEATURE_VSP1_SOURCE
> | RCAR_DU_FEATURE_INTERLACED
> - | RCAR_DU_FEATURE_TVM_SYNC,
> + | RCAR_DU_FEATURE_TVM_SYNC
> + | RCAR_DU_FEATURE_CMM,
> .channels_mask = BIT(3) | BIT(1) | BIT(0),
> .routes = {
> /*
> @@ -357,7 +360,8 @@ static const struct rcar_du_device_info rcar_du_r8a77970_info = {
> static const struct rcar_du_device_info rcar_du_r8a7799x_info = {
> .gen = 3,
> .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
> - | RCAR_DU_FEATURE_VSP1_SOURCE,
> + | RCAR_DU_FEATURE_VSP1_SOURCE
> + | RCAR_DU_FEATURE_CMM,
> .channels_mask = BIT(1) | BIT(0),
> .routes = {
> /*
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
> index 1327cd0df90a..a00dccc447aa 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
> @@ -28,6 +28,7 @@ struct rcar_du_encoder;
> #define RCAR_DU_FEATURE_VSP1_SOURCE BIT(1) /* Has inputs from VSP1 */
> #define RCAR_DU_FEATURE_INTERLACED BIT(2) /* HW supports interlaced */
> #define RCAR_DU_FEATURE_TVM_SYNC BIT(3) /* Has TV switch/sync modes */
> +#define RCAR_DU_FEATURE_CMM BIT(4) /* Has CMM */
>
> #define RCAR_DU_QUIRK_ALIGN_128B BIT(0) /* Align pitches to 128 bytes */
>

--
Regards,

Laurent Pinchart