2019-07-15 02:56:37

by Peng Fan

Subject: [PATCH] clk: imx: imx8mm: fix audio pll setting

From: Peng Fan <[email protected]>

The AUDIO PLL max support 650M, so the original clk settings violate
spec. This patch makes the output 786432000 -> 393216000,
and 722534400 -> 361267200 to aligned with NXP vendor kernel without any
impact on audio functionality and go within 650MHz PLL limit.

Cc: <[email protected]>
Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
Signed-off-by: Peng Fan <[email protected]>
---
drivers/clk/imx/clk-imx8mm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index 3a873e0e278f..b72bad064d8d 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -55,8 +55,8 @@ static const struct imx_pll14xx_rate_table imx8mm_pll1416x_tbl[] = {
};

static const struct imx_pll14xx_rate_table imx8mm_audiopll_tbl[] = {
- PLL_1443X_RATE(786432000U, 655, 5, 2, 23593),
- PLL_1443X_RATE(722534400U, 301, 5, 1, 3670),
+ PLL_1443X_RATE(393216000U, 262, 2, 3, 9437),
+ PLL_1443X_RATE(361267200U, 361, 3, 3, 17511),
};

static const struct imx_pll14xx_rate_table imx8mm_videopll_tbl[] = {
--
2.16.4

2019-07-15 07:28:56

by Abel Vesa

Subject: Re: [PATCH] clk: imx: imx8mm: fix audio pll setting

On 19-07-15 02:55:43, Peng Fan wrote:
> From: Peng Fan <[email protected]>
>
> The AUDIO PLL max support 650M, so the original clk settings violate
> spec. This patch makes the output 786432000 -> 393216000,
> and 722534400 -> 361267200 to aligned with NXP vendor kernel without any
> impact on audio functionality and go within 650MHz PLL limit.
>
> Cc: <[email protected]>
> Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
> Signed-off-by: Peng Fan <[email protected]>

Acked-by: Abel Vesa <[email protected]>

> ---
> drivers/clk/imx/clk-imx8mm.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
> index 3a873e0e278f..b72bad064d8d 100644
> --- a/drivers/clk/imx/clk-imx8mm.c
> +++ b/drivers/clk/imx/clk-imx8mm.c
> @@ -55,8 +55,8 @@ static const struct imx_pll14xx_rate_table imx8mm_pll1416x_tbl[] = {
> };
>
> static const struct imx_pll14xx_rate_table imx8mm_audiopll_tbl[] = {
> - PLL_1443X_RATE(786432000U, 655, 5, 2, 23593),
> - PLL_1443X_RATE(722534400U, 301, 5, 1, 3670),
> + PLL_1443X_RATE(393216000U, 262, 2, 3, 9437),
> + PLL_1443X_RATE(361267200U, 361, 3, 3, 17511),
> };
>
> static const struct imx_pll14xx_rate_table imx8mm_videopll_tbl[] = {
> --
> 2.16.4
>

2019-07-23 04:13:27

by Stephen Boyd

Subject: Re: [PATCH] clk: imx: imx8mm: fix audio pll setting

Quoting Peng Fan (2019-07-14 19:55:43)
> From: Peng Fan <[email protected]>
>
> The AUDIO PLL max support 650M, so the original clk settings violate
> spec. This patch makes the output 786432000 -> 393216000,
> and 722534400 -> 361267200 to aligned with NXP vendor kernel without any
> impact on audio functionality and go within 650MHz PLL limit.
>
> Cc: <[email protected]>
> Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
> Signed-off-by: Peng Fan <[email protected]>
> ---

Is this a problem right now, i.e. should I apply this to clk-fixes? Or
can this wait until next merge window?

2019-07-23 11:29:55

by Peng Fan

Subject: RE: [PATCH] clk: imx: imx8mm: fix audio pll setting

Hi Stephen,

> Subject: Re: [PATCH] clk: imx: imx8mm: fix audio pll setting
>
> Quoting Peng Fan (2019-07-14 19:55:43)
> > From: Peng Fan <[email protected]>
> >
> > The AUDIO PLL max support 650M, so the original clk settings violate
> > spec. This patch makes the output 786432000 -> 393216000, and
> > 722534400 -> 361267200 to aligned with NXP vendor kernel without any
> > impact on audio functionality and go within 650MHz PLL limit.
> >
> > Cc: <[email protected]>
> > Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
> > Signed-off-by: Peng Fan <[email protected]>
> > ---
>
> Is this a problem right now, i.e. should I apply this to clk-fixes? Or can this wait
> until next merge window?

Could wait until next merge window.

Thanks,
Peng.

2019-07-23 16:10:07

by Shawn Guo

Subject: Re: [PATCH] clk: imx: imx8mm: fix audio pll setting

On Mon, Jul 15, 2019 at 02:55:43AM +0000, Peng Fan wrote:
> From: Peng Fan <[email protected]>
>
> The AUDIO PLL max support 650M, so the original clk settings violate
> spec. This patch makes the output 786432000 -> 393216000,
> and 722534400 -> 361267200 to aligned with NXP vendor kernel without any
> impact on audio functionality and go within 650MHz PLL limit.
>
> Cc: <[email protected]>
> Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
> Signed-off-by: Peng Fan <[email protected]>

Applied, thanks.