This series converts the various Arm Mali GPU bindings to use the DT
schema format.
The Midgard and Bifrost bindings generate warnings on 'interrupt-names'
because there's all different ordering. The Utgard binding generates
warnings on Rockchip platforms because 'clock-names' order is reversed.
Rob
Rob Herring (3):
dt-bindings: Convert Arm Mali Midgard GPU to DT schema
dt-bindings: Convert Arm Mali Bifrost GPU to DT schema
dt-bindings: Convert Arm Mali Utgard GPU to DT schema
.../bindings/gpu/arm,mali-bifrost.txt | 92 ----------
.../bindings/gpu/arm,mali-bifrost.yaml | 115 ++++++++++++
.../bindings/gpu/arm,mali-midgard.txt | 119 -------------
.../bindings/gpu/arm,mali-midgard.yaml | 165 +++++++++++++++++
.../bindings/gpu/arm,mali-utgard.txt | 129 --------------
.../bindings/gpu/arm,mali-utgard.yaml | 166 ++++++++++++++++++
6 files changed, 446 insertions(+), 340 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-bifrost.txt
create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
delete mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
delete mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml
--
2.20.1
Convert the Arm Midgard GPU binding to DT schema format.
Signed-off-by: Rob Herring <[email protected]>
---
.../bindings/gpu/arm,mali-midgard.txt | 119 -------------
.../bindings/gpu/arm,mali-midgard.yaml | 165 ++++++++++++++++++
2 files changed, 165 insertions(+), 119 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
deleted file mode 100644
index 9b298edec5b2..000000000000
--- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
+++ /dev/null
@@ -1,119 +0,0 @@
-ARM Mali Midgard GPU
-====================
-
-Required properties:
-
-- compatible :
- * Must contain one of the following:
- + "arm,mali-t604"
- + "arm,mali-t624"
- + "arm,mali-t628"
- + "arm,mali-t720"
- + "arm,mali-t760"
- + "arm,mali-t820"
- + "arm,mali-t830"
- + "arm,mali-t860"
- + "arm,mali-t880"
- * which must be preceded by one of the following vendor specifics:
- + "allwinner,sun50i-h6-mali"
- + "amlogic,meson-gxm-mali"
- + "samsung,exynos5433-mali"
- + "rockchip,rk3288-mali"
- + "rockchip,rk3399-mali"
-
-- reg : Physical base address of the device and length of the register area.
-
-- interrupts : Contains the three IRQ lines required by Mali Midgard devices.
-
-- interrupt-names : Contains the names of IRQ resources in the order they were
- provided in the interrupts property. Must contain: "job", "mmu", "gpu".
-
-
-Optional properties:
-
-- clocks : Phandle to clock for the Mali Midgard device.
-
-- clock-names : Specify the names of the clocks specified in clocks
- when multiple clocks are present.
- * core: clock driving the GPU itself (When only one clock is present,
- assume it's this clock.)
- * bus: bus clock for the GPU
-
-- mali-supply : Phandle to regulator for the Mali device. Refer to
- Documentation/devicetree/bindings/regulator/regulator.txt for details.
-
-- operating-points-v2 : Refer to Documentation/devicetree/bindings/opp/opp.txt
- for details.
-
-- #cooling-cells: Refer to Documentation/devicetree/bindings/thermal/thermal.txt
- for details.
-
-- resets : Phandle of the GPU reset line.
-
-Vendor-specific bindings
-------------------------
-
-The Mali GPU is integrated very differently from one SoC to
-another. In order to accommodate those differences, you have the option
-to specify one more vendor-specific compatible, among:
-
-- "allwinner,sun50i-h6-mali"
- Required properties:
- - clocks : phandles to core and bus clocks
- - clock-names : must contain "core" and "bus"
- - resets: phandle to GPU reset line
-
-- "amlogic,meson-gxm-mali"
- Required properties:
- - resets : Should contain phandles of :
- + GPU reset line
- + GPU APB glue reset line
-
-Example for a Mali-T760:
-
-gpu@ffa30000 {
- compatible = "rockchip,rk3288-mali", "arm,mali-t760";
- reg = <0xffa30000 0x10000>;
- interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "job", "mmu", "gpu";
- clocks = <&cru ACLK_GPU>;
- mali-supply = <&vdd_gpu>;
- operating-points-v2 = <&gpu_opp_table>;
- power-domains = <&power RK3288_PD_GPU>;
- #cooling-cells = <2>;
-};
-
-gpu_opp_table: opp_table0 {
- compatible = "operating-points-v2";
-
- opp@533000000 {
- opp-hz = /bits/ 64 <533000000>;
- opp-microvolt = <1250000>;
- };
- opp@450000000 {
- opp-hz = /bits/ 64 <450000000>;
- opp-microvolt = <1150000>;
- };
- opp@400000000 {
- opp-hz = /bits/ 64 <400000000>;
- opp-microvolt = <1125000>;
- };
- opp@350000000 {
- opp-hz = /bits/ 64 <350000000>;
- opp-microvolt = <1075000>;
- };
- opp@266000000 {
- opp-hz = /bits/ 64 <266000000>;
- opp-microvolt = <1025000>;
- };
- opp@160000000 {
- opp-hz = /bits/ 64 <160000000>;
- opp-microvolt = <925000>;
- };
- opp@100000000 {
- opp-hz = /bits/ 64 <100000000>;
- opp-microvolt = <912500>;
- };
-};
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
new file mode 100644
index 000000000000..24c4af74fb8d
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
@@ -0,0 +1,165 @@
+# SPDX-License-Identifier: GPL-2.0-only
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpu/arm,mali-midgard.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Mali Midgard GPU
+
+maintainers:
+ - Rob Herring <[email protected]>
+
+properties:
+ $nodename:
+ pattern: '^gpu@[a-f0-9]+$'
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - allwinner,sun50i-h6-mali
+ - const: arm,mali-t720
+ - items:
+ - enum:
+ - amlogic,meson-gxm-mali
+ - const: arm,mali-t820
+ - items:
+ - enum:
+ - rockchip,rk3288-mali
+ - const: arm,mali-t760
+ - items:
+ - enum:
+ - rockchip,rk3399-mali
+ - const: arm,mali-t860
+ - items:
+ - enum:
+ - samsung,exynos5433-mali
+ - const: arm,mali-t760
+
+ # "arm,mali-t604"
+ # "arm,mali-t624"
+ # "arm,mali-t628"
+ # "arm,mali-t830"
+ # "arm,mali-t880"
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: Job interrupt
+ - description: MMU interrupt
+ - description: GPU interrupt
+
+ interrupt-names:
+ items:
+ - const: job
+ - const: mmu
+ - const: gpu
+
+ clocks:
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: core
+ - const: bus
+
+ mali-supply:
+ maxItems: 1
+
+ resets:
+ minItems: 1
+ maxItems: 2
+
+ operating-points-v2: true
+
+ "#cooling-cells":
+ const: 2
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: allwinner,sun50i-h6-mali
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ required:
+ - clocks
+ - clock-names
+ - resets
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: amlogic,meson-gxm-mali
+ then:
+ properties:
+ resets:
+ minItems: 2
+ required:
+ - resets
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ gpu@ffa30000 {
+ compatible = "rockchip,rk3288-mali", "arm,mali-t760";
+ reg = <0xffa30000 0x10000>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "job", "mmu", "gpu";
+ clocks = <&cru 0>;
+ mali-supply = <&vdd_gpu>;
+ operating-points-v2 = <&gpu_opp_table>;
+ power-domains = <&power 0>;
+ #cooling-cells = <2>;
+ };
+
+ gpu_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+
+ opp@533000000 {
+ opp-hz = /bits/ 64 <533000000>;
+ opp-microvolt = <1250000>;
+ };
+ opp@450000000 {
+ opp-hz = /bits/ 64 <450000000>;
+ opp-microvolt = <1150000>;
+ };
+ opp@400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <1125000>;
+ };
+ opp@350000000 {
+ opp-hz = /bits/ 64 <350000000>;
+ opp-microvolt = <1075000>;
+ };
+ opp@266000000 {
+ opp-hz = /bits/ 64 <266000000>;
+ opp-microvolt = <1025000>;
+ };
+ opp@160000000 {
+ opp-hz = /bits/ 64 <160000000>;
+ opp-microvolt = <925000>;
+ };
+ opp@100000000 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <912500>;
+ };
+ };
+
+...
--
2.20.1
Convert the Arm Utgard GPU binding to DT schema format.
'allwinner,sun8i-a23-mali' compatible was not documented, so add it.
Signed-off-by: Rob Herring <[email protected]>
---
.../bindings/gpu/arm,mali-utgard.txt | 129 --------------
.../bindings/gpu/arm,mali-utgard.yaml | 166 ++++++++++++++++++
2 files changed, 166 insertions(+), 129 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
deleted file mode 100644
index ba895efe3039..000000000000
--- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
+++ /dev/null
@@ -1,129 +0,0 @@
-ARM Mali Utgard GPU
-===================
-
-Required properties:
- - compatible
- * Must be one of the following:
- + "arm,mali-300"
- + "arm,mali-400"
- + "arm,mali-450"
- * And, optionally, one of the vendor specific compatible:
- + allwinner,sun4i-a10-mali
- + allwinner,sun7i-a20-mali
- + allwinner,sun8i-h3-mali
- + allwinner,sun50i-a64-mali
- + allwinner,sun50i-h5-mali
- + amlogic,meson8-mali
- + amlogic,meson8b-mali
- + amlogic,meson-gxbb-mali
- + amlogic,meson-gxl-mali
- + samsung,exynos4210-mali
- + rockchip,rk3036-mali
- + rockchip,rk3066-mali
- + rockchip,rk3188-mali
- + rockchip,rk3228-mali
- + rockchip,rk3328-mali
- + stericsson,db8500-mali
- + hisilicon,hi6220-mali
-
- - reg: Physical base address and length of the GPU registers
-
- - interrupts: an entry for each entry in interrupt-names.
- See ../interrupt-controller/interrupts.txt for details.
-
- - interrupt-names:
- * ppX: Pixel Processor X interrupt (X from 0 to 7)
- * ppmmuX: Pixel Processor X MMU interrupt (X from 0 to 7)
- * pp: Pixel Processor broadcast interrupt (mali-450 only)
- * gp: Geometry Processor interrupt
- * gpmmu: Geometry Processor MMU interrupt
-
- - clocks: an entry for each entry in clock-names
- - clock-names:
- * bus: bus clock for the GPU
- * core: clock driving the GPU itself
-
-Optional properties:
- - interrupt-names and interrupts:
- * pmu: Power Management Unit interrupt, if implemented in hardware
-
- - memory-region:
- Memory region to allocate from, as defined in
- Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
-
- - mali-supply:
- Phandle to regulator for the Mali device, as defined in
- Documentation/devicetree/bindings/regulator/regulator.txt for details.
-
- - operating-points-v2:
- Operating Points for the GPU, as defined in
- Documentation/devicetree/bindings/opp/opp.txt
-
- - power-domains:
- A power domain consumer specifier as defined in
- Documentation/devicetree/bindings/power/power_domain.txt
-
-Vendor-specific bindings
-------------------------
-
-The Mali GPU is integrated very differently from one SoC to
-another. In order to accomodate those differences, you have the option
-to specify one more vendor-specific compatible, among:
-
- - allwinner,sun4i-a10-mali
- Required properties:
- * resets: phandle to the reset line for the GPU
-
- - allwinner,sun7i-a20-mali
- Required properties:
- * resets: phandle to the reset line for the GPU
-
- - allwinner,sun50i-a64-mali
- Required properties:
- * resets: phandle to the reset line for the GPU
-
- - allwinner,sun50i-h5-mali
- Required properties:
- * resets: phandle to the reset line for the GPU
-
- - amlogic,meson8-mali and amlogic,meson8b-mali
- Required properties:
- * resets: phandle to the reset line for the GPU
-
- - Rockchip variants:
- Required properties:
- * resets: phandle to the reset line for the GPU
-
- - stericsson,db8500-mali
- Required properties:
- * interrupt-names and interrupts:
- + combined: combined interrupt of all of the above lines
-
- - hisilicon,hi6220-mali
- Required properties:
- * resets: phandles to the reset lines for the GPU
-
-Example:
-
-mali: gpu@1c40000 {
- compatible = "allwinner,sun7i-a20-mali", "arm,mali-400";
- reg = <0x01c40000 0x10000>;
- interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "gp",
- "gpmmu",
- "pp0",
- "ppmmu0",
- "pp1",
- "ppmmu1",
- "pmu";
- clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
- clock-names = "bus", "core";
- resets = <&ccu RST_BUS_GPU>;
-};
-
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml
new file mode 100644
index 000000000000..d3883ba09174
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml
@@ -0,0 +1,166 @@
+# SPDX-License-Identifier: GPL-2.0-only
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpu/arm,mali-utgard.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Mali Utgard GPU
+
+maintainers:
+ - Rob Herring <[email protected]>
+ - Maxime Ripard <[email protected]>
+ - Heiko Stuebner <[email protected]>
+
+properties:
+ $nodename:
+ pattern: '^gpu@[a-f0-9]+$'
+ compatible:
+ oneOf:
+ - items:
+ - const: allwinner,sun8i-a23-mali
+ - const: allwinner,sun7i-a20-mali
+ - const: arm,mali-400
+ - items:
+ - enum:
+ - allwinner,sun4i-a10-mali
+ - allwinner,sun7i-a20-mali
+ - allwinner,sun8i-h3-mali
+ - allwinner,sun50i-a64-mali
+ - rockchip,rk3036-mali
+ - rockchip,rk3066-mali
+ - rockchip,rk3188-mali
+ - rockchip,rk3228-mali
+ - samsung,exynos4210-mali
+ - stericsson,db8500-mali
+ - const: arm,mali-400
+ - items:
+ - enum:
+ - allwinner,sun50i-h5-mali
+ - amlogic,meson8-mali
+ - amlogic,meson8b-mali
+ - amlogic,meson-gxbb-mali
+ - amlogic,meson-gxl-mali
+ - hisilicon,hi6220-mali
+ - rockchip,rk3328-mali
+ - const: arm,mali-450
+
+ # "arm,mali-300"
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ minItems: 4
+ maxItems: 20
+
+ interrupt-names:
+ allOf:
+ - additionalItems: true
+ minItems: 4
+ maxItems: 20
+ items:
+ # At least enforce the first 2 interrupts
+ - const: gp
+ - const: gpmmu
+ - items:
+ # Not ideal as any order and combination are allowed
+ enum:
+ - gp # Geometry Processor interrupt
+ - gpmmu # Geometry Processor MMU interrupt
+ - pp # Pixel Processor broadcast interrupt (mali-450 only)
+ - pp0 # Pixel Processor X interrupt (X from 0 to 7)
+ - ppmmu0 # Pixel Processor X MMU interrupt (X from 0 to 7)
+ - pp1
+ - ppmmu1
+ - pp2
+ - ppmmu2
+ - pp3
+ - ppmmu3
+ - pp4
+ - ppmmu4
+ - pp5
+ - ppmmu5
+ - pp6
+ - ppmmu6
+ - pp7
+ - ppmmu7
+ - pmu # Power Management Unit interrupt (optional)
+ - combined # stericsson,db8500-mali only
+
+ clocks:
+ maxItems: 2
+
+ clock-names:
+ items:
+ - const: bus
+ - const: core
+
+ memory-region: true
+
+ mali-supply:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ operating-points-v2: true
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - allwinner,sun4i-a10-mali
+ - allwinner,sun7i-a20-mali
+ - allwinner,sun50i-a64-mali
+ - allwinner,sun50i-h5-mali
+ - amlogic,meson8-mali
+ - amlogic,meson8b-mali
+ - hisilicon,hi6220-mali
+ - rockchip,rk3036-mali
+ - rockchip,rk3066-mali
+ - rockchip,rk3188-mali
+ - rockchip,rk3228-mali
+ - rockchip,rk3328-mali
+ then:
+ required:
+ - resets
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ mali: gpu@1c40000 {
+ compatible = "allwinner,sun7i-a20-mali", "arm,mali-400";
+ reg = <0x01c40000 0x10000>;
+ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "gp",
+ "gpmmu",
+ "pp0",
+ "ppmmu0",
+ "pp1",
+ "ppmmu1",
+ "pmu";
+ clocks = <&ccu 1>, <&ccu 2>;
+ clock-names = "bus", "core";
+ resets = <&ccu 1>;
+ };
+
+...
--
2.20.1
Convert the Arm Bifrost GPU binding to DT schema format.
Signed-off-by: Rob Herring <[email protected]>
---
.../bindings/gpu/arm,mali-bifrost.txt | 92 --------------
.../bindings/gpu/arm,mali-bifrost.yaml | 115 ++++++++++++++++++
2 files changed, 115 insertions(+), 92 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-bifrost.txt
create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.txt b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.txt
deleted file mode 100644
index b8be9dbc68b4..000000000000
--- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.txt
+++ /dev/null
@@ -1,92 +0,0 @@
-ARM Mali Bifrost GPU
-====================
-
-Required properties:
-
-- compatible :
- * Since Mali Bifrost GPU model/revision is fully discoverable by reading
- some determined registers, must contain the following:
- + "arm,mali-bifrost"
- * which must be preceded by one of the following vendor specifics:
- + "amlogic,meson-g12a-mali"
-
-- reg : Physical base address of the device and length of the register area.
-
-- interrupts : Contains the three IRQ lines required by Mali Bifrost devices,
- in the following defined order.
-
-- interrupt-names : Contains the names of IRQ resources in this exact defined
- order: "job", "mmu", "gpu".
-
-Optional properties:
-
-- clocks : Phandle to clock for the Mali Bifrost device.
-
-- mali-supply : Phandle to regulator for the Mali device. Refer to
- Documentation/devicetree/bindings/regulator/regulator.txt for details.
-
-- operating-points-v2 : Refer to Documentation/devicetree/bindings/opp/opp.txt
- for details.
-
-- resets : Phandle of the GPU reset line.
-
-Vendor-specific bindings
-------------------------
-
-The Mali GPU is integrated very differently from one SoC to
-another. In order to accommodate those differences, you have the option
-to specify one more vendor-specific compatible, among:
-
-- "amlogic,meson-g12a-mali"
- Required properties:
- - resets : Should contain phandles of :
- + GPU reset line
- + GPU APB glue reset line
-
-Example for a Mali-G31:
-
-gpu@ffa30000 {
- compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
- reg = <0xffe40000 0x10000>;
- interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "job", "mmu", "gpu";
- clocks = <&clk CLKID_MALI>;
- mali-supply = <&vdd_gpu>;
- operating-points-v2 = <&gpu_opp_table>;
- resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>;
-};
-
-gpu_opp_table: opp_table0 {
- compatible = "operating-points-v2";
-
- opp@533000000 {
- opp-hz = /bits/ 64 <533000000>;
- opp-microvolt = <1250000>;
- };
- opp@450000000 {
- opp-hz = /bits/ 64 <450000000>;
- opp-microvolt = <1150000>;
- };
- opp@400000000 {
- opp-hz = /bits/ 64 <400000000>;
- opp-microvolt = <1125000>;
- };
- opp@350000000 {
- opp-hz = /bits/ 64 <350000000>;
- opp-microvolt = <1075000>;
- };
- opp@266000000 {
- opp-hz = /bits/ 64 <266000000>;
- opp-microvolt = <1025000>;
- };
- opp@160000000 {
- opp-hz = /bits/ 64 <160000000>;
- opp-microvolt = <925000>;
- };
- opp@100000000 {
- opp-hz = /bits/ 64 <100000000>;
- opp-microvolt = <912500>;
- };
-};
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
new file mode 100644
index 000000000000..51f63c9dac46
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
@@ -0,0 +1,115 @@
+# SPDX-License-Identifier: GPL-2.0-only
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Mali Bifrost GPU
+
+maintainers:
+ - Rob Herring <[email protected]>
+
+properties:
+ $nodename:
+ pattern: '^gpu@[a-f0-9]+$'
+
+ compatible:
+ items:
+ - enum:
+ - amlogic,meson-g12a-mali
+ - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: Job interrupt
+ - description: MMU interrupt
+ - description: GPU interrupt
+
+ interrupt-names:
+ items:
+ - const: job
+ - const: mmu
+ - const: gpu
+
+ clocks:
+ maxItems: 1
+
+ mali-supply:
+ maxItems: 1
+
+ operating-points-v2: true
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: amlogic,meson-g12a-mali
+ then:
+ properties:
+ resets:
+ minItems: 2
+ required:
+ - resets
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ gpu@ffe40000 {
+ compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
+ reg = <0xffe40000 0x10000>;
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "job", "mmu", "gpu";
+ clocks = <&clk 1>;
+ mali-supply = <&vdd_gpu>;
+ operating-points-v2 = <&gpu_opp_table>;
+ resets = <&reset 0>, <&reset 1>;
+ };
+
+ gpu_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+
+ opp@533000000 {
+ opp-hz = /bits/ 64 <533000000>;
+ opp-microvolt = <1250000>;
+ };
+ opp@450000000 {
+ opp-hz = /bits/ 64 <450000000>;
+ opp-microvolt = <1150000>;
+ };
+ opp@400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <1125000>;
+ };
+ opp@350000000 {
+ opp-hz = /bits/ 64 <350000000>;
+ opp-microvolt = <1075000>;
+ };
+ opp@266000000 {
+ opp-hz = /bits/ 64 <266000000>;
+ opp-microvolt = <1025000>;
+ };
+ opp@160000000 {
+ opp-hz = /bits/ 64 <160000000>;
+ opp-microvolt = <925000>;
+ };
+ opp@100000000 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <912500>;
+ };
+ };
+
+...
--
2.20.1
Hi Rob,
On 20/08/2019 21:59, Rob Herring wrote:
> Convert the Arm Midgard GPU binding to DT schema format.
>
> Signed-off-by: Rob Herring <[email protected]>
> ---
> .../bindings/gpu/arm,mali-midgard.txt | 119 -------------
> .../bindings/gpu/arm,mali-midgard.yaml | 165 ++++++++++++++++++
> 2 files changed, 165 insertions(+), 119 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
>
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> deleted file mode 100644
> index 9b298edec5b2..000000000000
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> +++ /dev/null
> @@ -1,119 +0,0 @@
> -ARM Mali Midgard GPU
> -====================
> -
> -Required properties:
> -
> -- compatible :
> - * Must contain one of the following:
> - + "arm,mali-t604"
> - + "arm,mali-t624"
> - + "arm,mali-t628"
> - + "arm,mali-t720"
> - + "arm,mali-t760"
> - + "arm,mali-t820"
> - + "arm,mali-t830"
> - + "arm,mali-t860"
> - + "arm,mali-t880"
> - * which must be preceded by one of the following vendor specifics:
> - + "allwinner,sun50i-h6-mali"
> - + "amlogic,meson-gxm-mali"
> - + "samsung,exynos5433-mali"
> - + "rockchip,rk3288-mali"
> - + "rockchip,rk3399-mali"
> -
> -- reg : Physical base address of the device and length of the register area.
> -
> -- interrupts : Contains the three IRQ lines required by Mali Midgard devices.
> -
> -- interrupt-names : Contains the names of IRQ resources in the order they were
> - provided in the interrupts property. Must contain: "job", "mmu", "gpu".
> -
> -
> -Optional properties:
> -
> -- clocks : Phandle to clock for the Mali Midgard device.
> -
> -- clock-names : Specify the names of the clocks specified in clocks
> - when multiple clocks are present.
> - * core: clock driving the GPU itself (When only one clock is present,
> - assume it's this clock.)
> - * bus: bus clock for the GPU
> -
> -- mali-supply : Phandle to regulator for the Mali device. Refer to
> - Documentation/devicetree/bindings/regulator/regulator.txt for details.
> -
> -- operating-points-v2 : Refer to Documentation/devicetree/bindings/opp/opp.txt
> - for details.
> -
> -- #cooling-cells: Refer to Documentation/devicetree/bindings/thermal/thermal.txt
> - for details.
> -
> -- resets : Phandle of the GPU reset line.
> -
> -Vendor-specific bindings
> -------------------------
> -
> -The Mali GPU is integrated very differently from one SoC to
> -another. In order to accommodate those differences, you have the option
> -to specify one more vendor-specific compatible, among:
> -
> -- "allwinner,sun50i-h6-mali"
> - Required properties:
> - - clocks : phandles to core and bus clocks
> - - clock-names : must contain "core" and "bus"
> - - resets: phandle to GPU reset line
> -
> -- "amlogic,meson-gxm-mali"
> - Required properties:
> - - resets : Should contain phandles of :
> - + GPU reset line
> - + GPU APB glue reset line
> -
> -Example for a Mali-T760:
> -
> -gpu@ffa30000 {
> - compatible = "rockchip,rk3288-mali", "arm,mali-t760";
> - reg = <0xffa30000 0x10000>;
> - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "job", "mmu", "gpu";
> - clocks = <&cru ACLK_GPU>;
> - mali-supply = <&vdd_gpu>;
> - operating-points-v2 = <&gpu_opp_table>;
> - power-domains = <&power RK3288_PD_GPU>;
> - #cooling-cells = <2>;
> -};
> -
> -gpu_opp_table: opp_table0 {
> - compatible = "operating-points-v2";
> -
> - opp@533000000 {
> - opp-hz = /bits/ 64 <533000000>;
> - opp-microvolt = <1250000>;
> - };
> - opp@450000000 {
> - opp-hz = /bits/ 64 <450000000>;
> - opp-microvolt = <1150000>;
> - };
> - opp@400000000 {
> - opp-hz = /bits/ 64 <400000000>;
> - opp-microvolt = <1125000>;
> - };
> - opp@350000000 {
> - opp-hz = /bits/ 64 <350000000>;
> - opp-microvolt = <1075000>;
> - };
> - opp@266000000 {
> - opp-hz = /bits/ 64 <266000000>;
> - opp-microvolt = <1025000>;
> - };
> - opp@160000000 {
> - opp-hz = /bits/ 64 <160000000>;
> - opp-microvolt = <925000>;
> - };
> - opp@100000000 {
> - opp-hz = /bits/ 64 <100000000>;
> - opp-microvolt = <912500>;
> - };
> -};
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
> new file mode 100644
> index 000000000000..24c4af74fb8d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
> @@ -0,0 +1,165 @@
> +# SPDX-License-Identifier: GPL-2.0-only
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/gpu/arm,mali-midgard.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ARM Mali Midgard GPU
> +
> +maintainers:
> + - Rob Herring <[email protected]>
> +
> +properties:
> + $nodename:
> + pattern: '^gpu@[a-f0-9]+$'
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - allwinner,sun50i-h6-mali
> + - const: arm,mali-t720
> + - items:
> + - enum:
> + - amlogic,meson-gxm-mali
> + - const: arm,mali-t820
> + - items:
> + - enum:
> + - rockchip,rk3288-mali
> + - const: arm,mali-t760
> + - items:
> + - enum:
> + - rockchip,rk3399-mali
> + - const: arm,mali-t860
> + - items:
> + - enum:
> + - samsung,exynos5433-mali
> + - const: arm,mali-t760
> +
> + # "arm,mali-t604"
> + # "arm,mali-t624"
> + # "arm,mali-t628"
> + # "arm,mali-t830"
> + # "arm,mali-t880"
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + items:
> + - description: Job interrupt
> + - description: MMU interrupt
> + - description: GPU interrupt
> +
> + interrupt-names:
> + items:
> + - const: job
> + - const: mmu
> + - const: gpu
> +
> + clocks:
> + minItems: 1
> + maxItems: 2
> +
> + clock-names:
> + minItems: 1
> + items:
> + - const: core
> + - const: bus
> +
> + mali-supply:
> + maxItems: 1
> +
> + resets:
> + minItems: 1
> + maxItems: 2
> +
> + operating-points-v2: true
> +
> + "#cooling-cells":
> + const: 2
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - interrupt-names
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: allwinner,sun50i-h6-mali
> + then:
> + properties:
> + clocks:
> + minItems: 2
> + required:
> + - clocks
> + - clock-names
> + - resets
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: amlogic,meson-gxm-mali
> + then:
> + properties:
> + resets:
> + minItems: 2
> + required:
> + - resets
The original bindings was wrong, In fact, clocks should be required here aswell.
Same for bifrost and utgard...
Should I send a fixup patch ?
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + gpu@ffa30000 {
> + compatible = "rockchip,rk3288-mali", "arm,mali-t760";
> + reg = <0xffa30000 0x10000>;
> + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "job", "mmu", "gpu";
> + clocks = <&cru 0>;
> + mali-supply = <&vdd_gpu>;
> + operating-points-v2 = <&gpu_opp_table>;
> + power-domains = <&power 0>;
> + #cooling-cells = <2>;
> + };
> +
> + gpu_opp_table: opp_table0 {
> + compatible = "operating-points-v2";
> +
> + opp@533000000 {
> + opp-hz = /bits/ 64 <533000000>;
> + opp-microvolt = <1250000>;
> + };
> + opp@450000000 {
> + opp-hz = /bits/ 64 <450000000>;
> + opp-microvolt = <1150000>;
> + };
> + opp@400000000 {
> + opp-hz = /bits/ 64 <400000000>;
> + opp-microvolt = <1125000>;
> + };
> + opp@350000000 {
> + opp-hz = /bits/ 64 <350000000>;
> + opp-microvolt = <1075000>;
> + };
> + opp@266000000 {
> + opp-hz = /bits/ 64 <266000000>;
> + opp-microvolt = <1025000>;
> + };
> + opp@160000000 {
> + opp-hz = /bits/ 64 <160000000>;
> + opp-microvolt = <925000>;
> + };
> + opp@100000000 {
> + opp-hz = /bits/ 64 <100000000>;
> + opp-microvolt = <912500>;
> + };
> + };
> +
> +...
>
Neil
Hi,
On 20/08/2019 21:59, Rob Herring wrote:
> This series converts the various Arm Mali GPU bindings to use the DT
> schema format.
>
> The Midgard and Bifrost bindings generate warnings on 'interrupt-names'
> because there's all different ordering. The Utgard binding generates
> warnings on Rockchip platforms because 'clock-names' order is reversed.
Except the fact clocks should be required on all amlogic bindings,
Reviewed-by: Neil Armstrong <[email protected]>
I'll send a fixup patch to enforce clocks.
Thanks,
Neil
>
> Rob
>
> Rob Herring (3):
> dt-bindings: Convert Arm Mali Midgard GPU to DT schema
> dt-bindings: Convert Arm Mali Bifrost GPU to DT schema
> dt-bindings: Convert Arm Mali Utgard GPU to DT schema
>
> .../bindings/gpu/arm,mali-bifrost.txt | 92 ----------
> .../bindings/gpu/arm,mali-bifrost.yaml | 115 ++++++++++++
> .../bindings/gpu/arm,mali-midgard.txt | 119 -------------
> .../bindings/gpu/arm,mali-midgard.yaml | 165 +++++++++++++++++
> .../bindings/gpu/arm,mali-utgard.txt | 129 --------------
> .../bindings/gpu/arm,mali-utgard.yaml | 166 ++++++++++++++++++
> 6 files changed, 446 insertions(+), 340 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-bifrost.txt
> create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> delete mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
> delete mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
> create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml
>
Hi Rob,
On Tue, Aug 20, 2019 at 02:59:56PM -0500, Rob Herring wrote:
> This series converts the various Arm Mali GPU bindings to use the DT
> schema format.
>
> The Midgard and Bifrost bindings generate warnings on 'interrupt-names'
> because there's all different ordering. The Utgard binding generates
> warnings on Rockchip platforms because 'clock-names' order is reversed.
Thank for taking care of that one, it was on my radar but I didn't
really want to actually do it :)
Acked-by: Maxime Ripard <[email protected]>
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Wed, Aug 21, 2019 at 2:12 AM Neil Armstrong <[email protected]> wrote:
>
> Hi Rob,
>
> On 20/08/2019 21:59, Rob Herring wrote:
> > Convert the Arm Midgard GPU binding to DT schema format.
> >
> > Signed-off-by: Rob Herring <[email protected]>
> > ---
> > .../bindings/gpu/arm,mali-midgard.txt | 119 -------------
> > .../bindings/gpu/arm,mali-midgard.yaml | 165 ++++++++++++++++++
> > 2 files changed, 165 insertions(+), 119 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> > create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> > deleted file mode 100644
> > index 9b298edec5b2..000000000000
> > --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> > +++ /dev/null
> > @@ -1,119 +0,0 @@
> > -ARM Mali Midgard GPU
> > -====================
> > -
> > -Required properties:
> > -
> > -- compatible :
> > - * Must contain one of the following:
> > - + "arm,mali-t604"
> > - + "arm,mali-t624"
> > - + "arm,mali-t628"
> > - + "arm,mali-t720"
> > - + "arm,mali-t760"
> > - + "arm,mali-t820"
> > - + "arm,mali-t830"
> > - + "arm,mali-t860"
> > - + "arm,mali-t880"
> > - * which must be preceded by one of the following vendor specifics:
> > - + "allwinner,sun50i-h6-mali"
> > - + "amlogic,meson-gxm-mali"
> > - + "samsung,exynos5433-mali"
> > - + "rockchip,rk3288-mali"
> > - + "rockchip,rk3399-mali"
> > -
> > -- reg : Physical base address of the device and length of the register area.
> > -
> > -- interrupts : Contains the three IRQ lines required by Mali Midgard devices.
> > -
> > -- interrupt-names : Contains the names of IRQ resources in the order they were
> > - provided in the interrupts property. Must contain: "job", "mmu", "gpu".
> > -
> > -
> > -Optional properties:
> > -
> > -- clocks : Phandle to clock for the Mali Midgard device.
> > -
> > -- clock-names : Specify the names of the clocks specified in clocks
> > - when multiple clocks are present.
> > - * core: clock driving the GPU itself (When only one clock is present,
> > - assume it's this clock.)
> > - * bus: bus clock for the GPU
> > -
> > -- mali-supply : Phandle to regulator for the Mali device. Refer to
> > - Documentation/devicetree/bindings/regulator/regulator.txt for details.
> > -
> > -- operating-points-v2 : Refer to Documentation/devicetree/bindings/opp/opp.txt
> > - for details.
> > -
> > -- #cooling-cells: Refer to Documentation/devicetree/bindings/thermal/thermal.txt
> > - for details.
> > -
> > -- resets : Phandle of the GPU reset line.
> > -
> > -Vendor-specific bindings
> > -------------------------
> > -
> > -The Mali GPU is integrated very differently from one SoC to
> > -another. In order to accommodate those differences, you have the option
> > -to specify one more vendor-specific compatible, among:
> > -
> > -- "allwinner,sun50i-h6-mali"
> > - Required properties:
> > - - clocks : phandles to core and bus clocks
> > - - clock-names : must contain "core" and "bus"
> > - - resets: phandle to GPU reset line
> > -
> > -- "amlogic,meson-gxm-mali"
> > - Required properties:
> > - - resets : Should contain phandles of :
> > - + GPU reset line
> > - + GPU APB glue reset line
> > -
> > -Example for a Mali-T760:
> > -
> > -gpu@ffa30000 {
> > - compatible = "rockchip,rk3288-mali", "arm,mali-t760";
> > - reg = <0xffa30000 0x10000>;
> > - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
> > - <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
> > - <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> > - interrupt-names = "job", "mmu", "gpu";
> > - clocks = <&cru ACLK_GPU>;
> > - mali-supply = <&vdd_gpu>;
> > - operating-points-v2 = <&gpu_opp_table>;
> > - power-domains = <&power RK3288_PD_GPU>;
> > - #cooling-cells = <2>;
> > -};
> > -
> > -gpu_opp_table: opp_table0 {
> > - compatible = "operating-points-v2";
> > -
> > - opp@533000000 {
> > - opp-hz = /bits/ 64 <533000000>;
> > - opp-microvolt = <1250000>;
> > - };
> > - opp@450000000 {
> > - opp-hz = /bits/ 64 <450000000>;
> > - opp-microvolt = <1150000>;
> > - };
> > - opp@400000000 {
> > - opp-hz = /bits/ 64 <400000000>;
> > - opp-microvolt = <1125000>;
> > - };
> > - opp@350000000 {
> > - opp-hz = /bits/ 64 <350000000>;
> > - opp-microvolt = <1075000>;
> > - };
> > - opp@266000000 {
> > - opp-hz = /bits/ 64 <266000000>;
> > - opp-microvolt = <1025000>;
> > - };
> > - opp@160000000 {
> > - opp-hz = /bits/ 64 <160000000>;
> > - opp-microvolt = <925000>;
> > - };
> > - opp@100000000 {
> > - opp-hz = /bits/ 64 <100000000>;
> > - opp-microvolt = <912500>;
> > - };
> > -};
> > diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
> > new file mode 100644
> > index 000000000000..24c4af74fb8d
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
> > @@ -0,0 +1,165 @@
> > +# SPDX-License-Identifier: GPL-2.0-only
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/gpu/arm,mali-midgard.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: ARM Mali Midgard GPU
> > +
> > +maintainers:
> > + - Rob Herring <[email protected]>
> > +
> > +properties:
> > + $nodename:
> > + pattern: '^gpu@[a-f0-9]+$'
> > + compatible:
> > + oneOf:
> > + - items:
> > + - enum:
> > + - allwinner,sun50i-h6-mali
> > + - const: arm,mali-t720
> > + - items:
> > + - enum:
> > + - amlogic,meson-gxm-mali
> > + - const: arm,mali-t820
> > + - items:
> > + - enum:
> > + - rockchip,rk3288-mali
> > + - const: arm,mali-t760
> > + - items:
> > + - enum:
> > + - rockchip,rk3399-mali
> > + - const: arm,mali-t860
> > + - items:
> > + - enum:
> > + - samsung,exynos5433-mali
> > + - const: arm,mali-t760
> > +
> > + # "arm,mali-t604"
> > + # "arm,mali-t624"
> > + # "arm,mali-t628"
> > + # "arm,mali-t830"
> > + # "arm,mali-t880"
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + items:
> > + - description: Job interrupt
> > + - description: MMU interrupt
> > + - description: GPU interrupt
> > +
> > + interrupt-names:
> > + items:
> > + - const: job
> > + - const: mmu
> > + - const: gpu
> > +
> > + clocks:
> > + minItems: 1
> > + maxItems: 2
> > +
> > + clock-names:
> > + minItems: 1
> > + items:
> > + - const: core
> > + - const: bus
> > +
> > + mali-supply:
> > + maxItems: 1
> > +
> > + resets:
> > + minItems: 1
> > + maxItems: 2
> > +
> > + operating-points-v2: true
> > +
> > + "#cooling-cells":
> > + const: 2
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - interrupts
> > + - interrupt-names
> > +
> > +allOf:
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + const: allwinner,sun50i-h6-mali
> > + then:
> > + properties:
> > + clocks:
> > + minItems: 2
> > + required:
> > + - clocks
> > + - clock-names
> > + - resets
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + const: amlogic,meson-gxm-mali
> > + then:
> > + properties:
> > + resets:
> > + minItems: 2
> > + required:
> > + - resets
>
> The original bindings was wrong, In fact, clocks should be required here aswell.
> Same for bifrost and utgard...
>
> Should I send a fixup patch ?
I think we should just make clocks required. I can't imagine anyone
not using the clock binding.
Rob
On Wed, Aug 21, 2019 at 12:24 PM Heiko Stuebner <[email protected]> wrote:
>
> Am Dienstag, 20. August 2019, 21:59:56 CEST schrieb Rob Herring:
> > This series converts the various Arm Mali GPU bindings to use the DT
> > schema format.
> >
> > The Midgard and Bifrost bindings generate warnings on 'interrupt-names'
> > because there's all different ordering. The Utgard binding generates
> > warnings on Rockchip platforms because 'clock-names' order is reversed.
>
> Are you planning on sending fixes for these, should I just change the
> ordering myself?
I wasn't planning on it. I just add warnings. :)
>
> > Rob Herring (3):
> > dt-bindings: Convert Arm Mali Midgard GPU to DT schema
> > dt-bindings: Convert Arm Mali Bifrost GPU to DT schema
> > dt-bindings: Convert Arm Mali Utgard GPU to DT schema
>
> Acked-by: Heiko Stuebner <[email protected]>
Thanks.
Rob
Am Dienstag, 20. August 2019, 21:59:56 CEST schrieb Rob Herring:
> This series converts the various Arm Mali GPU bindings to use the DT
> schema format.
>
> The Midgard and Bifrost bindings generate warnings on 'interrupt-names'
> because there's all different ordering. The Utgard binding generates
> warnings on Rockchip platforms because 'clock-names' order is reversed.
Are you planning on sending fixes for these, should I just change the
ordering myself?
> Rob Herring (3):
> dt-bindings: Convert Arm Mali Midgard GPU to DT schema
> dt-bindings: Convert Arm Mali Bifrost GPU to DT schema
> dt-bindings: Convert Arm Mali Utgard GPU to DT schema
Acked-by: Heiko Stuebner <[email protected]>
Thanks for doing the conversion
Heiko
> .../bindings/gpu/arm,mali-bifrost.txt | 92 ----------
> .../bindings/gpu/arm,mali-bifrost.yaml | 115 ++++++++++++
> .../bindings/gpu/arm,mali-midgard.txt | 119 -------------
> .../bindings/gpu/arm,mali-midgard.yaml | 165 +++++++++++++++++
> .../bindings/gpu/arm,mali-utgard.txt | 129 --------------
> .../bindings/gpu/arm,mali-utgard.yaml | 166 ++++++++++++++++++
> 6 files changed, 446 insertions(+), 340 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-bifrost.txt
> create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> delete mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
> delete mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
> create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml
>
>