Description:
- Reading configuration register RCPM_IPPDEXPCR1
always return zero
Workaround:
- Save register RCPM_IPPDEXPCR1's value to
register SCFG_SPARECR8.(uboot's psci also
need reading value from the register SCFG_SPARECR8
to set register RCPM_IPPDEXPCR1)
Impact:
- FlexTimer module will cannot wakeup system in
deep sleep on SoC LS1021A
Signed-off-by: Biwen Li <[email protected]>
---
Change in v4:
- rename property name
fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr
Change in v3:
- update commit message
- rename property name
fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
Change in v2:
- fix stype problems
drivers/soc/fsl/rcpm.c | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c
index 82c0ad5e663e..9a29c482fc2e 100644
--- a/drivers/soc/fsl/rcpm.c
+++ b/drivers/soc/fsl/rcpm.c
@@ -13,6 +13,8 @@
#include <linux/slab.h>
#include <linux/suspend.h>
#include <linux/kernel.h>
+#include <linux/regmap.h>
+#include <linux/mfd/syscon.h>
#define RCPM_WAKEUP_CELL_MAX_SIZE 7
@@ -29,6 +31,9 @@ static int rcpm_pm_prepare(struct device *dev)
struct rcpm *rcpm;
u32 value[RCPM_WAKEUP_CELL_MAX_SIZE + 1], tmp;
int i, ret, idx;
+ struct regmap *scfg_addr_regmap = NULL;
+ u32 reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
+ u32 reg_value = 0;
rcpm = dev_get_drvdata(dev);
if (!rcpm)
@@ -63,6 +68,34 @@ static int rcpm_pm_prepare(struct device *dev)
tmp |= value[i + 1];
iowrite32be(tmp, rcpm->ippdexpcr_base + i * 4);
}
+ /* Workaround of errata A-008646 on SoC LS1021A:
+ * There is a bug of register ippdexpcr1.
+ * Reading configuration register RCPM_IPPDEXPCR1
+ * always return zero. So save ippdexpcr1's value
+ * to register SCFG_SPARECR8.And the value of
+ * ippdexpcr1 will be read from SCFG_SPARECR8.
+ */
+ scfg_addr_regmap = syscon_regmap_lookup_by_phandle(np,
+ "fsl,ippdexpcr1-alt-addr");
+ if (scfg_addr_regmap && (1 == i)) {
+ if (of_property_read_u32_array(dev->of_node,
+ "fsl,ippdexpcr1-alt-addr",
+ reg_offset,
+ 1 + sizeof(u64)/sizeof(u32))) {
+ scfg_addr_regmap = NULL;
+ continue;
+ }
+ /* Read value from register SCFG_SPARECR8 */
+ regmap_read(scfg_addr_regmap,
+ (u32)(((u64)(reg_offset[1] << (sizeof(u32) * 8) |
+ reg_offset[2])) & 0xffffffff),
+ ®_value);
+ /* Write value to register SCFG_SPARECR8 */
+ regmap_write(scfg_addr_regmap,
+ (u32)(((u64)(reg_offset[1] << (sizeof(u32) * 8) |
+ reg_offset[2])) & 0xffffffff),
+ tmp | reg_value);
+ }
}
}
} while (ws = wakeup_source_get_next(ws));
--
2.17.1
The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata A-008646
on LS1021A
Signed-off-by: Biwen Li <[email protected]>
---
Change in v4:
- rename property name
fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr
Change in v3:
- rename property name
fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
Change in v2:
- update desc of the property 'fsl,rcpm-scfg'
.../devicetree/bindings/soc/fsl/rcpm.txt | 21 +++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
index 5a33619d881d..751a7655b694 100644
--- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
+++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
@@ -34,6 +34,13 @@ Chassis Version Example Chips
Optional properties:
- little-endian : RCPM register block is Little Endian. Without it RCPM
will be Big Endian (default case).
+ - fsl,ippdexpcr1-alt-addr : The property is related to a hardware issue
+ on SoC LS1021A and only needed on SoC LS1021A.
+ Must include 1 + 2 entries.
+ The first entry must be a link to the SCFG device node.
+ The non-first entry must be offset of registers of SCFG.
+ The second and third entry compose an alt offset address
+ for IPPDEXPCR1(SCFG_SPARECR8)
Example:
The RCPM node for T4240:
@@ -43,6 +50,20 @@ The RCPM node for T4240:
#fsl,rcpm-wakeup-cells = <2>;
};
+The RCPM node for LS1021A:
+ rcpm: rcpm@1ee2140 {
+ compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
+ reg = <0x0 0x1ee2140 0x0 0x8>;
+ #fsl,rcpm-wakeup-cells = <2>;
+
+ /*
+ * The second and third entry compose an alt offset
+ * address for IPPDEXPCR1(SCFG_SPARECR8)
+ */
+ fsl,ippdexpcr1-alt-addr = <&scfg 0x0 0x51c>;
+ };
+
+
* Freescale RCPM Wakeup Source Device Tree Bindings
-------------------------------------------
Required fsl,rcpm-wakeup property should be added to a device node if the device
--
2.17.1
The patch fixes a bug that FlexTimer cannot
wakeup system in deep sleep.
Signed-off-by: Biwen Li <[email protected]>
---
Change in v4:
- update property name
fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr
Change in v3:
- update property name
fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
Change in v2:
- None
arch/arm/boot/dts/ls1021a.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index e3973b611c3a..ae427f039e8b 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -1000,6 +1000,12 @@
compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
reg = <0x0 0x1ee2140 0x0 0x8>;
#fsl,rcpm-wakeup-cells = <2>;
+
+ /*
+ * The second and third entry compose an alt offset
+ * address for IPPDEXPCR1(SCFG_SPARECR8)
+ */
+ fsl,ippdexpcr1-alt-addr = <&scfg 0x0 0x51c>;
};
ftm_alarm0: timer0@29d0000 {
--
2.17.1
Hi all,
the linux patch depended by RCPM driver,FlexTimer driver and FlexTimer dts, need apply these patches as follows:
1. RCPM driver:
https://patchwork.kernel.org/series/162731/mbox/ (https://patchwork.kernel.org/patch/11105279/)
2. FlexTimer dts:
https://lore.kernel.org/patchwork/series/405653/mbox/ (https://lore.kernel.org/patchwork/patch/1112493/)
3. FlexTimer driver:
https://patchwork.ozlabs.org/series/124718/mbox/ (https://patchwork.ozlabs.org/patch/1145999/)
https://patchwork.ozlabs.org/series/126942/mbox/ (https://patchwork.ozlabs.org/patch/1152085/)
4. Adjust drivers/soc/fsl/Makefile:
remove the line 'obj-y += ftm_alarm.o' in drivers/soc/fsl/Makefile to resolve a compilation error
> Description:
> - Reading configuration register RCPM_IPPDEXPCR1
> always return zero
>
> Workaround:
> - Save register RCPM_IPPDEXPCR1's value to
> register SCFG_SPARECR8.(uboot's psci also
> need reading value from the register SCFG_SPARECR8
> to set register RCPM_IPPDEXPCR1)
>
> Impact:
> - FlexTimer module will cannot wakeup system in
> deep sleep on SoC LS1021A
>
> Signed-off-by: Biwen Li <[email protected]>
> ---
> Change in v4:
> - rename property name
> fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr
>
> Change in v3:
> - update commit message
> - rename property name
> fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
>
> Change in v2:
> - fix stype problems
>
> drivers/soc/fsl/rcpm.c | 33 +++++++++++++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c index
> 82c0ad5e663e..9a29c482fc2e 100644
> --- a/drivers/soc/fsl/rcpm.c
> +++ b/drivers/soc/fsl/rcpm.c
> @@ -13,6 +13,8 @@
> #include <linux/slab.h>
> #include <linux/suspend.h>
> #include <linux/kernel.h>
> +#include <linux/regmap.h>
> +#include <linux/mfd/syscon.h>
>
> #define RCPM_WAKEUP_CELL_MAX_SIZE 7
>
> @@ -29,6 +31,9 @@ static int rcpm_pm_prepare(struct device *dev)
> struct rcpm *rcpm;
> u32 value[RCPM_WAKEUP_CELL_MAX_SIZE + 1], tmp;
> int i, ret, idx;
> + struct regmap *scfg_addr_regmap = NULL;
> + u32 reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
> + u32 reg_value = 0;
>
> rcpm = dev_get_drvdata(dev);
> if (!rcpm)
> @@ -63,6 +68,34 @@ static int rcpm_pm_prepare(struct device *dev)
> tmp |= value[i + 1];
> iowrite32be(tmp, rcpm->ippdexpcr_base + i * 4);
> }
> + /* Workaround of errata A-008646 on SoC LS1021A:
> + * There is a bug of register ippdexpcr1.
> + * Reading configuration register RCPM_IPPDEXPCR1
> + * always return zero. So save ippdexpcr1's value
> + * to register SCFG_SPARECR8.And the value of
> + * ippdexpcr1 will be read from SCFG_SPARECR8.
> + */
> + scfg_addr_regmap =
> syscon_regmap_lookup_by_phandle(np,
> +
> "fsl,ippdexpcr1-alt-addr");
> + if (scfg_addr_regmap && (1 == i)) {
> + if (of_property_read_u32_array(dev->of_node,
> + "fsl,ippdexpcr1-alt-addr",
> + reg_offset,
> + 1 + sizeof(u64)/sizeof(u32))) {
> + scfg_addr_regmap = NULL;
> + continue;
> + }
> + /* Read value from register SCFG_SPARECR8 */
> + regmap_read(scfg_addr_regmap,
> + (u32)(((u64)(reg_offset[1] << (sizeof(u32) *
> 8) |
> + reg_offset[2])) & 0xffffffff),
> + ®_value);
> + /* Write value to register SCFG_SPARECR8 */
> + regmap_write(scfg_addr_regmap,
> + (u32)(((u64)(reg_offset[1] << (sizeof(u32) *
> 8) |
> + reg_offset[2])) & 0xffffffff),
> + tmp | reg_value);
> + }
> }
> }
> } while (ws = wakeup_source_get_next(ws));
> --
> 2.17.1
On Thu, Sep 26, 2019 at 10:41:18AM +0800, Biwen Li wrote:
> The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata A-008646
> on LS1021A
>
> Signed-off-by: Biwen Li <[email protected]>
> ---
> Change in v4:
> - rename property name
> fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr
>
> Change in v3:
> - rename property name
> fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
>
> Change in v2:
> - update desc of the property 'fsl,rcpm-scfg'
>
> .../devicetree/bindings/soc/fsl/rcpm.txt | 21 +++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> index 5a33619d881d..751a7655b694 100644
> --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> @@ -34,6 +34,13 @@ Chassis Version Example Chips
> Optional properties:
> - little-endian : RCPM register block is Little Endian. Without it RCPM
> will be Big Endian (default case).
> + - fsl,ippdexpcr1-alt-addr : The property is related to a hardware issue
> + on SoC LS1021A and only needed on SoC LS1021A.
> + Must include 1 + 2 entries.
> + The first entry must be a link to the SCFG device node.
> + The non-first entry must be offset of registers of SCFG.
> + The second and third entry compose an alt offset address
> + for IPPDEXPCR1(SCFG_SPARECR8)
If only on 1 SoC, can't all this be implied by "fsl,ls1021a-rcpm"?
Adding a property means you need both a new dtb and kernel to fix the
errata. Using the compatible string means you only need a new kernel.
>
> Example:
> The RCPM node for T4240:
> @@ -43,6 +50,20 @@ The RCPM node for T4240:
> #fsl,rcpm-wakeup-cells = <2>;
> };
>
> +The RCPM node for LS1021A:
> + rcpm: rcpm@1ee2140 {
> + compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
Both of these compatible strings aren't documented.
> + reg = <0x0 0x1ee2140 0x0 0x8>;
> + #fsl,rcpm-wakeup-cells = <2>;
> +
> + /*
> + * The second and third entry compose an alt offset
> + * address for IPPDEXPCR1(SCFG_SPARECR8)
> + */
> + fsl,ippdexpcr1-alt-addr = <&scfg 0x0 0x51c>;
> + };
> +
> +
> * Freescale RCPM Wakeup Source Device Tree Bindings
> -------------------------------------------
> Required fsl,rcpm-wakeup property should be added to a device node if the device
> --
> 2.17.1
>
>
> On Thu, Sep 26, 2019 at 10:41:18AM +0800, Biwen Li wrote:
> > The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata
> > A-008646 on LS1021A
> >
> > Signed-off-by: Biwen Li <[email protected]>
> > ---
> > Change in v4:
> > - rename property name
> > fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr
> >
> > Change in v3:
> > - rename property name
> > fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
> >
> > Change in v2:
> > - update desc of the property 'fsl,rcpm-scfg'
> >
> > .../devicetree/bindings/soc/fsl/rcpm.txt | 21
> +++++++++++++++++++
> > 1 file changed, 21 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > index 5a33619d881d..751a7655b694 100644
> > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > @@ -34,6 +34,13 @@ Chassis Version Example Chips
> > Optional properties:
> > - little-endian : RCPM register block is Little Endian. Without it RCPM
> > will be Big Endian (default case).
> > + - fsl,ippdexpcr1-alt-addr : The property is related to a hardware issue
> > + on SoC LS1021A and only needed on SoC LS1021A.
> > + Must include 1 + 2 entries.
> > + The first entry must be a link to the SCFG device node.
> > + The non-first entry must be offset of registers of SCFG.
> > + The second and third entry compose an alt offset address
> > + for IPPDEXPCR1(SCFG_SPARECR8)
>
> If only on 1 SoC, can't all this be implied by "fsl,ls1021a-rcpm"?
Currently on SoC LS1021A. Maybe other soc need this!
>
> Adding a property means you need both a new dtb and kernel to fix the
> errata. Using the compatible string means you only need a new kernel.
You are right, but it will be more flexible. Thanks.
>
> >
> > Example:
> > The RCPM node for T4240:
> > @@ -43,6 +50,20 @@ The RCPM node for T4240:
> > #fsl,rcpm-wakeup-cells = <2>;
> > };
> >
> > +The RCPM node for LS1021A:
> > + rcpm: rcpm@1ee2140 {
> > + compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
>
> Both of these compatible strings aren't documented.
These compatible strings is here: https://patchwork.kernel.org/patch/11105281/
>
> > + reg = <0x0 0x1ee2140 0x0 0x8>;
> > + #fsl,rcpm-wakeup-cells = <2>;
> > +
> > + /*
> > + * The second and third entry compose an alt offset
> > + * address for IPPDEXPCR1(SCFG_SPARECR8)
> > + */
> > + fsl,ippdexpcr1-alt-addr = <&scfg 0x0 0x51c>;
> > + };
> > +
> > +
> > * Freescale RCPM Wakeup Source Device Tree Bindings
> > -------------------------------------------
> > Required fsl,rcpm-wakeup property should be added to a device node if
> > the device
> > --
> > 2.17.1
> >