Changes since v16:
- naming the poll mask enable bit
- add a patch to fiup the input order of write api
Changes since v15:
- rebase onto 5.4-rc1
- rollback the v14 change
- add a patch to fixup the combination of return value
Changes since v14:
- change input argument as pointer in append_commend()
Changes since v13:
- separate poll function as poll w/ & w/o mask function
- directly pass inst into append_command function instead
of returns a pointer
- fixup coding style
- rebase onto 5.3-rc1
[... snip ...]
Bibby Hsieh (6):
soc: mediatek: cmdq: fixup wrong input order of write api
soc: mediatek: cmdq: remove OR opertaion from err return
soc: mediatek: cmdq: define the instruction struct
soc: mediatek: cmdq: add polling function
soc: mediatek: cmdq: add cmdq_dev_get_client_reg function
arm64: dts: add gce node for mt8183
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 10 ++
drivers/soc/mediatek/mtk-cmdq-helper.c | 147 +++++++++++++++++++----
include/linux/mailbox/mtk-cmdq-mailbox.h | 11 ++
include/linux/soc/mediatek/mtk-cmdq.h | 53 ++++++++
4 files changed, 195 insertions(+), 26 deletions(-)
--
2.18.0
That make debugging confuseidly when we OR two error return number.
Signed-off-by: Bibby Hsieh <[email protected]>
Reviewed-by: CK Hu <[email protected]>
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
index 3c82de5f9417..c8fb69787649 100644
--- a/drivers/soc/mediatek/mtk-cmdq-helper.c
+++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
@@ -149,13 +149,16 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
u16 offset, u32 value, u32 mask)
{
u32 offset_mask = offset;
- int err = 0;
+ int err;
if (mask != 0xffffffff) {
err = cmdq_pkt_append_command(pkt, CMDQ_CODE_MASK, 0, ~mask);
+ if (err < 0)
+ return err;
+
offset_mask |= CMDQ_WRITE_ENABLE_MASK;
}
- err |= cmdq_pkt_write(pkt, subsys, offset_mask, value);
+ err = cmdq_pkt_write(pkt, subsys, offset_mask, value);
return err;
}
@@ -197,9 +200,11 @@ static int cmdq_pkt_finalize(struct cmdq_pkt *pkt)
/* insert EOC and generate IRQ for each command iteration */
err = cmdq_pkt_append_command(pkt, CMDQ_CODE_EOC, 0, CMDQ_EOC_IRQ_EN);
+ if (err < 0)
+ return err;
/* JUMP to end */
- err |= cmdq_pkt_append_command(pkt, CMDQ_CODE_JUMP, 0, CMDQ_JUMP_PASS);
+ err = cmdq_pkt_append_command(pkt, CMDQ_CODE_JUMP, 0, CMDQ_JUMP_PASS);
return err;
}
--
2.18.0
Fixup a issue was caused by the previous fixup patch.
Fixes: 1a92f989126e ("soc: mediatek: cmdq: reorder the parameter")
Signed-off-by: Bibby Hsieh <[email protected]>
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
index 7aa0517ff2f3..3c82de5f9417 100644
--- a/drivers/soc/mediatek/mtk-cmdq-helper.c
+++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
@@ -155,7 +155,7 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
err = cmdq_pkt_append_command(pkt, CMDQ_CODE_MASK, 0, ~mask);
offset_mask |= CMDQ_WRITE_ENABLE_MASK;
}
- err |= cmdq_pkt_write(pkt, value, subsys, offset_mask);
+ err |= cmdq_pkt_write(pkt, subsys, offset_mask, value);
return err;
}
--
2.18.0
add gce device node for mt8183
Signed-off-by: Bibby Hsieh <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 6cbbd7726d36..954bcd766c97 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -9,6 +9,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/power/mt8183-power.h>
+#include <dt-bindings/gce/mt8183-gce.h>
#include "mt8183-pinfunc.h"
/ {
@@ -336,6 +337,15 @@
status = "disabled";
};
+ gce: mailbox@10238000 {
+ compatible = "mediatek,mt8183-gce";
+ reg = <0 0x10238000 0 0x4000>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_LOW>;
+ #mbox-cells = <3>;
+ clocks = <&infracfg CLK_INFRA_GCE>;
+ clock-names = "gce";
+ };
+
uart0: serial@11002000 {
compatible = "mediatek,mt8183-uart",
"mediatek,mt6577-uart";
--
2.18.0
Hi, Bibby:
On Thu, 2019-11-21 at 09:54 +0800, Bibby Hsieh wrote:
> Fixup a issue was caused by the previous fixup patch.
>
Reviewed-by: CK Hu <[email protected]>
> Fixes: 1a92f989126e ("soc: mediatek: cmdq: reorder the parameter")
>
> Signed-off-by: Bibby Hsieh <[email protected]>
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index 7aa0517ff2f3..3c82de5f9417 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -155,7 +155,7 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
> err = cmdq_pkt_append_command(pkt, CMDQ_CODE_MASK, 0, ~mask);
> offset_mask |= CMDQ_WRITE_ENABLE_MASK;
> }
> - err |= cmdq_pkt_write(pkt, value, subsys, offset_mask);
> + err |= cmdq_pkt_write(pkt, subsys, offset_mask, value);
>
> return err;
> }
On 21/11/2019 02:54, Bibby Hsieh wrote:
> That make debugging confuseidly when we OR two error return number.
>
> Signed-off-by: Bibby Hsieh <[email protected]>
> Reviewed-by: CK Hu <[email protected]>
Queued for v5.5-next/soc
Thanks!
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 11 ++++++++---
> 1 file changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index 3c82de5f9417..c8fb69787649 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -149,13 +149,16 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
> u16 offset, u32 value, u32 mask)
> {
> u32 offset_mask = offset;
> - int err = 0;
> + int err;
>
> if (mask != 0xffffffff) {
> err = cmdq_pkt_append_command(pkt, CMDQ_CODE_MASK, 0, ~mask);
> + if (err < 0)
> + return err;
> +
> offset_mask |= CMDQ_WRITE_ENABLE_MASK;
> }
> - err |= cmdq_pkt_write(pkt, subsys, offset_mask, value);
> + err = cmdq_pkt_write(pkt, subsys, offset_mask, value);
>
> return err;
> }
> @@ -197,9 +200,11 @@ static int cmdq_pkt_finalize(struct cmdq_pkt *pkt)
>
> /* insert EOC and generate IRQ for each command iteration */
> err = cmdq_pkt_append_command(pkt, CMDQ_CODE_EOC, 0, CMDQ_EOC_IRQ_EN);
> + if (err < 0)
> + return err;
>
> /* JUMP to end */
> - err |= cmdq_pkt_append_command(pkt, CMDQ_CODE_JUMP, 0, CMDQ_JUMP_PASS);
> + err = cmdq_pkt_append_command(pkt, CMDQ_CODE_JUMP, 0, CMDQ_JUMP_PASS);
>
> return err;
> }
>
On 21/11/2019 02:54, Bibby Hsieh wrote:
> add gce device node for mt8183
>
> Signed-off-by: Bibby Hsieh <[email protected]>
> ---
Applied to v5.5-next/dts64
Thanks!
> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 6cbbd7726d36..954bcd766c97 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -9,6 +9,7 @@
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/interrupt-controller/irq.h>
> #include <dt-bindings/power/mt8183-power.h>
> +#include <dt-bindings/gce/mt8183-gce.h>
> #include "mt8183-pinfunc.h"
>
> / {
> @@ -336,6 +337,15 @@
> status = "disabled";
> };
>
> + gce: mailbox@10238000 {
> + compatible = "mediatek,mt8183-gce";
> + reg = <0 0x10238000 0 0x4000>;
> + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_LOW>;
> + #mbox-cells = <3>;
> + clocks = <&infracfg CLK_INFRA_GCE>;
> + clock-names = "gce";
> + };
> +
> uart0: serial@11002000 {
> compatible = "mediatek,mt8183-uart",
> "mediatek,mt6577-uart";
>
Hi Matthias,
Quick question, any reason you picked only patches 2+3+6 from this
series, and not the 3 others?
Thanks.
On Wed, Nov 20, 2019 at 5:54 PM Bibby Hsieh <[email protected]> wrote:
>
> Changes since v16:
> - naming the poll mask enable bit
> - add a patch to fiup the input order of write api
>
> Changes since v15:
> - rebase onto 5.4-rc1
> - rollback the v14 change
> - add a patch to fixup the combination of return value
>
> Changes since v14:
> - change input argument as pointer in append_commend()
>
> Changes since v13:
> - separate poll function as poll w/ & w/o mask function
> - directly pass inst into append_command function instead
> of returns a pointer
> - fixup coding style
> - rebase onto 5.3-rc1
>
> [... snip ...]
>
> Bibby Hsieh (6):
> soc: mediatek: cmdq: fixup wrong input order of write api
> soc: mediatek: cmdq: remove OR opertaion from err return
> soc: mediatek: cmdq: define the instruction struct
> soc: mediatek: cmdq: add polling function
> soc: mediatek: cmdq: add cmdq_dev_get_client_reg function
> arm64: dts: add gce node for mt8183
>
> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 10 ++
> drivers/soc/mediatek/mtk-cmdq-helper.c | 147 +++++++++++++++++++----
> include/linux/mailbox/mtk-cmdq-mailbox.h | 11 ++
> include/linux/soc/mediatek/mtk-cmdq.h | 53 ++++++++
> 4 files changed, 195 insertions(+), 26 deletions(-)
>
> --
> 2.18.0
On 11/12/2019 23:09, Nicolas Boichat wrote:
> Hi Matthias,
>
> Quick question, any reason you picked only patches 2+3+6 from this
> series, and not the 3 others?
>
The quick answer, time :)
The longer one:
1/6 went already in through fixes for v5.4
4/6 it touches mailbox code, so we will need a acked-by from Jassi
5/6 time, I want to have a better look onto this to see if that makes sense (I
slightly remember some old comment I had on this)
Regards,
Matthias
> Thanks.
>
> On Wed, Nov 20, 2019 at 5:54 PM Bibby Hsieh <[email protected]> wrote:
>>
>> Changes since v16:
>> - naming the poll mask enable bit
>> - add a patch to fiup the input order of write api
>>
>> Changes since v15:
>> - rebase onto 5.4-rc1
>> - rollback the v14 change
>> - add a patch to fixup the combination of return value
>>
>> Changes since v14:
>> - change input argument as pointer in append_commend()
>>
>> Changes since v13:
>> - separate poll function as poll w/ & w/o mask function
>> - directly pass inst into append_command function instead
>> of returns a pointer
>> - fixup coding style
>> - rebase onto 5.3-rc1
>>
>> [... snip ...]
>>
>> Bibby Hsieh (6):
>> soc: mediatek: cmdq: fixup wrong input order of write api
>> soc: mediatek: cmdq: remove OR opertaion from err return
>> soc: mediatek: cmdq: define the instruction struct
>> soc: mediatek: cmdq: add polling function
>> soc: mediatek: cmdq: add cmdq_dev_get_client_reg function
>> arm64: dts: add gce node for mt8183
>>
>> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 10 ++
>> drivers/soc/mediatek/mtk-cmdq-helper.c | 147 +++++++++++++++++++----
>> include/linux/mailbox/mtk-cmdq-mailbox.h | 11 ++
>> include/linux/soc/mediatek/mtk-cmdq.h | 53 ++++++++
>> 4 files changed, 195 insertions(+), 26 deletions(-)
>>
>> --
>> 2.18.0
On Thu, 2019-12-12 at 08:49 +0100, Matthias Brugger wrote:
>
> On 11/12/2019 23:09, Nicolas Boichat wrote:
> > Hi Matthias,
> >
> > Quick question, any reason you picked only patches 2+3+6 from this
> > series, and not the 3 others?
> >
>
> The quick answer, time :)
> The longer one:
> 1/6 went already in through fixes for v5.4
> 4/6 it touches mailbox code, so we will need a acked-by from Jassi
Hi, Jassi,
Sorry for the mailing losing.
Could you help me to review [PATCH 4/6 soc: mediatek: cmdq: add polling
function] if you are free?
Bibby
> 5/6 time, I want to have a better look onto this to see if that makes sense (I
> slightly remember some old comment I had on this)
>
> Regards,
> Matthias
>
> > Thanks.
> >
> > On Wed, Nov 20, 2019 at 5:54 PM Bibby Hsieh <[email protected]> wrote:
> >>
> >> Changes since v16:
> >> - naming the poll mask enable bit
> >> - add a patch to fiup the input order of write api
> >>
> >> Changes since v15:
> >> - rebase onto 5.4-rc1
> >> - rollback the v14 change
> >> - add a patch to fixup the combination of return value
> >>
> >> Changes since v14:
> >> - change input argument as pointer in append_commend()
> >>
> >> Changes since v13:
> >> - separate poll function as poll w/ & w/o mask function
> >> - directly pass inst into append_command function instead
> >> of returns a pointer
> >> - fixup coding style
> >> - rebase onto 5.3-rc1
> >>
> >> [... snip ...]
> >>
> >> Bibby Hsieh (6):
> >> soc: mediatek: cmdq: fixup wrong input order of write api
> >> soc: mediatek: cmdq: remove OR opertaion from err return
> >> soc: mediatek: cmdq: define the instruction struct
> >> soc: mediatek: cmdq: add polling function
> >> soc: mediatek: cmdq: add cmdq_dev_get_client_reg function
> >> arm64: dts: add gce node for mt8183
> >>
> >> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 10 ++
> >> drivers/soc/mediatek/mtk-cmdq-helper.c | 147 +++++++++++++++++++----
> >> include/linux/mailbox/mtk-cmdq-mailbox.h | 11 ++
> >> include/linux/soc/mediatek/mtk-cmdq.h | 53 ++++++++
> >> 4 files changed, 195 insertions(+), 26 deletions(-)
> >>
> >> --
> >> 2.18.0