Convert the i.MX OCOTP binding to DT schema format using json-schema.
Signed-off-by: Anson Huang <[email protected]>
---
.../devicetree/bindings/nvmem/imx-ocotp.txt | 50 ----------
.../devicetree/bindings/nvmem/imx-ocotp.yaml | 103 +++++++++++++++++++++
2 files changed, 103 insertions(+), 50 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
create mode 100644 Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml
diff --git a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
deleted file mode 100644
index 6e346d5..0000000
--- a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
+++ /dev/null
@@ -1,50 +0,0 @@
-Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
-
-This binding represents the on-chip eFuse OTP controller found on
-i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL,
-i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM, i.MX8MN and i.MX8MP SoCs.
-
-Required properties:
-- compatible: should be one of
- "fsl,imx6q-ocotp" (i.MX6Q/D/DL/S),
- "fsl,imx6sl-ocotp" (i.MX6SL), or
- "fsl,imx6sx-ocotp" (i.MX6SX),
- "fsl,imx6ul-ocotp" (i.MX6UL),
- "fsl,imx6ull-ocotp" (i.MX6ULL/ULZ),
- "fsl,imx7d-ocotp" (i.MX7D/S),
- "fsl,imx6sll-ocotp" (i.MX6SLL),
- "fsl,imx7ulp-ocotp" (i.MX7ULP),
- "fsl,imx8mq-ocotp" (i.MX8MQ),
- "fsl,imx8mm-ocotp" (i.MX8MM),
- "fsl,imx8mn-ocotp" (i.MX8MN),
- "fsl,imx8mp-ocotp" (i.MX8MP),
- followed by "syscon".
-- #address-cells : Should be 1
-- #size-cells : Should be 1
-- reg: Should contain the register base and length.
-- clocks: Should contain a phandle pointing to the gated peripheral clock.
-
-Optional properties:
-- read-only: disable write access
-
-Optional Child nodes:
-
-- Data cells of ocotp:
- Detailed bindings are described in bindings/nvmem/nvmem.txt
-
-Example:
- ocotp: ocotp@21bc000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "fsl,imx6sx-ocotp", "syscon";
- reg = <0x021bc000 0x4000>;
- clocks = <&clks IMX6SX_CLK_OCOTP>;
-
- tempmon_calib: calib@38 {
- reg = <0x38 4>;
- };
-
- tempmon_temp_grade: temp-grade@20 {
- reg = <0x20 4>;
- };
- };
diff --git a/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml b/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml
new file mode 100644
index 0000000..70aa637
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml
@@ -0,0 +1,103 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
+
+maintainers:
+ - Anson Huang <[email protected]>
+
+description: |
+ This binding represents the on-chip eFuse OTP controller found on
+ i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL,
+ i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM, i.MX8MN and i.MX8MP SoCs.
+
+allOf:
+ - $ref: "nvmem.yaml#"
+
+properties:
+ compatible:
+ anyOf:
+ - items:
+ - enum:
+ - fsl,imx6q-ocotp
+ - fsl,imx6sl-ocotp
+ - fsl,imx6sx-ocotp
+ - fsl,imx6ul-ocotp
+ - fsl,imx6ull-ocotp
+ - fsl,imx7d-ocotp
+ - fsl,imx6sll-ocotp
+ - fsl,imx7ulp-ocotp
+ - fsl,imx8mq-ocotp
+ - fsl,imx8mm-ocotp
+ - fsl,imx8mn-ocotp
+ - fsl,imx8mp-ocotp
+
+ - const: syscon
+
+ - contains:
+ const: syscon
+ additionalItems: true
+
+ reg:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ clocks:
+ description: |
+ OCOTP's clock source.
+ maxItems: 1
+
+required:
+ - "#address-cells"
+ - "#size-cells"
+ - compatible
+ - reg
+
+patternProperties:
+ "^.*@[0-9a-f]+$":
+ type: object
+
+ properties:
+ reg:
+ maxItems: 1
+ description:
+ Offset and size in bytes within the storage device.
+
+ required:
+ - reg
+
+ additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/imx6sx-clock.h>
+
+ ocotp: efuse@21bc000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,imx6sx-ocotp", "syscon";
+ reg = <0x021bc000 0x4000>;
+ clocks = <&clks IMX6SX_CLK_OCOTP>;
+
+ cpu_speed_grade: speed-grade@10 {
+ reg = <0x10 4>;
+ };
+
+ tempmon_calib: calib@38 {
+ reg = <0x38 4>;
+ };
+
+ tempmon_temp_grade: temp-grade@20 {
+ reg = <0x20 4>;
+ };
+ };
+
+...
--
2.7.4
Convert the MXS OCOTP binding to DT schema format using json-schema.
Signed-off-by: Anson Huang <[email protected]>
---
.../devicetree/bindings/nvmem/mxs-ocotp.txt | 24 ----------
.../devicetree/bindings/nvmem/mxs-ocotp.yaml | 52 ++++++++++++++++++++++
2 files changed, 52 insertions(+), 24 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/nvmem/mxs-ocotp.txt
create mode 100644 Documentation/devicetree/bindings/nvmem/mxs-ocotp.yaml
diff --git a/Documentation/devicetree/bindings/nvmem/mxs-ocotp.txt b/Documentation/devicetree/bindings/nvmem/mxs-ocotp.txt
deleted file mode 100644
index 372c72f..0000000
--- a/Documentation/devicetree/bindings/nvmem/mxs-ocotp.txt
+++ /dev/null
@@ -1,24 +0,0 @@
-On-Chip OTP Memory for Freescale i.MX23/i.MX28
-
-Required properties :
-- compatible :
- - "fsl,imx23-ocotp" for i.MX23
- - "fsl,imx28-ocotp" for i.MX28
-- #address-cells : Should be 1
-- #size-cells : Should be 1
-- reg : Address and length of OTP controller registers
-- clocks : Should contain a reference to the hbus clock
-
-= Data cells =
-Are child nodes of mxs-ocotp, bindings of which as described in
-bindings/nvmem/nvmem.txt
-
-Example for i.MX28:
-
- ocotp: ocotp@8002c000 {
- compatible = "fsl,imx28-ocotp", "fsl,ocotp";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x8002c000 0x2000>;
- clocks = <&clks 25>;
- };
diff --git a/Documentation/devicetree/bindings/nvmem/mxs-ocotp.yaml b/Documentation/devicetree/bindings/nvmem/mxs-ocotp.yaml
new file mode 100644
index 0000000..b8be3bb
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/mxs-ocotp.yaml
@@ -0,0 +1,52 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/mxs-ocotp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: On-Chip OTP Memory for Freescale i.MX23/i.MX28
+
+maintainers:
+ - Anson Huang <[email protected]>
+
+allOf:
+ - $ref: "nvmem.yaml#"
+
+properties:
+ compatible:
+ enum:
+ - fsl,imx23-ocotp
+ - fsl,imx28-ocotp
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ description: |
+ OCOTP's clock source.
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ ocotp: efuse@8002c000 {
+ compatible = "fsl,imx28-ocotp";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x8002c000 0x2000>;
+ clocks = <&clks 25>;
+ };
+
+...
--
2.7.4
Convert the i.MX IIM binding to DT schema format using json-schema.
Signed-off-by: Anson Huang <[email protected]>
---
.../devicetree/bindings/nvmem/imx-iim.txt | 22 --------
.../devicetree/bindings/nvmem/imx-iim.yaml | 59 ++++++++++++++++++++++
2 files changed, 59 insertions(+), 22 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/nvmem/imx-iim.txt
create mode 100644 Documentation/devicetree/bindings/nvmem/imx-iim.yaml
diff --git a/Documentation/devicetree/bindings/nvmem/imx-iim.txt b/Documentation/devicetree/bindings/nvmem/imx-iim.txt
deleted file mode 100644
index 1978c5b..0000000
--- a/Documentation/devicetree/bindings/nvmem/imx-iim.txt
+++ /dev/null
@@ -1,22 +0,0 @@
-Freescale i.MX IC Identification Module (IIM) device tree bindings
-
-This binding represents the IC Identification Module (IIM) found on
-i.MX25, i.MX27, i.MX31, i.MX35, i.MX51 and i.MX53 SoCs.
-
-Required properties:
-- compatible: should be one of
- "fsl,imx25-iim", "fsl,imx27-iim",
- "fsl,imx31-iim", "fsl,imx35-iim",
- "fsl,imx51-iim", "fsl,imx53-iim",
-- reg: Should contain the register base and length.
-- interrupts: Should contain the interrupt for the IIM
-- clocks: Should contain a phandle pointing to the gated peripheral clock.
-
-Example:
-
- iim: iim@63f98000 {
- compatible = "fsl,imx53-iim", "fsl,imx27-iim";
- reg = <0x63f98000 0x4000>;
- interrupts = <69>;
- clocks = <&clks IMX5_CLK_IIM_GATE>;
- };
diff --git a/Documentation/devicetree/bindings/nvmem/imx-iim.yaml b/Documentation/devicetree/bindings/nvmem/imx-iim.yaml
new file mode 100644
index 0000000..0d85d37
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/imx-iim.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/imx-iim.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX IC Identification Module (IIM) device tree bindings
+
+maintainers:
+ - Anson Huang <[email protected]>
+
+description: |
+ This binding represents the IC Identification Module (IIM) found on
+ i.MX25, i.MX27, i.MX31, i.MX35, i.MX51 and i.MX53 SoCs.
+
+allOf:
+ - $ref: "nvmem.yaml#"
+
+properties:
+ compatible:
+ enum:
+ - fsl,imx25-iim
+ - fsl,imx27-iim
+ - fsl,imx31-iim
+ - fsl,imx35-iim
+ - fsl,imx51-iim
+ - fsl,imx53-iim
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ description: |
+ IIM's clock source.
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/imx5-clock.h>
+
+ iim: efuse@63f98000 {
+ compatible = "fsl,imx53-iim";
+ reg = <0x63f98000 0x4000>;
+ interrupts = <69>;
+ clocks = <&clks IMX5_CLK_IIM_GATE>;
+ };
+
+...
--
2.7.4
On Wed, Apr 15, 2020 at 11:33:20AM +0800, Anson Huang wrote:
> Convert the i.MX OCOTP binding to DT schema format using json-schema.
>
> Signed-off-by: Anson Huang <[email protected]>
> ---
> .../devicetree/bindings/nvmem/imx-ocotp.txt | 50 ----------
> .../devicetree/bindings/nvmem/imx-ocotp.yaml | 103 +++++++++++++++++++++
> 2 files changed, 103 insertions(+), 50 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
> create mode 100644 Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml
>
> diff --git a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
> deleted file mode 100644
> index 6e346d5..0000000
> --- a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
> +++ /dev/null
> @@ -1,50 +0,0 @@
> -Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
> -
> -This binding represents the on-chip eFuse OTP controller found on
> -i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL,
> -i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM, i.MX8MN and i.MX8MP SoCs.
> -
> -Required properties:
> -- compatible: should be one of
> - "fsl,imx6q-ocotp" (i.MX6Q/D/DL/S),
> - "fsl,imx6sl-ocotp" (i.MX6SL), or
> - "fsl,imx6sx-ocotp" (i.MX6SX),
> - "fsl,imx6ul-ocotp" (i.MX6UL),
> - "fsl,imx6ull-ocotp" (i.MX6ULL/ULZ),
> - "fsl,imx7d-ocotp" (i.MX7D/S),
> - "fsl,imx6sll-ocotp" (i.MX6SLL),
> - "fsl,imx7ulp-ocotp" (i.MX7ULP),
> - "fsl,imx8mq-ocotp" (i.MX8MQ),
> - "fsl,imx8mm-ocotp" (i.MX8MM),
> - "fsl,imx8mn-ocotp" (i.MX8MN),
> - "fsl,imx8mp-ocotp" (i.MX8MP),
> - followed by "syscon".
> -- #address-cells : Should be 1
> -- #size-cells : Should be 1
> -- reg: Should contain the register base and length.
> -- clocks: Should contain a phandle pointing to the gated peripheral clock.
> -
> -Optional properties:
> -- read-only: disable write access
> -
> -Optional Child nodes:
> -
> -- Data cells of ocotp:
> - Detailed bindings are described in bindings/nvmem/nvmem.txt
> -
> -Example:
> - ocotp: ocotp@21bc000 {
> - #address-cells = <1>;
> - #size-cells = <1>;
> - compatible = "fsl,imx6sx-ocotp", "syscon";
> - reg = <0x021bc000 0x4000>;
> - clocks = <&clks IMX6SX_CLK_OCOTP>;
> -
> - tempmon_calib: calib@38 {
> - reg = <0x38 4>;
> - };
> -
> - tempmon_temp_grade: temp-grade@20 {
> - reg = <0x20 4>;
> - };
> - };
> diff --git a/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml b/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml
> new file mode 100644
> index 0000000..70aa637
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml
> @@ -0,0 +1,103 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
> +
> +maintainers:
> + - Anson Huang <[email protected]>
> +
> +description: |
> + This binding represents the on-chip eFuse OTP controller found on
> + i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL,
> + i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM, i.MX8MN and i.MX8MP SoCs.
> +
> +allOf:
> + - $ref: "nvmem.yaml#"
> +
> +properties:
> + compatible:
> + anyOf:
> + - items:
> + - enum:
> + - fsl,imx6q-ocotp
> + - fsl,imx6sl-ocotp
> + - fsl,imx6sx-ocotp
> + - fsl,imx6ul-ocotp
> + - fsl,imx6ull-ocotp
> + - fsl,imx7d-ocotp
> + - fsl,imx6sll-ocotp
> + - fsl,imx7ulp-ocotp
> + - fsl,imx8mq-ocotp
> + - fsl,imx8mm-ocotp
> + - fsl,imx8mn-ocotp
> + - fsl,imx8mp-ocotp
> +
Drop the blank line here.
> + - const: syscon
> +
> + - contains:
> + const: syscon
> + additionalItems: true
You shouldn't need the 2nd clause here. And then can remove the 'anyOf'.
> +
> + reg:
> + maxItems: 1
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 1
> +
> + clocks:
> + description: |
> + OCOTP's clock source.
Drop
> + maxItems: 1
> +
> +required:
> + - "#address-cells"
> + - "#size-cells"
> + - compatible
> + - reg
> +
> +patternProperties:
> + "^.*@[0-9a-f]+$":
> + type: object
> +
> + properties:
> + reg:
> + maxItems: 1
> + description:
> + Offset and size in bytes within the storage device.
> +
> + required:
> + - reg
> +
> + additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/imx6sx-clock.h>
> +
> + ocotp: efuse@21bc000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "fsl,imx6sx-ocotp", "syscon";
> + reg = <0x021bc000 0x4000>;
> + clocks = <&clks IMX6SX_CLK_OCOTP>;
> +
> + cpu_speed_grade: speed-grade@10 {
> + reg = <0x10 4>;
> + };
> +
> + tempmon_calib: calib@38 {
> + reg = <0x38 4>;
> + };
> +
> + tempmon_temp_grade: temp-grade@20 {
> + reg = <0x20 4>;
> + };
> + };
> +
> +...
> --
> 2.7.4
>
On Wed, Apr 15, 2020 at 11:33:21AM +0800, Anson Huang wrote:
> Convert the i.MX IIM binding to DT schema format using json-schema.
>
> Signed-off-by: Anson Huang <[email protected]>
> ---
> .../devicetree/bindings/nvmem/imx-iim.txt | 22 --------
> .../devicetree/bindings/nvmem/imx-iim.yaml | 59 ++++++++++++++++++++++
> 2 files changed, 59 insertions(+), 22 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/nvmem/imx-iim.txt
> create mode 100644 Documentation/devicetree/bindings/nvmem/imx-iim.yaml
>
> diff --git a/Documentation/devicetree/bindings/nvmem/imx-iim.txt b/Documentation/devicetree/bindings/nvmem/imx-iim.txt
> deleted file mode 100644
> index 1978c5b..0000000
> --- a/Documentation/devicetree/bindings/nvmem/imx-iim.txt
> +++ /dev/null
> @@ -1,22 +0,0 @@
> -Freescale i.MX IC Identification Module (IIM) device tree bindings
> -
> -This binding represents the IC Identification Module (IIM) found on
> -i.MX25, i.MX27, i.MX31, i.MX35, i.MX51 and i.MX53 SoCs.
> -
> -Required properties:
> -- compatible: should be one of
> - "fsl,imx25-iim", "fsl,imx27-iim",
> - "fsl,imx31-iim", "fsl,imx35-iim",
> - "fsl,imx51-iim", "fsl,imx53-iim",
> -- reg: Should contain the register base and length.
> -- interrupts: Should contain the interrupt for the IIM
> -- clocks: Should contain a phandle pointing to the gated peripheral clock.
> -
> -Example:
> -
> - iim: iim@63f98000 {
> - compatible = "fsl,imx53-iim", "fsl,imx27-iim";
> - reg = <0x63f98000 0x4000>;
> - interrupts = <69>;
> - clocks = <&clks IMX5_CLK_IIM_GATE>;
> - };
> diff --git a/Documentation/devicetree/bindings/nvmem/imx-iim.yaml b/Documentation/devicetree/bindings/nvmem/imx-iim.yaml
> new file mode 100644
> index 0000000..0d85d37
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/nvmem/imx-iim.yaml
> @@ -0,0 +1,59 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/nvmem/imx-iim.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MX IC Identification Module (IIM) device tree bindings
> +
> +maintainers:
> + - Anson Huang <[email protected]>
> +
> +description: |
> + This binding represents the IC Identification Module (IIM) found on
> + i.MX25, i.MX27, i.MX31, i.MX35, i.MX51 and i.MX53 SoCs.
> +
> +allOf:
> + - $ref: "nvmem.yaml#"
> +
> +properties:
> + compatible:
> + enum:
> + - fsl,imx25-iim
> + - fsl,imx27-iim
> + - fsl,imx31-iim
> + - fsl,imx35-iim
> + - fsl,imx51-iim
> + - fsl,imx53-iim
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + description: |
> + IIM's clock source.
Drop this. Same in patch 3.
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/imx5-clock.h>
> +
> + iim: efuse@63f98000 {
> + compatible = "fsl,imx53-iim";
> + reg = <0x63f98000 0x4000>;
> + interrupts = <69>;
> + clocks = <&clks IMX5_CLK_IIM_GATE>;
> + };
> +
> +...
> --
> 2.7.4
>