BCM63xx SoCs have a reset controller for certain components.
Álvaro Fernández Rojas (7):
mips: bmips: select ARCH_HAS_RESET_CONTROLLER
dt-bindings: reset: add BCM6345 reset controller bindings
reset: add BCM6345 reset controller driver
mips: bmips: dts: add BCM6328 reset controller support
mips: bmips: dts: add BCM6358 reset controller support
mips: bmips: dts: add BCM6362 reset controller support
mips: bmips: dts: add BCM6368 reset controller support
.../bindings/reset/brcm,bcm6345-reset.yaml | 37 +++++
arch/mips/Kconfig | 1 +
arch/mips/boot/dts/brcm/bcm6328.dtsi | 6 +
arch/mips/boot/dts/brcm/bcm6358.dtsi | 6 +
arch/mips/boot/dts/brcm/bcm6362.dtsi | 6 +
arch/mips/boot/dts/brcm/bcm6368.dtsi | 6 +
drivers/reset/Kconfig | 7 +
drivers/reset/Makefile | 1 +
drivers/reset/reset-bcm6345.c | 149 ++++++++++++++++++
9 files changed, 219 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
create mode 100644 drivers/reset/reset-bcm6345.c
--
2.26.2
BCM6328 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
arch/mips/boot/dts/brcm/bcm6328.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/mips/boot/dts/brcm/bcm6328.dtsi b/arch/mips/boot/dts/brcm/bcm6328.dtsi
index af860d06def6..590118cf5c12 100644
--- a/arch/mips/boot/dts/brcm/bcm6328.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6328.dtsi
@@ -57,6 +57,12 @@ clkctl: clock-controller@10000004 {
#clock-cells = <1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x10>,
--
2.26.2
This allows to add reset controllers support.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
arch/mips/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 9dc08ee3d6b9..e82586e7719c 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -229,6 +229,7 @@ config ATH79
config BMIPS_GENERIC
bool "Broadcom Generic BMIPS kernel"
+ select ARCH_HAS_RESET_CONTROLLER
select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
select ARCH_HAS_PHYS_TO_DMA
select BOOT_RAW
--
2.26.2
Add support for resetting blocks through the Linux reset controller
subsystem for BCM63xx SoCs.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
.../bindings/reset/brcm,bcm6345-reset.yaml | 37 +++++++++++++++++++
1 file changed, 37 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
diff --git a/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml b/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
new file mode 100644
index 000000000000..eb3f2182e631
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/reset/brcm,bcm6345-reset.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: BCM6345 reset controller
+
+description: This document describes the BCM6345 reset controller.
+
+maintainers:
+ - Álvaro Fernández Rojas <[email protected]>
+
+properties:
+ compatible:
+ const: brcm,bcm6345-reset
+
+ reg:
+ maxItems: 2
+
+ "#reset-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - "#reset-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
--
2.26.2
BCM6358 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
arch/mips/boot/dts/brcm/bcm6358.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/mips/boot/dts/brcm/bcm6358.dtsi b/arch/mips/boot/dts/brcm/bcm6358.dtsi
index f21176cac038..9d93e7f5e6fc 100644
--- a/arch/mips/boot/dts/brcm/bcm6358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6358.dtsi
@@ -82,6 +82,12 @@ periph_intc: interrupt-controller@fffe000c {
interrupts = <2>, <3>;
};
+ periph_rst: reset-controller@fffe0034 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0xfffe0034 0x4>;
+ #reset-cells = <1>;
+ };
+
leds0: led-controller@fffe00d0 {
#address-cells = <1>;
#size-cells = <0>;
--
2.26.2
BCM6368 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
arch/mips/boot/dts/brcm/bcm6368.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/mips/boot/dts/brcm/bcm6368.dtsi b/arch/mips/boot/dts/brcm/bcm6368.dtsi
index 449c167dd892..52c19f40b9cc 100644
--- a/arch/mips/boot/dts/brcm/bcm6368.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6368.dtsi
@@ -70,6 +70,12 @@ reboot: syscon-reboot@10000008 {
mask = <0x1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x10>,
--
2.26.2
BCM6362 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
arch/mips/boot/dts/brcm/bcm6362.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/mips/boot/dts/brcm/bcm6362.dtsi b/arch/mips/boot/dts/brcm/bcm6362.dtsi
index 8ae6981735b8..443af6b4c838 100644
--- a/arch/mips/boot/dts/brcm/bcm6362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6362.dtsi
@@ -70,6 +70,12 @@ reboot: syscon-reboot@10000008 {
mask = <0x1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x10>,
--
2.26.2
Add support for resetting blocks through the Linux reset controller
subsystem for BCM63xx SoCs.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
drivers/reset/Kconfig | 7 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-bcm6345.c | 149 ++++++++++++++++++++++++++++++++++
3 files changed, 157 insertions(+)
create mode 100644 drivers/reset/reset-bcm6345.c
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index d9efbfd29646..9f1da978cef6 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -41,6 +41,13 @@ config RESET_BERLIN
help
This enables the reset controller driver for Marvell Berlin SoCs.
+config RESET_BCM6345
+ bool "BCM6345 Reset Controller"
+ depends on BMIPS_GENERIC || COMPILE_TEST
+ default BMIPS_GENERIC
+ help
+ This enables the reset controller driver for BCM6345 SoCs.
+
config RESET_BRCMSTB
tristate "Broadcom STB reset controller"
depends on ARCH_BRCMSTB || COMPILE_TEST
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 249ed357c997..e642aae42f0f 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/
obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o
+obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o
obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
diff --git a/drivers/reset/reset-bcm6345.c b/drivers/reset/reset-bcm6345.c
new file mode 100644
index 000000000000..088b7fdb896b
--- /dev/null
+++ b/drivers/reset/reset-bcm6345.c
@@ -0,0 +1,149 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * BCM6345 Reset Controller Driver
+ *
+ * Copyright (C) 2020 Álvaro Fernández Rojas <[email protected]>
+ */
+
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/mod_devicetable.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+
+#define BCM6345_RESET_NUM 32
+#define BCM6345_RESET_SLEEP_MIN_US 10000
+#define BCM6345_RESET_SLEEP_MAX_US 20000
+
+struct bcm6345_reset {
+ struct reset_controller_dev rcdev;
+ void __iomem *base;
+ spinlock_t lock;
+};
+
+static int bcm6345_reset_update(struct bcm6345_reset *bcm6345_reset,
+ unsigned long id, bool assert)
+{
+ uint32_t val;
+
+ val = __raw_readl(bcm6345_reset->base);
+ if (assert)
+ val &= ~BIT(id);
+ else
+ val |= BIT(id);
+ __raw_writel(val, bcm6345_reset->base);
+
+ return 0;
+}
+
+static int bcm6345_reset_assert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ struct bcm6345_reset *bcm6345_reset =
+ container_of(rcdev, struct bcm6345_reset, rcdev);
+ unsigned long flags;
+
+ spin_lock_irqsave(&bcm6345_reset->lock, flags);
+ bcm6345_reset_update(bcm6345_reset, id, true);
+ spin_unlock_irqrestore(&bcm6345_reset->lock, flags);
+
+ return 0;
+}
+
+static int bcm6345_reset_deassert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ struct bcm6345_reset *bcm6345_reset =
+ container_of(rcdev, struct bcm6345_reset, rcdev);
+ unsigned long flags;
+
+ spin_lock_irqsave(&bcm6345_reset->lock, flags);
+ bcm6345_reset_update(bcm6345_reset, id, false);
+ spin_unlock_irqrestore(&bcm6345_reset->lock, flags);
+
+ return 0;
+}
+
+static int bcm6345_reset_reset(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ struct bcm6345_reset *bcm6345_reset =
+ container_of(rcdev, struct bcm6345_reset, rcdev);
+ unsigned long flags;
+
+ spin_lock_irqsave(&bcm6345_reset->lock, flags);
+ usleep_range(BCM6345_RESET_SLEEP_MIN_US,
+ BCM6345_RESET_SLEEP_MAX_US);
+ bcm6345_reset_update(bcm6345_reset, id, true);
+ usleep_range(BCM6345_RESET_SLEEP_MIN_US,
+ BCM6345_RESET_SLEEP_MAX_US);
+ bcm6345_reset_update(bcm6345_reset, id, false);
+ spin_unlock_irqrestore(&bcm6345_reset->lock, flags);
+
+ return 0;
+}
+
+static int bcm6345_reset_status(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ struct bcm6345_reset *bcm6345_reset =
+ container_of(rcdev, struct bcm6345_reset, rcdev);
+
+ return !(__raw_readl(bcm6345_reset->base) & BIT(id));
+}
+
+static struct reset_control_ops bcm6345_reset_ops = {
+ .assert = bcm6345_reset_assert,
+ .deassert = bcm6345_reset_deassert,
+ .reset = bcm6345_reset_reset,
+ .status = bcm6345_reset_status,
+};
+
+static int bcm6345_reset_probe(struct platform_device *pdev)
+{
+ struct bcm6345_reset *bcm6345_reset;
+ struct resource *res;
+ int err;
+
+ bcm6345_reset = devm_kzalloc(&pdev->dev,
+ sizeof(*bcm6345_reset), GFP_KERNEL);
+ if (!bcm6345_reset)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, bcm6345_reset);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ bcm6345_reset->base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(bcm6345_reset->base))
+ return PTR_ERR(bcm6345_reset->base);
+
+ spin_lock_init(&bcm6345_reset->lock);
+ bcm6345_reset->rcdev.ops = &bcm6345_reset_ops;
+ bcm6345_reset->rcdev.owner = THIS_MODULE;
+ bcm6345_reset->rcdev.of_node = pdev->dev.of_node;
+ bcm6345_reset->rcdev.of_reset_n_cells = 1;
+ bcm6345_reset->rcdev.nr_resets = BCM6345_RESET_NUM;
+
+ err = devm_reset_controller_register(&pdev->dev,
+ &bcm6345_reset->rcdev);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+static const struct of_device_id bcm6345_reset_of_match[] = {
+ { .compatible = "brcm,bcm6345-reset" },
+ { },
+};
+
+static struct platform_driver bcm6345_reset_driver = {
+ .probe = bcm6345_reset_probe,
+ .driver = {
+ .name = "bcm6345-reset",
+ .of_match_table = bcm6345_reset_of_match,
+ .suppress_bind_attrs = true,
+ },
+};
+builtin_platform_driver(bcm6345_reset_driver);
--
2.26.2
Hi Álvaro,
On Tue, 2020-06-09 at 15:42 +0200, Álvaro Fernández Rojas wrote:
> Add support for resetting blocks through the Linux reset controller
> subsystem for BCM63xx SoCs.
>
> Signed-off-by: Álvaro Fernández Rojas <[email protected]>
> ---
> drivers/reset/Kconfig | 7 ++
> drivers/reset/Makefile | 1 +
> drivers/reset/reset-bcm6345.c | 149 ++++++++++++++++++++++++++++++++++
> 3 files changed, 157 insertions(+)
> create mode 100644 drivers/reset/reset-bcm6345.c
>
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index d9efbfd29646..9f1da978cef6 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -41,6 +41,13 @@ config RESET_BERLIN
> help
> This enables the reset controller driver for Marvell Berlin SoCs.
>
> +config RESET_BCM6345
> + bool "BCM6345 Reset Controller"
> + depends on BMIPS_GENERIC || COMPILE_TEST
> + default BMIPS_GENERIC
> + help
> + This enables the reset controller driver for BCM6345 SoCs.
> +
> config RESET_BRCMSTB
> tristate "Broadcom STB reset controller"
> depends on ARCH_BRCMSTB || COMPILE_TEST
> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> index 249ed357c997..e642aae42f0f 100644
> --- a/drivers/reset/Makefile
> +++ b/drivers/reset/Makefile
> @@ -6,6 +6,7 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/
> obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
> obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
> obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o
> +obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
> obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
> obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o
> obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
> diff --git a/drivers/reset/reset-bcm6345.c b/drivers/reset/reset-bcm6345.c
> new file mode 100644
> index 000000000000..088b7fdb896b
> --- /dev/null
> +++ b/drivers/reset/reset-bcm6345.c
> @@ -0,0 +1,149 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * BCM6345 Reset Controller Driver
> + *
> + * Copyright (C) 2020 Álvaro Fernández Rojas <[email protected]>
> + */
> +
> +#include <linux/delay.h>
> +#include <linux/init.h>
> +#include <linux/io.h>
> +#include <linux/mod_devicetable.h>
> +#include <linux/platform_device.h>
> +#include <linux/reset-controller.h>
> +
> +#define BCM6345_RESET_NUM 32
> +#define BCM6345_RESET_SLEEP_MIN_US 10000
> +#define BCM6345_RESET_SLEEP_MAX_US 20000
> +
> +struct bcm6345_reset {
> + struct reset_controller_dev rcdev;
> + void __iomem *base;
> + spinlock_t lock;
> +};
> +
> +static int bcm6345_reset_update(struct bcm6345_reset *bcm6345_reset,
> + unsigned long id, bool assert)
> +{
> + uint32_t val;
> +
> + val = __raw_readl(bcm6345_reset->base);
> + if (assert)
> + val &= ~BIT(id);
> + else
> + val |= BIT(id);
> + __raw_writel(val, bcm6345_reset->base);
> +
> + return 0;
> +}
> +
> +static int bcm6345_reset_assert(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + struct bcm6345_reset *bcm6345_reset =
> + container_of(rcdev, struct bcm6345_reset, rcdev);
> + unsigned long flags;
> +
> + spin_lock_irqsave(&bcm6345_reset->lock, flags);
> + bcm6345_reset_update(bcm6345_reset, id, true);
> + spin_unlock_irqrestore(&bcm6345_reset->lock, flags);
> +
> + return 0;
> +}
> +
> +static int bcm6345_reset_deassert(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + struct bcm6345_reset *bcm6345_reset =
> + container_of(rcdev, struct bcm6345_reset, rcdev);
> + unsigned long flags;
> +
> + spin_lock_irqsave(&bcm6345_reset->lock, flags);
> + bcm6345_reset_update(bcm6345_reset, id, false);
> + spin_unlock_irqrestore(&bcm6345_reset->lock, flags);
> +
> + return 0;
> +}
> +
> +static int bcm6345_reset_reset(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + struct bcm6345_reset *bcm6345_reset =
> + container_of(rcdev, struct bcm6345_reset, rcdev);
> + unsigned long flags;
> +
> + spin_lock_irqsave(&bcm6345_reset->lock, flags);
> + usleep_range(BCM6345_RESET_SLEEP_MIN_US,
> + BCM6345_RESET_SLEEP_MAX_US);
What is the purpose of sleeping before reset assertion?
If you can do without this, with I think this driver could be made to
use reset-simple.
regards
Philipp
Hi Philipp,
> El 9 jun 2020, a las 17:06, Philipp Zabel <[email protected]> escribió:
>
> Hi Álvaro,
>
> On Tue, 2020-06-09 at 15:42 +0200, Álvaro Fernández Rojas wrote:
>> Add support for resetting blocks through the Linux reset controller
>> subsystem for BCM63xx SoCs.
>>
>> Signed-off-by: Álvaro Fernández Rojas <[email protected]>
>> ---
>> drivers/reset/Kconfig | 7 ++
>> drivers/reset/Makefile | 1 +
>> drivers/reset/reset-bcm6345.c | 149 ++++++++++++++++++++++++++++++++++
>> 3 files changed, 157 insertions(+)
>> create mode 100644 drivers/reset/reset-bcm6345.c
>>
>> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
>> index d9efbfd29646..9f1da978cef6 100644
>> --- a/drivers/reset/Kconfig
>> +++ b/drivers/reset/Kconfig
>> @@ -41,6 +41,13 @@ config RESET_BERLIN
>> help
>> This enables the reset controller driver for Marvell Berlin SoCs.
>>
>> +config RESET_BCM6345
>> + bool "BCM6345 Reset Controller"
>> + depends on BMIPS_GENERIC || COMPILE_TEST
>> + default BMIPS_GENERIC
>> + help
>> + This enables the reset controller driver for BCM6345 SoCs.
>> +
>> config RESET_BRCMSTB
>> tristate "Broadcom STB reset controller"
>> depends on ARCH_BRCMSTB || COMPILE_TEST
>> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
>> index 249ed357c997..e642aae42f0f 100644
>> --- a/drivers/reset/Makefile
>> +++ b/drivers/reset/Makefile
>> @@ -6,6 +6,7 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/
>> obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
>> obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
>> obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o
>> +obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
>> obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
>> obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o
>> obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
>> diff --git a/drivers/reset/reset-bcm6345.c b/drivers/reset/reset-bcm6345.c
>> new file mode 100644
>> index 000000000000..088b7fdb896b
>> --- /dev/null
>> +++ b/drivers/reset/reset-bcm6345.c
>> @@ -0,0 +1,149 @@
>> +// SPDX-License-Identifier: GPL-2.0-or-later
>> +/*
>> + * BCM6345 Reset Controller Driver
>> + *
>> + * Copyright (C) 2020 Álvaro Fernández Rojas <[email protected]>
>> + */
>> +
>> +#include <linux/delay.h>
>> +#include <linux/init.h>
>> +#include <linux/io.h>
>> +#include <linux/mod_devicetable.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/reset-controller.h>
>> +
>> +#define BCM6345_RESET_NUM 32
>> +#define BCM6345_RESET_SLEEP_MIN_US 10000
>> +#define BCM6345_RESET_SLEEP_MAX_US 20000
>> +
>> +struct bcm6345_reset {
>> + struct reset_controller_dev rcdev;
>> + void __iomem *base;
>> + spinlock_t lock;
>> +};
>> +
>> +static int bcm6345_reset_update(struct bcm6345_reset *bcm6345_reset,
>> + unsigned long id, bool assert)
>> +{
>> + uint32_t val;
>> +
>> + val = __raw_readl(bcm6345_reset->base);
>> + if (assert)
>> + val &= ~BIT(id);
>> + else
>> + val |= BIT(id);
>> + __raw_writel(val, bcm6345_reset->base);
>> +
>> + return 0;
>> +}
>> +
>> +static int bcm6345_reset_assert(struct reset_controller_dev *rcdev,
>> + unsigned long id)
>> +{
>> + struct bcm6345_reset *bcm6345_reset =
>> + container_of(rcdev, struct bcm6345_reset, rcdev);
>> + unsigned long flags;
>> +
>> + spin_lock_irqsave(&bcm6345_reset->lock, flags);
>> + bcm6345_reset_update(bcm6345_reset, id, true);
>> + spin_unlock_irqrestore(&bcm6345_reset->lock, flags);
>> +
>> + return 0;
>> +}
>> +
>> +static int bcm6345_reset_deassert(struct reset_controller_dev *rcdev,
>> + unsigned long id)
>> +{
>> + struct bcm6345_reset *bcm6345_reset =
>> + container_of(rcdev, struct bcm6345_reset, rcdev);
>> + unsigned long flags;
>> +
>> + spin_lock_irqsave(&bcm6345_reset->lock, flags);
>> + bcm6345_reset_update(bcm6345_reset, id, false);
>> + spin_unlock_irqrestore(&bcm6345_reset->lock, flags);
>> +
>> + return 0;
>> +}
>> +
>> +static int bcm6345_reset_reset(struct reset_controller_dev *rcdev,
>> + unsigned long id)
>> +{
>> + struct bcm6345_reset *bcm6345_reset =
>> + container_of(rcdev, struct bcm6345_reset, rcdev);
>> + unsigned long flags;
>> +
>> + spin_lock_irqsave(&bcm6345_reset->lock, flags);
>> + usleep_range(BCM6345_RESET_SLEEP_MIN_US,
>> + BCM6345_RESET_SLEEP_MAX_US);
>
> What is the purpose of sleeping before reset assertion?
None, I must have introduced that for testing something and then I forgot to remove it. Sorry for that...
>
> If you can do without this, with I think this driver could be made to
> use reset-simple.
Yes, but only if I can add reset support with a configurable sleep range to reset-simple. Is this possible?
>
> regards
> Philipp
Best regards,
Álvaro.
BCM63xx SoCs have a reset controller for certain components.
v2: add compatibility to reset-simple instead of adding a new driver.
Álvaro Fernández Rojas (7):
mips: bmips: select ARCH_HAS_RESET_CONTROLLER
dt-bindings: reset: add BCM6345 reset controller bindings
drivers: reset: simple: add BCM6345 reset support
mips: bmips: dts: add BCM6328 reset controller support
mips: bmips: dts: add BCM6358 reset controller support
mips: bmips: dts: add BCM6362 reset controller support
mips: bmips: dts: add BCM6368 reset controller support
.../bindings/reset/brcm,bcm6345-reset.yaml | 37 +++++++++++++++++++
arch/mips/Kconfig | 1 +
arch/mips/boot/dts/brcm/bcm6328.dtsi | 6 +++
arch/mips/boot/dts/brcm/bcm6358.dtsi | 6 +++
arch/mips/boot/dts/brcm/bcm6362.dtsi | 6 +++
arch/mips/boot/dts/brcm/bcm6368.dtsi | 6 +++
drivers/reset/Kconfig | 3 +-
drivers/reset/reset-simple.c | 1 +
8 files changed, 65 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
--
2.26.2
Add support for resetting blocks through the Linux reset controller
subsystem for BCM63xx SoCs.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
v2: no changes
.../bindings/reset/brcm,bcm6345-reset.yaml | 37 +++++++++++++++++++
1 file changed, 37 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
diff --git a/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml b/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
new file mode 100644
index 000000000000..eb3f2182e631
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/reset/brcm,bcm6345-reset.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: BCM6345 reset controller
+
+description: This document describes the BCM6345 reset controller.
+
+maintainers:
+ - Álvaro Fernández Rojas <[email protected]>
+
+properties:
+ compatible:
+ const: brcm,bcm6345-reset
+
+ reg:
+ maxItems: 2
+
+ "#reset-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - "#reset-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
--
2.26.2
Add support for resetting blocks through the Linux reset controller
subsystem for BCM63xx SoCs.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
v2: add compatibility to reset-simple instead of adding a new driver.
drivers/reset/Kconfig | 3 ++-
drivers/reset/reset-simple.c | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index d9efbfd29646..84d29b585e9b 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -153,7 +153,7 @@ config RESET_SCMI
config RESET_SIMPLE
bool "Simple Reset Controller Driver" if COMPILE_TEST
- default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC
+ default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC || BMIPS_GENERIC
help
This enables a simple reset controller driver for reset lines that
that can be asserted and deasserted by toggling bits in a contiguous,
@@ -163,6 +163,7 @@ config RESET_SIMPLE
- Altera SoCFPGAs
- ASPEED BMC SoCs
- Bitmain BM1880 SoC
+ - BMIPS (BCM6345)
- Realtek SoCs
- RCC reset controller in STM32 MCUs
- Allwinner SoCs
diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
index 067e7e7b34f1..c00bb65c0b70 100644
--- a/drivers/reset/reset-simple.c
+++ b/drivers/reset/reset-simple.c
@@ -118,6 +118,7 @@ static const struct reset_simple_devdata reset_simple_active_low = {
static const struct of_device_id reset_simple_dt_ids[] = {
{ .compatible = "altr,stratix10-rst-mgr",
.data = &reset_simple_socfpga },
+ { .compatible = "brcm,bcm6345-reset" },
{ .compatible = "st,stm32-rcc", },
{ .compatible = "allwinner,sun6i-a31-clock-reset",
.data = &reset_simple_active_low },
--
2.26.2
This allows to add reset controllers support.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
v2: no changes
arch/mips/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 9dc08ee3d6b9..e82586e7719c 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -229,6 +229,7 @@ config ATH79
config BMIPS_GENERIC
bool "Broadcom Generic BMIPS kernel"
+ select ARCH_HAS_RESET_CONTROLLER
select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
select ARCH_HAS_PHYS_TO_DMA
select BOOT_RAW
--
2.26.2
BCM6368 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
v2: no changes.
arch/mips/boot/dts/brcm/bcm6368.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/mips/boot/dts/brcm/bcm6368.dtsi b/arch/mips/boot/dts/brcm/bcm6368.dtsi
index 449c167dd892..52c19f40b9cc 100644
--- a/arch/mips/boot/dts/brcm/bcm6368.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6368.dtsi
@@ -70,6 +70,12 @@ reboot: syscon-reboot@10000008 {
mask = <0x1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x10>,
--
2.26.2
BCM6358 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
v2: no changes.
arch/mips/boot/dts/brcm/bcm6358.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/mips/boot/dts/brcm/bcm6358.dtsi b/arch/mips/boot/dts/brcm/bcm6358.dtsi
index f21176cac038..9d93e7f5e6fc 100644
--- a/arch/mips/boot/dts/brcm/bcm6358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6358.dtsi
@@ -82,6 +82,12 @@ periph_intc: interrupt-controller@fffe000c {
interrupts = <2>, <3>;
};
+ periph_rst: reset-controller@fffe0034 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0xfffe0034 0x4>;
+ #reset-cells = <1>;
+ };
+
leds0: led-controller@fffe00d0 {
#address-cells = <1>;
#size-cells = <0>;
--
2.26.2
BCM6362 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
v2: no changes.
arch/mips/boot/dts/brcm/bcm6362.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/mips/boot/dts/brcm/bcm6362.dtsi b/arch/mips/boot/dts/brcm/bcm6362.dtsi
index 8ae6981735b8..443af6b4c838 100644
--- a/arch/mips/boot/dts/brcm/bcm6362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6362.dtsi
@@ -70,6 +70,12 @@ reboot: syscon-reboot@10000008 {
mask = <0x1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x10>,
--
2.26.2
BCM6328 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
v2: no changes.
arch/mips/boot/dts/brcm/bcm6328.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/mips/boot/dts/brcm/bcm6328.dtsi b/arch/mips/boot/dts/brcm/bcm6328.dtsi
index af860d06def6..590118cf5c12 100644
--- a/arch/mips/boot/dts/brcm/bcm6328.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6328.dtsi
@@ -57,6 +57,12 @@ clkctl: clock-controller@10000004 {
#clock-cells = <1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x10>,
--
2.26.2
Hi Álvaro,
On Tue, 2020-06-09 at 17:14 +0200, Álvaro Fernández Rojas wrote:
> Hi Philipp,
>
> > El 9 jun 2020, a las 17:06, Philipp Zabel <[email protected]> escribió:
> >
> > Hi Álvaro,
> >
> > On Tue, 2020-06-09 at 15:42 +0200, Álvaro Fernández Rojas wrote:
> > > Add support for resetting blocks through the Linux reset controller
> > > subsystem for BCM63xx SoCs.
> > >
> > > Signed-off-by: Álvaro Fernández Rojas <[email protected]>
> > > ---
> > > drivers/reset/Kconfig | 7 ++
> > > drivers/reset/Makefile | 1 +
> > > drivers/reset/reset-bcm6345.c | 149 ++++++++++++++++++++++++++++++++++
> > > 3 files changed, 157 insertions(+)
> > > create mode 100644 drivers/reset/reset-bcm6345.c
> > >
> > > diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> > > index d9efbfd29646..9f1da978cef6 100644
> > > --- a/drivers/reset/Kconfig
> > > +++ b/drivers/reset/Kconfig
> > > @@ -41,6 +41,13 @@ config RESET_BERLIN
> > > help
> > > This enables the reset controller driver for Marvell Berlin SoCs.
> > >
> > > +config RESET_BCM6345
> > > + bool "BCM6345 Reset Controller"
> > > + depends on BMIPS_GENERIC || COMPILE_TEST
> > > + default BMIPS_GENERIC
> > > + help
> > > + This enables the reset controller driver for BCM6345 SoCs.
> > > +
> > > config RESET_BRCMSTB
> > > tristate "Broadcom STB reset controller"
> > > depends on ARCH_BRCMSTB || COMPILE_TEST
> > > diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> > > index 249ed357c997..e642aae42f0f 100644
> > > --- a/drivers/reset/Makefile
> > > +++ b/drivers/reset/Makefile
> > > @@ -6,6 +6,7 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/
> > > obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
> > > obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
> > > obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o
> > > +obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
> > > obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
> > > obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o
> > > obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
> > > diff --git a/drivers/reset/reset-bcm6345.c b/drivers/reset/reset-bcm6345.c
> > > new file mode 100644
> > > index 000000000000..088b7fdb896b
> > > --- /dev/null
> > > +++ b/drivers/reset/reset-bcm6345.c
> > > @@ -0,0 +1,149 @@
> > > +// SPDX-License-Identifier: GPL-2.0-or-later
> > > +/*
> > > + * BCM6345 Reset Controller Driver
> > > + *
> > > + * Copyright (C) 2020 Álvaro Fernández Rojas <[email protected]>
> > > + */
> > > +
> > > +#include <linux/delay.h>
> > > +#include <linux/init.h>
> > > +#include <linux/io.h>
> > > +#include <linux/mod_devicetable.h>
> > > +#include <linux/platform_device.h>
> > > +#include <linux/reset-controller.h>
> > > +
> > > +#define BCM6345_RESET_NUM 32
> > > +#define BCM6345_RESET_SLEEP_MIN_US 10000
> > > +#define BCM6345_RESET_SLEEP_MAX_US 20000
> > > +
> > > +struct bcm6345_reset {
> > > + struct reset_controller_dev rcdev;
> > > + void __iomem *base;
> > > + spinlock_t lock;
> > > +};
> > > +
> > > +static int bcm6345_reset_update(struct bcm6345_reset *bcm6345_reset,
> > > + unsigned long id, bool assert)
> > > +{
> > > + uint32_t val;
> > > +
> > > + val = __raw_readl(bcm6345_reset->base);
> > > + if (assert)
> > > + val &= ~BIT(id);
> > > + else
> > > + val |= BIT(id);
> > > + __raw_writel(val, bcm6345_reset->base);
> > > +
> > > + return 0;
> > > +}
> > > +
> > > +static int bcm6345_reset_assert(struct reset_controller_dev *rcdev,
> > > + unsigned long id)
> > > +{
> > > + struct bcm6345_reset *bcm6345_reset =
> > > + container_of(rcdev, struct bcm6345_reset, rcdev);
> > > + unsigned long flags;
> > > +
> > > + spin_lock_irqsave(&bcm6345_reset->lock, flags);
> > > + bcm6345_reset_update(bcm6345_reset, id, true);
> > > + spin_unlock_irqrestore(&bcm6345_reset->lock, flags);
> > > +
> > > + return 0;
> > > +}
> > > +
> > > +static int bcm6345_reset_deassert(struct reset_controller_dev *rcdev,
> > > + unsigned long id)
> > > +{
> > > + struct bcm6345_reset *bcm6345_reset =
> > > + container_of(rcdev, struct bcm6345_reset, rcdev);
> > > + unsigned long flags;
> > > +
> > > + spin_lock_irqsave(&bcm6345_reset->lock, flags);
> > > + bcm6345_reset_update(bcm6345_reset, id, false);
> > > + spin_unlock_irqrestore(&bcm6345_reset->lock, flags);
> > > +
> > > + return 0;
> > > +}
> > > +
> > > +static int bcm6345_reset_reset(struct reset_controller_dev *rcdev,
> > > + unsigned long id)
> > > +{
> > > + struct bcm6345_reset *bcm6345_reset =
> > > + container_of(rcdev, struct bcm6345_reset, rcdev);
> > > + unsigned long flags;
> > > +
> > > + spin_lock_irqsave(&bcm6345_reset->lock, flags);
> > > + usleep_range(BCM6345_RESET_SLEEP_MIN_US,
> > > + BCM6345_RESET_SLEEP_MAX_US);
> >
> > What is the purpose of sleeping before reset assertion?
>
> None, I must have introduced that for testing something and then I forgot to remove it. Sorry for that...
>
> > If you can do without this, with I think this driver could be made to
> > use reset-simple.
>
> Yes, but only if I can add reset support with a configurable sleep range to reset-simple. Is this possible?
I should have mentioned, support for this is on the reset/next branch:
git://git.pengutronix.de/pza/linux.git reset/next
regards
Philipp
Hello Philipp,
> El 9 jun 2020, a las 18:32, Philipp Zabel <[email protected]> escribió:
>
> Hi Álvaro,
>
> On Tue, 2020-06-09 at 17:14 +0200, Álvaro Fernández Rojas wrote:
>> Hi Philipp,
>>
>>> El 9 jun 2020, a las 17:06, Philipp Zabel <[email protected]> escribió:
>>>
>>> Hi Álvaro,
>>>
>>> On Tue, 2020-06-09 at 15:42 +0200, Álvaro Fernández Rojas wrote:
>>>> Add support for resetting blocks through the Linux reset controller
>>>> subsystem for BCM63xx SoCs.
>>>>
>>>> Signed-off-by: Álvaro Fernández Rojas <[email protected]>
>>>> ---
>>>> drivers/reset/Kconfig | 7 ++
>>>> drivers/reset/Makefile | 1 +
>>>> drivers/reset/reset-bcm6345.c | 149 ++++++++++++++++++++++++++++++++++
>>>> 3 files changed, 157 insertions(+)
>>>> create mode 100644 drivers/reset/reset-bcm6345.c
>>>>
>>>> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
>>>> index d9efbfd29646..9f1da978cef6 100644
>>>> --- a/drivers/reset/Kconfig
>>>> +++ b/drivers/reset/Kconfig
>>>> @@ -41,6 +41,13 @@ config RESET_BERLIN
>>>> help
>>>> This enables the reset controller driver for Marvell Berlin SoCs.
>>>>
>>>> +config RESET_BCM6345
>>>> + bool "BCM6345 Reset Controller"
>>>> + depends on BMIPS_GENERIC || COMPILE_TEST
>>>> + default BMIPS_GENERIC
>>>> + help
>>>> + This enables the reset controller driver for BCM6345 SoCs.
>>>> +
>>>> config RESET_BRCMSTB
>>>> tristate "Broadcom STB reset controller"
>>>> depends on ARCH_BRCMSTB || COMPILE_TEST
>>>> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
>>>> index 249ed357c997..e642aae42f0f 100644
>>>> --- a/drivers/reset/Makefile
>>>> +++ b/drivers/reset/Makefile
>>>> @@ -6,6 +6,7 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/
>>>> obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
>>>> obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
>>>> obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o
>>>> +obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
>>>> obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
>>>> obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o
>>>> obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
>>>> diff --git a/drivers/reset/reset-bcm6345.c b/drivers/reset/reset-bcm6345.c
>>>> new file mode 100644
>>>> index 000000000000..088b7fdb896b
>>>> --- /dev/null
>>>> +++ b/drivers/reset/reset-bcm6345.c
>>>> @@ -0,0 +1,149 @@
>>>> +// SPDX-License-Identifier: GPL-2.0-or-later
>>>> +/*
>>>> + * BCM6345 Reset Controller Driver
>>>> + *
>>>> + * Copyright (C) 2020 Álvaro Fernández Rojas <[email protected]>
>>>> + */
>>>> +
>>>> +#include <linux/delay.h>
>>>> +#include <linux/init.h>
>>>> +#include <linux/io.h>
>>>> +#include <linux/mod_devicetable.h>
>>>> +#include <linux/platform_device.h>
>>>> +#include <linux/reset-controller.h>
>>>> +
>>>> +#define BCM6345_RESET_NUM 32
>>>> +#define BCM6345_RESET_SLEEP_MIN_US 10000
>>>> +#define BCM6345_RESET_SLEEP_MAX_US 20000
>>>> +
>>>> +struct bcm6345_reset {
>>>> + struct reset_controller_dev rcdev;
>>>> + void __iomem *base;
>>>> + spinlock_t lock;
>>>> +};
>>>> +
>>>> +static int bcm6345_reset_update(struct bcm6345_reset *bcm6345_reset,
>>>> + unsigned long id, bool assert)
>>>> +{
>>>> + uint32_t val;
>>>> +
>>>> + val = __raw_readl(bcm6345_reset->base);
>>>> + if (assert)
>>>> + val &= ~BIT(id);
>>>> + else
>>>> + val |= BIT(id);
>>>> + __raw_writel(val, bcm6345_reset->base);
>>>> +
>>>> + return 0;
>>>> +}
>>>> +
>>>> +static int bcm6345_reset_assert(struct reset_controller_dev *rcdev,
>>>> + unsigned long id)
>>>> +{
>>>> + struct bcm6345_reset *bcm6345_reset =
>>>> + container_of(rcdev, struct bcm6345_reset, rcdev);
>>>> + unsigned long flags;
>>>> +
>>>> + spin_lock_irqsave(&bcm6345_reset->lock, flags);
>>>> + bcm6345_reset_update(bcm6345_reset, id, true);
>>>> + spin_unlock_irqrestore(&bcm6345_reset->lock, flags);
>>>> +
>>>> + return 0;
>>>> +}
>>>> +
>>>> +static int bcm6345_reset_deassert(struct reset_controller_dev *rcdev,
>>>> + unsigned long id)
>>>> +{
>>>> + struct bcm6345_reset *bcm6345_reset =
>>>> + container_of(rcdev, struct bcm6345_reset, rcdev);
>>>> + unsigned long flags;
>>>> +
>>>> + spin_lock_irqsave(&bcm6345_reset->lock, flags);
>>>> + bcm6345_reset_update(bcm6345_reset, id, false);
>>>> + spin_unlock_irqrestore(&bcm6345_reset->lock, flags);
>>>> +
>>>> + return 0;
>>>> +}
>>>> +
>>>> +static int bcm6345_reset_reset(struct reset_controller_dev *rcdev,
>>>> + unsigned long id)
>>>> +{
>>>> + struct bcm6345_reset *bcm6345_reset =
>>>> + container_of(rcdev, struct bcm6345_reset, rcdev);
>>>> + unsigned long flags;
>>>> +
>>>> + spin_lock_irqsave(&bcm6345_reset->lock, flags);
>>>> + usleep_range(BCM6345_RESET_SLEEP_MIN_US,
>>>> + BCM6345_RESET_SLEEP_MAX_US);
>>>
>>> What is the purpose of sleeping before reset assertion?
>>
>> None, I must have introduced that for testing something and then I forgot to remove it. Sorry for that...
>>
>>> If you can do without this, with I think this driver could be made to
>>> use reset-simple.
>>
>> Yes, but only if I can add reset support with a configurable sleep range to reset-simple. Is this possible?
>
> I should have mentioned, support for this is on the reset/next branch:
>
> git://git.pengutronix.de/pza/linux.git reset/next
Yes, but reset_us was only added to reset_simple_data, so there’s no way to fill that value from reset_simple_devdata or device tree, right?
>
> regards
> Philipp
Regards,
Álvaro.
On 6/9/2020 9:41 AM, Álvaro Fernández Rojas wrote:
>>>> If you can do without this, with I think this driver could be made to
>>>> use reset-simple.
>>>
>>> Yes, but only if I can add reset support with a configurable sleep range to reset-simple. Is this possible?
>>
>> I should have mentioned, support for this is on the reset/next branch:
>>
>> git://git.pengutronix.de/pza/linux.git reset/next
>
> Yes, but reset_us was only added to reset_simple_data, so there’s no way to fill that value from reset_simple_devdata or device tree, right?
Not that I can see, but you could certainly extend it here:
if (devdata) {
reg_offset = devdata->reg_offset;
if (devdata->nr_resets)
data->rcdev.nr_resets = devdata->nr_resets;
data->active_low = devdata->active_low;
data->status_active_low = devdata->status_active_low;
}
and have an appropriate devdata structure be provided for your
compatible string:
+ { .compatible = "brcm,bcm6345-reset", .data = bcm6345_reset_devdata },
--
Florian
On 6/9/2020 9:02 AM, Álvaro Fernández Rojas wrote:
> This allows to add reset controllers support.
>
> Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
--
Florian
On 6/9/2020 9:02 AM, Álvaro Fernández Rojas wrote:
> Add support for resetting blocks through the Linux reset controller
> subsystem for BCM63xx SoCs.
>
> Signed-off-by: Álvaro Fernández Rojas <[email protected]>
This looks good to me, however in v1 there was a need for sleeping after
the reset assertion, and this does not appear to be taken care of by
default by reset-simple.c, did you determine the delay not to be necessary?
--
Florian
On 6/9/2020 9:02 AM, Álvaro Fernández Rojas wrote:
> BCM6328 SoCs have a reset controller for certain components.
>
> Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
You should probably create include files under include/dt-bindings/
which designate the various reset control bits that are valid for a
given SoC.
--
Florian
On 6/9/2020 9:02 AM, Álvaro Fernández Rojas wrote:
> BCM6358 SoCs have a reset controller for certain components.
>
> Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
--
Florian
On 6/9/2020 9:02 AM, Álvaro Fernández Rojas wrote:
> BCM6368 SoCs have a reset controller for certain components.
>
> Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
--
Florian
On 6/9/2020 9:02 AM, Álvaro Fernández Rojas wrote:
> Add support for resetting blocks through the Linux reset controller
> subsystem for BCM63xx SoCs.
The commit message should be paraphrasing part of your binding content,
not necessarily describing why this is useful.
This looks good to me though:
Reviewed-by: Florian Fainelli <[email protected]>
--
Florian
On 6/9/2020 9:02 AM, Álvaro Fernández Rojas wrote:
> BCM6362 SoCs have a reset controller for certain components.
>
> Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
--
Florian
Hi Florian,
> El 10 jun 2020, a las 3:08, Florian Fainelli <[email protected]> escribió:
>
>
>
> On 6/9/2020 9:02 AM, Álvaro Fernández Rojas wrote:
>> BCM6328 SoCs have a reset controller for certain components.
>>
>> Signed-off-by: Álvaro Fernández Rojas <[email protected]>
>
> Acked-by: Florian Fainelli <[email protected]>
>
> You should probably create include files under include/dt-bindings/
> which designate the various reset control bits that are valid for a
> given SoC.
I will do that in v3.
> --
> Florian
Hi Florian,
> El 10 jun 2020, a las 3:05, Florian Fainelli <[email protected]> escribió:
>
>
>
> On 6/9/2020 9:02 AM, Álvaro Fernández Rojas wrote:
>> Add support for resetting blocks through the Linux reset controller
>> subsystem for BCM63xx SoCs.
>>
>> Signed-off-by: Álvaro Fernández Rojas <[email protected]>
>
> This looks good to me, however in v1 there was a need for sleeping after
> the reset assertion, and this does not appear to be taken care of by
> default by reset-simple.c, did you determine the delay not to be necessary?
Let me do some more tests to determine if it’s really needed.
> --
> Florian
Hi Florian,
> El 9 jun 2020, a las 22:17, Florian Fainelli <[email protected]> escribió:
>
>
>
> On 6/9/2020 9:41 AM, Álvaro Fernández Rojas wrote:
>>>>> If you can do without this, with I think this driver could be made to
>>>>> use reset-simple.
>>>>
>>>> Yes, but only if I can add reset support with a configurable sleep range to reset-simple. Is this possible?
>>>
>>> I should have mentioned, support for this is on the reset/next branch:
>>>
>>> git://git.pengutronix.de/pza/linux.git reset/next
>>
>> Yes, but reset_us was only added to reset_simple_data, so there’s no way to fill that value from reset_simple_devdata or device tree, right?
>
> Not that I can see, but you could certainly extend it here:
>
> if (devdata) {
> reg_offset = devdata->reg_offset;
> if (devdata->nr_resets)
> data->rcdev.nr_resets = devdata->nr_resets;
> data->active_low = devdata->active_low;
> data->status_active_low = devdata->status_active_low;
> }
Yes, I would extend it there too, but I was just saying that it’s a bit strange that it was only added to reset_simple_data without any way to fill the value.
>
> and have an appropriate devdata structure be provided for your
> compatible string:
>
> + { .compatible = "brcm,bcm6345-reset", .data = bcm6345_reset_devdata },
> --
> Florian
Regards,
Álvaro.
Hi Álvaro,
On Wed, 2020-06-10 at 08:08 +0200, Álvaro Fernández Rojas wrote:
> Hi Florian,
>
> > El 9 jun 2020, a las 22:17, Florian Fainelli <[email protected]> escribió:
> >
> >
> >
> > On 6/9/2020 9:41 AM, Álvaro Fernández Rojas wrote:
> > > > > > If you can do without this, with I think this driver could be made to
> > > > > > use reset-simple.
> > > > >
> > > > > Yes, but only if I can add reset support with a configurable sleep range to reset-simple. Is this possible?
> > > >
> > > > I should have mentioned, support for this is on the reset/next branch:
> > > >
> > > > git://git.pengutronix.de/pza/linux.git reset/next
> > >
> > > Yes, but reset_us was only added to reset_simple_data, so there’s no way to fill that value from reset_simple_devdata or device tree, right?
> >
> > Not that I can see, but you could certainly extend it here:
> >
> > if (devdata) {
> > reg_offset = devdata->reg_offset;
> > if (devdata->nr_resets)
> > data->rcdev.nr_resets = devdata->nr_resets;
> > data->active_low = devdata->active_low;
> > data->status_active_low = devdata->status_active_low;
> > }
>
> Yes, I would extend it there too,
You are right, reset_us is missing from reset_simple_devdata.
> but I was just saying that it’s a bit strange that it was only added
> to reset_simple_data without any way to fill the value.
The patch was added for the benefit of drivers that register their own
reset controller using reset_simple_data/ops, like sunxi or socfpga.
This might be considered an oversight, but until now there was no user
inside reset-simple.c.
regards
Philipp
BCM63xx SoCs have a reset controller for certain components.
v3: using reset-simple isn't possible since sleeping after performing the
reset is also needed.
Add BCM63268 and BCM6318 support.
v2: add compatibility to reset-simple instead of adding a new driver.
Álvaro Fernández Rojas (9):
mips: bmips: select ARCH_HAS_RESET_CONTROLLER
dt-bindings: reset: add BCM6345 reset controller bindings
reset: add BCM6345 reset controller driver
mips: bmips: dts: add BCM6328 reset controller support
mips: bmips: dts: add BCM6358 reset controller support
mips: bmips: dts: add BCM6362 reset controller support
mips: bmips: dts: add BCM6368 reset controller support
mips: bmips: dts: add BCM63268 reset controller support
mips: bmips: add BCM6318 reset controller definitions
.../bindings/reset/brcm,bcm6345-reset.yaml | 37 +++++
arch/mips/Kconfig | 1 +
arch/mips/boot/dts/brcm/bcm63268.dtsi | 6 +
arch/mips/boot/dts/brcm/bcm6328.dtsi | 6 +
arch/mips/boot/dts/brcm/bcm6358.dtsi | 6 +
arch/mips/boot/dts/brcm/bcm6362.dtsi | 6 +
arch/mips/boot/dts/brcm/bcm6368.dtsi | 6 +
drivers/reset/Kconfig | 7 +
drivers/reset/Makefile | 1 +
drivers/reset/reset-bcm6345.c | 135 ++++++++++++++++++
include/dt-bindings/reset/bcm6318-reset.h | 20 +++
include/dt-bindings/reset/bcm63268-reset.h | 26 ++++
include/dt-bindings/reset/bcm6328-reset.h | 18 +++
include/dt-bindings/reset/bcm6358-reset.h | 15 ++
include/dt-bindings/reset/bcm6362-reset.h | 22 +++
include/dt-bindings/reset/bcm6368-reset.h | 16 +++
16 files changed, 328 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
create mode 100644 drivers/reset/reset-bcm6345.c
create mode 100644 include/dt-bindings/reset/bcm6318-reset.h
create mode 100644 include/dt-bindings/reset/bcm63268-reset.h
create mode 100644 include/dt-bindings/reset/bcm6328-reset.h
create mode 100644 include/dt-bindings/reset/bcm6358-reset.h
create mode 100644 include/dt-bindings/reset/bcm6362-reset.h
create mode 100644 include/dt-bindings/reset/bcm6368-reset.h
--
2.26.2
Add support for resetting blocks through the Linux reset controller
subsystem for BCM63xx SoCs.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
v3: using reset-simple isn't possible since sleeping after performing the
reset is also needed.
v2: add compatibility to reset-simple instead of adding a new driver.
drivers/reset/Kconfig | 7 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-bcm6345.c | 135 ++++++++++++++++++++++++++++++++++
3 files changed, 143 insertions(+)
create mode 100644 drivers/reset/reset-bcm6345.c
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index d9efbfd29646..9f1da978cef6 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -41,6 +41,13 @@ config RESET_BERLIN
help
This enables the reset controller driver for Marvell Berlin SoCs.
+config RESET_BCM6345
+ bool "BCM6345 Reset Controller"
+ depends on BMIPS_GENERIC || COMPILE_TEST
+ default BMIPS_GENERIC
+ help
+ This enables the reset controller driver for BCM6345 SoCs.
+
config RESET_BRCMSTB
tristate "Broadcom STB reset controller"
depends on ARCH_BRCMSTB || COMPILE_TEST
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 249ed357c997..e642aae42f0f 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/
obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o
+obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o
obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
diff --git a/drivers/reset/reset-bcm6345.c b/drivers/reset/reset-bcm6345.c
new file mode 100644
index 000000000000..6c9238762ee5
--- /dev/null
+++ b/drivers/reset/reset-bcm6345.c
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * BCM6345 Reset Controller Driver
+ *
+ * Copyright (C) 2020 Álvaro Fernández Rojas <[email protected]>
+ */
+
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/mod_devicetable.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+
+#define BCM6345_RESET_NUM 32
+#define BCM6345_RESET_SLEEP_MIN_US 10000
+#define BCM6345_RESET_SLEEP_MAX_US 20000
+
+struct bcm6345_reset {
+ struct reset_controller_dev rcdev;
+ void __iomem *base;
+ spinlock_t lock;
+};
+
+static void bcm6345_reset_update(struct reset_controller_dev *rcdev,
+ unsigned long id, bool assert)
+{
+ struct bcm6345_reset *bcm6345_reset =
+ container_of(rcdev, struct bcm6345_reset, rcdev);
+ unsigned long flags;
+ uint32_t val;
+
+ spin_lock_irqsave(&bcm6345_reset->lock, flags);
+ val = __raw_readl(bcm6345_reset->base);
+ if (assert)
+ val &= ~BIT(id);
+ else
+ val |= BIT(id);
+ __raw_writel(val, bcm6345_reset->base);
+ spin_unlock_irqrestore(&bcm6345_reset->lock, flags);
+}
+
+static int bcm6345_reset_assert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ bcm6345_reset_update(rcdev, id, true);
+
+ return 0;
+}
+
+static int bcm6345_reset_deassert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ bcm6345_reset_update(rcdev, id, false);
+
+ return 0;
+}
+
+static int bcm6345_reset_reset(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ bcm6345_reset_update(rcdev, id, true);
+ usleep_range(BCM6345_RESET_SLEEP_MIN_US,
+ BCM6345_RESET_SLEEP_MAX_US);
+
+ bcm6345_reset_update(rcdev, id, false);
+ usleep_range(BCM6345_RESET_SLEEP_MIN_US,
+ BCM6345_RESET_SLEEP_MAX_US);
+
+ return 0;
+}
+
+static int bcm6345_reset_status(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ struct bcm6345_reset *bcm6345_reset =
+ container_of(rcdev, struct bcm6345_reset, rcdev);
+
+ return !(__raw_readl(bcm6345_reset->base) & BIT(id));
+}
+
+static struct reset_control_ops bcm6345_reset_ops = {
+ .assert = bcm6345_reset_assert,
+ .deassert = bcm6345_reset_deassert,
+ .reset = bcm6345_reset_reset,
+ .status = bcm6345_reset_status,
+};
+
+static int __init bcm6345_reset_probe(struct platform_device *pdev)
+{
+ struct bcm6345_reset *bcm6345_reset;
+ struct resource *res;
+ int err;
+
+ bcm6345_reset = devm_kzalloc(&pdev->dev,
+ sizeof(*bcm6345_reset), GFP_KERNEL);
+ if (!bcm6345_reset)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, bcm6345_reset);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ bcm6345_reset->base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(bcm6345_reset->base))
+ return PTR_ERR(bcm6345_reset->base);
+
+ spin_lock_init(&bcm6345_reset->lock);
+ bcm6345_reset->rcdev.ops = &bcm6345_reset_ops;
+ bcm6345_reset->rcdev.owner = THIS_MODULE;
+ bcm6345_reset->rcdev.of_node = pdev->dev.of_node;
+ bcm6345_reset->rcdev.of_reset_n_cells = 1;
+ bcm6345_reset->rcdev.nr_resets = BCM6345_RESET_NUM;
+
+ err = devm_reset_controller_register(&pdev->dev,
+ &bcm6345_reset->rcdev);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+static const struct of_device_id bcm6345_reset_of_match[] = {
+ { .compatible = "brcm,bcm6345-reset" },
+ { },
+};
+
+static struct platform_driver bcm6345_reset_driver = {
+ .probe = bcm6345_reset_probe,
+ .driver = {
+ .name = "bcm6345-reset",
+ .of_match_table = bcm6345_reset_of_match,
+ .suppress_bind_attrs = true,
+ },
+};
+builtin_platform_driver(bcm6345_reset_driver);
--
2.26.2
Add device tree binding documentation for BCM6345 reset controller.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
---
.../bindings/reset/brcm,bcm6345-reset.yaml | 37 +++++++++++++++++++
1 file changed, 37 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
diff --git a/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml b/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
new file mode 100644
index 000000000000..eb3f2182e631
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/reset/brcm,bcm6345-reset.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: BCM6345 reset controller
+
+description: This document describes the BCM6345 reset controller.
+
+maintainers:
+ - Álvaro Fernández Rojas <[email protected]>
+
+properties:
+ compatible:
+ const: brcm,bcm6345-reset
+
+ reg:
+ maxItems: 2
+
+ "#reset-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - "#reset-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
--
2.26.2
BCM63268 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
v3: add new path with BCM63268 reset controller support.
arch/mips/boot/dts/brcm/bcm63268.dtsi | 6 +++++
include/dt-bindings/reset/bcm63268-reset.h | 26 ++++++++++++++++++++++
2 files changed, 32 insertions(+)
create mode 100644 include/dt-bindings/reset/bcm63268-reset.h
diff --git a/arch/mips/boot/dts/brcm/bcm63268.dtsi b/arch/mips/boot/dts/brcm/bcm63268.dtsi
index beec24145af7..0150da7e3905 100644
--- a/arch/mips/boot/dts/brcm/bcm63268.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm63268.dtsi
@@ -70,6 +70,12 @@ reboot: syscon-reboot@10000008 {
mask = <0x1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x20>,
diff --git a/include/dt-bindings/reset/bcm63268-reset.h b/include/dt-bindings/reset/bcm63268-reset.h
new file mode 100644
index 000000000000..6a6403a4c2d5
--- /dev/null
+++ b/include/dt-bindings/reset/bcm63268-reset.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM63268_H
+#define __DT_BINDINGS_RESET_BCM63268_H
+
+#define BCM63268_RST_SPI 0
+#define BCM63268_RST_IPSEC 1
+#define BCM63268_RST_EPHY 2
+#define BCM63268_RST_SAR 3
+#define BCM63268_RST_ENETSW 4
+#define BCM63268_RST_USBS 5
+#define BCM63268_RST_USBH 6
+#define BCM63268_RST_PCM 7
+#define BCM63268_RST_PCIE_CORE 8
+#define BCM63268_RST_PCIE 9
+#define BCM63268_RST_PCIE_EXT 10
+#define BCM63268_RST_WLAN_SHIM 11
+#define BCM63268_RST_DDR_PHY 12
+#define BCM63268_RST_FAP0 13
+#define BCM63268_RST_WLAN_UBUS 14
+#define BCM63268_RST_DECT 15
+#define BCM63268_RST_FAP1 16
+#define BCM63268_RST_PCIE_HARD 17
+#define BCM63268_RST_GPHY 18
+
+#endif /* __DT_BINDINGS_RESET_BCM63268_H */
--
2.26.2
BCM6318 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
v3: add new path with BCM6318 reset controller definitions.
include/dt-bindings/reset/bcm6318-reset.h | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
create mode 100644 include/dt-bindings/reset/bcm6318-reset.h
diff --git a/include/dt-bindings/reset/bcm6318-reset.h b/include/dt-bindings/reset/bcm6318-reset.h
new file mode 100644
index 000000000000..f4fef7bfb06d
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6318-reset.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6318_H
+#define __DT_BINDINGS_RESET_BCM6318_H
+
+#define BCM6318_RST_SPI 0
+#define BCM6318_RST_EPHY 1
+#define BCM6318_RST_SAR 2
+#define BCM6318_RST_ENETSW 3
+#define BCM6318_RST_USBD 4
+#define BCM6318_RST_USBH 5
+#define BCM6318_RST_PCIE_CORE 6
+#define BCM6318_RST_PCIE 7
+#define BCM6318_RST_PCIE_EXT 8
+#define BCM6318_RST_PCIE_HARD 9
+#define BCM6318_RST_ADSL 10
+#define BCM6318_RST_PHYMIPS 11
+#define BCM6318_RST_HOSTMIPS 11
+
+#endif /* __DT_BINDINGS_RESET_BCM6318_H */
--
2.26.2
BCM6358 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
---
v3: add reset controller definitions header file.
v2: no changes.
arch/mips/boot/dts/brcm/bcm6358.dtsi | 6 ++++++
include/dt-bindings/reset/bcm6358-reset.h | 15 +++++++++++++++
2 files changed, 21 insertions(+)
create mode 100644 include/dt-bindings/reset/bcm6358-reset.h
diff --git a/arch/mips/boot/dts/brcm/bcm6358.dtsi b/arch/mips/boot/dts/brcm/bcm6358.dtsi
index f21176cac038..9d93e7f5e6fc 100644
--- a/arch/mips/boot/dts/brcm/bcm6358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6358.dtsi
@@ -82,6 +82,12 @@ periph_intc: interrupt-controller@fffe000c {
interrupts = <2>, <3>;
};
+ periph_rst: reset-controller@fffe0034 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0xfffe0034 0x4>;
+ #reset-cells = <1>;
+ };
+
leds0: led-controller@fffe00d0 {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/include/dt-bindings/reset/bcm6358-reset.h b/include/dt-bindings/reset/bcm6358-reset.h
new file mode 100644
index 000000000000..bda62ef84f5a
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6358-reset.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6358_H
+#define __DT_BINDINGS_RESET_BCM6358_H
+
+#define BCM6358_RST_SPI 0
+#define BCM6358_RST_ENET 2
+#define BCM6358_RST_MPI 3
+#define BCM6358_RST_EPHY 6
+#define BCM6358_RST_SAR 7
+#define BCM6358_RST_USBH 12
+#define BCM6358_RST_PCM 13
+#define BCM6358_RST_ADSL 14
+
+#endif /* __DT_BINDINGS_RESET_BCM6358_H */
--
2.26.2
BCM6362 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
---
v3: add reset controller definitions header file.
v2: no changes.
arch/mips/boot/dts/brcm/bcm6362.dtsi | 6 ++++++
include/dt-bindings/reset/bcm6362-reset.h | 22 ++++++++++++++++++++++
2 files changed, 28 insertions(+)
create mode 100644 include/dt-bindings/reset/bcm6362-reset.h
diff --git a/arch/mips/boot/dts/brcm/bcm6362.dtsi b/arch/mips/boot/dts/brcm/bcm6362.dtsi
index 8ae6981735b8..443af6b4c838 100644
--- a/arch/mips/boot/dts/brcm/bcm6362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6362.dtsi
@@ -70,6 +70,12 @@ reboot: syscon-reboot@10000008 {
mask = <0x1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x10>,
diff --git a/include/dt-bindings/reset/bcm6362-reset.h b/include/dt-bindings/reset/bcm6362-reset.h
new file mode 100644
index 000000000000..7ebb0546e0ab
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6362-reset.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6362_H
+#define __DT_BINDINGS_RESET_BCM6362_H
+
+#define BCM6362_RST_SPI 0
+#define BCM6362_RST_IPSEC 1
+#define BCM6362_RST_EPHY 2
+#define BCM6362_RST_SAR 3
+#define BCM6362_RST_ENETSW 4
+#define BCM6362_RST_USBD 5
+#define BCM6362_RST_USBH 6
+#define BCM6362_RST_PCM 7
+#define BCM6362_RST_PCIE_CORE 8
+#define BCM6362_RST_PCIE 9
+#define BCM6362_RST_PCIE_EXT 10
+#define BCM6362_RST_WLAN_SHIM 11
+#define BCM6362_RST_DDR_PHY 12
+#define BCM6362_RST_FAP 13
+#define BCM6362_RST_WLAN_UBUS 14
+
+#endif /* __DT_BINDINGS_RESET_BCM6362_H */
--
2.26.2
BCM6328 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
---
v3: add reset controller definitions header file.
v2: no changes.
arch/mips/boot/dts/brcm/bcm6328.dtsi | 6 ++++++
include/dt-bindings/reset/bcm6328-reset.h | 18 ++++++++++++++++++
2 files changed, 24 insertions(+)
create mode 100644 include/dt-bindings/reset/bcm6328-reset.h
diff --git a/arch/mips/boot/dts/brcm/bcm6328.dtsi b/arch/mips/boot/dts/brcm/bcm6328.dtsi
index af860d06def6..590118cf5c12 100644
--- a/arch/mips/boot/dts/brcm/bcm6328.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6328.dtsi
@@ -57,6 +57,12 @@ clkctl: clock-controller@10000004 {
#clock-cells = <1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x10>,
diff --git a/include/dt-bindings/reset/bcm6328-reset.h b/include/dt-bindings/reset/bcm6328-reset.h
new file mode 100644
index 000000000000..0f3df87d47af
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6328-reset.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6328_H
+#define __DT_BINDINGS_RESET_BCM6328_H
+
+#define BCM6328_RST_SPI 0
+#define BCM6328_RST_EPHY 1
+#define BCM6328_RST_SAR 2
+#define BCM6328_RST_ENETSW 3
+#define BCM6328_RST_USBS 4
+#define BCM6328_RST_USBH 5
+#define BCM6328_RST_PCM 6
+#define BCM6328_RST_PCIE_CORE 7
+#define BCM6328_RST_PCIE 8
+#define BCM6328_RST_PCIE_EXT 9
+#define BCM6328_RST_PCIE_HARD 10
+
+#endif /* __DT_BINDINGS_RESET_BCM6328_H */
--
2.26.2
This allows to add reset controllers support.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
---
v3: no changes
v2: no changes
arch/mips/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 9dc08ee3d6b9..e82586e7719c 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -229,6 +229,7 @@ config ATH79
config BMIPS_GENERIC
bool "Broadcom Generic BMIPS kernel"
+ select ARCH_HAS_RESET_CONTROLLER
select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
select ARCH_HAS_PHYS_TO_DMA
select BOOT_RAW
--
2.26.2
BCM6368 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
---
v3: add reset controller definitions header file.
v2: no changes.
arch/mips/boot/dts/brcm/bcm6368.dtsi | 6 ++++++
include/dt-bindings/reset/bcm6368-reset.h | 16 ++++++++++++++++
2 files changed, 22 insertions(+)
create mode 100644 include/dt-bindings/reset/bcm6368-reset.h
diff --git a/arch/mips/boot/dts/brcm/bcm6368.dtsi b/arch/mips/boot/dts/brcm/bcm6368.dtsi
index 449c167dd892..52c19f40b9cc 100644
--- a/arch/mips/boot/dts/brcm/bcm6368.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6368.dtsi
@@ -70,6 +70,12 @@ reboot: syscon-reboot@10000008 {
mask = <0x1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x10>,
diff --git a/include/dt-bindings/reset/bcm6368-reset.h b/include/dt-bindings/reset/bcm6368-reset.h
new file mode 100644
index 000000000000..c81d8eb6d173
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6368-reset.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6368_H
+#define __DT_BINDINGS_RESET_BCM6368_H
+
+#define BCM6368_RST_SPI 0
+#define BCM6368_RST_MPI 3
+#define BCM6368_RST_IPSEC 4
+#define BCM6368_RST_EPHY 6
+#define BCM6368_RST_SAR 7
+#define BCM6368_RST_SWITCH 10
+#define BCM6368_RST_USBD 11
+#define BCM6368_RST_USBH 12
+#define BCM6368_RST_PCM 13
+
+#endif /* __DT_BINDINGS_RESET_BCM6368_H */
--
2.26.2
On Wed, 10 Jun 2020 19:28:52 +0200, ?lvaro Fern?ndez Rojas wrote:
> Add device tree binding documentation for BCM6345 reset controller.
>
> Signed-off-by: ?lvaro Fern?ndez Rojas <[email protected]>
> Reviewed-by: Florian Fainelli <[email protected]>
> ---
> .../bindings/reset/brcm,bcm6345-reset.yaml | 37 +++++++++++++++++++
> 1 file changed, 37 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
>
My bot found errors running 'make dt_binding_check' on your patch:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.example.dt.yaml: reset-controller@10000010: reg: [[268435472, 4]] is too short
See https://patchwork.ozlabs.org/patch/1307115
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:
pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
Please check and re-submit.
On 6/12/2020 2:57 PM, Rob Herring wrote:
> On Wed, 10 Jun 2020 19:28:52 +0200, Álvaro Fernández Rojas wrote:
>> Add device tree binding documentation for BCM6345 reset controller.
>>
>> Signed-off-by: Álvaro Fernández Rojas <[email protected]>
>> Reviewed-by: Florian Fainelli <[email protected]>
>> ---
>> .../bindings/reset/brcm,bcm6345-reset.yaml | 37 +++++++++++++++++++
>> 1 file changed, 37 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
>>
>
>
> My bot found errors running 'make dt_binding_check' on your patch:
>
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.example.dt.yaml: reset-controller@10000010: reg: [[268435472, 4]] is too short
maxItems for the reg property should be 1 here.
--
Florian
BCM63xx SoCs have a reset controller for certain components.
v4: Fix device tree bindings documentation.
v3: using reset-simple isn't possible since sleeping after performing the
reset is also needed.
Add BCM63268 and BCM6318 support.
v2: add compatibility to reset-simple instead of adding a new driver.
Álvaro Fernández Rojas (9):
mips: bmips: select ARCH_HAS_RESET_CONTROLLER
dt-bindings: reset: add BCM6345 reset controller bindings
reset: add BCM6345 reset controller driver
mips: bmips: dts: add BCM6328 reset controller support
mips: bmips: dts: add BCM6358 reset controller support
mips: bmips: dts: add BCM6362 reset controller support
mips: bmips: dts: add BCM6368 reset controller support
mips: bmips: dts: add BCM63268 reset controller support
mips: bmips: add BCM6318 reset controller definitions
.../bindings/reset/brcm,bcm6345-reset.yaml | 37 +++++
arch/mips/Kconfig | 1 +
arch/mips/boot/dts/brcm/bcm63268.dtsi | 6 +
arch/mips/boot/dts/brcm/bcm6328.dtsi | 6 +
arch/mips/boot/dts/brcm/bcm6358.dtsi | 6 +
arch/mips/boot/dts/brcm/bcm6362.dtsi | 6 +
arch/mips/boot/dts/brcm/bcm6368.dtsi | 6 +
drivers/reset/Kconfig | 7 +
drivers/reset/Makefile | 1 +
drivers/reset/reset-bcm6345.c | 135 ++++++++++++++++++
include/dt-bindings/reset/bcm6318-reset.h | 20 +++
include/dt-bindings/reset/bcm63268-reset.h | 26 ++++
include/dt-bindings/reset/bcm6328-reset.h | 18 +++
include/dt-bindings/reset/bcm6358-reset.h | 15 ++
include/dt-bindings/reset/bcm6362-reset.h | 22 +++
include/dt-bindings/reset/bcm6368-reset.h | 16 +++
16 files changed, 328 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
create mode 100644 drivers/reset/reset-bcm6345.c
create mode 100644 include/dt-bindings/reset/bcm6318-reset.h
create mode 100644 include/dt-bindings/reset/bcm63268-reset.h
create mode 100644 include/dt-bindings/reset/bcm6328-reset.h
create mode 100644 include/dt-bindings/reset/bcm6358-reset.h
create mode 100644 include/dt-bindings/reset/bcm6362-reset.h
create mode 100644 include/dt-bindings/reset/bcm6368-reset.h
--
2.27.0
BCM6328 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
---
v4: no changes.
v3: add reset controller definitions header file.
v2: no changes.
arch/mips/boot/dts/brcm/bcm6328.dtsi | 6 ++++++
include/dt-bindings/reset/bcm6328-reset.h | 18 ++++++++++++++++++
2 files changed, 24 insertions(+)
create mode 100644 include/dt-bindings/reset/bcm6328-reset.h
diff --git a/arch/mips/boot/dts/brcm/bcm6328.dtsi b/arch/mips/boot/dts/brcm/bcm6328.dtsi
index af860d06def6..590118cf5c12 100644
--- a/arch/mips/boot/dts/brcm/bcm6328.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6328.dtsi
@@ -57,6 +57,12 @@ clkctl: clock-controller@10000004 {
#clock-cells = <1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x10>,
diff --git a/include/dt-bindings/reset/bcm6328-reset.h b/include/dt-bindings/reset/bcm6328-reset.h
new file mode 100644
index 000000000000..0f3df87d47af
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6328-reset.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6328_H
+#define __DT_BINDINGS_RESET_BCM6328_H
+
+#define BCM6328_RST_SPI 0
+#define BCM6328_RST_EPHY 1
+#define BCM6328_RST_SAR 2
+#define BCM6328_RST_ENETSW 3
+#define BCM6328_RST_USBS 4
+#define BCM6328_RST_USBH 5
+#define BCM6328_RST_PCM 6
+#define BCM6328_RST_PCIE_CORE 7
+#define BCM6328_RST_PCIE 8
+#define BCM6328_RST_PCIE_EXT 9
+#define BCM6328_RST_PCIE_HARD 10
+
+#endif /* __DT_BINDINGS_RESET_BCM6328_H */
--
2.27.0
Add support for resetting blocks through the Linux reset controller
subsystem for BCM63xx SoCs.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
v4: no changes.
v3: using reset-simple isn't possible since sleeping after performing the
reset is also needed.
v2: add compatibility to reset-simple instead of adding a new driver.
drivers/reset/Kconfig | 7 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-bcm6345.c | 135 ++++++++++++++++++++++++++++++++++
3 files changed, 143 insertions(+)
create mode 100644 drivers/reset/reset-bcm6345.c
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index d9efbfd29646..9f1da978cef6 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -41,6 +41,13 @@ config RESET_BERLIN
help
This enables the reset controller driver for Marvell Berlin SoCs.
+config RESET_BCM6345
+ bool "BCM6345 Reset Controller"
+ depends on BMIPS_GENERIC || COMPILE_TEST
+ default BMIPS_GENERIC
+ help
+ This enables the reset controller driver for BCM6345 SoCs.
+
config RESET_BRCMSTB
tristate "Broadcom STB reset controller"
depends on ARCH_BRCMSTB || COMPILE_TEST
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 249ed357c997..e642aae42f0f 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/
obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o
+obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o
obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
diff --git a/drivers/reset/reset-bcm6345.c b/drivers/reset/reset-bcm6345.c
new file mode 100644
index 000000000000..6c9238762ee5
--- /dev/null
+++ b/drivers/reset/reset-bcm6345.c
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * BCM6345 Reset Controller Driver
+ *
+ * Copyright (C) 2020 Álvaro Fernández Rojas <[email protected]>
+ */
+
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/mod_devicetable.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+
+#define BCM6345_RESET_NUM 32
+#define BCM6345_RESET_SLEEP_MIN_US 10000
+#define BCM6345_RESET_SLEEP_MAX_US 20000
+
+struct bcm6345_reset {
+ struct reset_controller_dev rcdev;
+ void __iomem *base;
+ spinlock_t lock;
+};
+
+static void bcm6345_reset_update(struct reset_controller_dev *rcdev,
+ unsigned long id, bool assert)
+{
+ struct bcm6345_reset *bcm6345_reset =
+ container_of(rcdev, struct bcm6345_reset, rcdev);
+ unsigned long flags;
+ uint32_t val;
+
+ spin_lock_irqsave(&bcm6345_reset->lock, flags);
+ val = __raw_readl(bcm6345_reset->base);
+ if (assert)
+ val &= ~BIT(id);
+ else
+ val |= BIT(id);
+ __raw_writel(val, bcm6345_reset->base);
+ spin_unlock_irqrestore(&bcm6345_reset->lock, flags);
+}
+
+static int bcm6345_reset_assert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ bcm6345_reset_update(rcdev, id, true);
+
+ return 0;
+}
+
+static int bcm6345_reset_deassert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ bcm6345_reset_update(rcdev, id, false);
+
+ return 0;
+}
+
+static int bcm6345_reset_reset(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ bcm6345_reset_update(rcdev, id, true);
+ usleep_range(BCM6345_RESET_SLEEP_MIN_US,
+ BCM6345_RESET_SLEEP_MAX_US);
+
+ bcm6345_reset_update(rcdev, id, false);
+ usleep_range(BCM6345_RESET_SLEEP_MIN_US,
+ BCM6345_RESET_SLEEP_MAX_US);
+
+ return 0;
+}
+
+static int bcm6345_reset_status(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ struct bcm6345_reset *bcm6345_reset =
+ container_of(rcdev, struct bcm6345_reset, rcdev);
+
+ return !(__raw_readl(bcm6345_reset->base) & BIT(id));
+}
+
+static struct reset_control_ops bcm6345_reset_ops = {
+ .assert = bcm6345_reset_assert,
+ .deassert = bcm6345_reset_deassert,
+ .reset = bcm6345_reset_reset,
+ .status = bcm6345_reset_status,
+};
+
+static int __init bcm6345_reset_probe(struct platform_device *pdev)
+{
+ struct bcm6345_reset *bcm6345_reset;
+ struct resource *res;
+ int err;
+
+ bcm6345_reset = devm_kzalloc(&pdev->dev,
+ sizeof(*bcm6345_reset), GFP_KERNEL);
+ if (!bcm6345_reset)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, bcm6345_reset);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ bcm6345_reset->base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(bcm6345_reset->base))
+ return PTR_ERR(bcm6345_reset->base);
+
+ spin_lock_init(&bcm6345_reset->lock);
+ bcm6345_reset->rcdev.ops = &bcm6345_reset_ops;
+ bcm6345_reset->rcdev.owner = THIS_MODULE;
+ bcm6345_reset->rcdev.of_node = pdev->dev.of_node;
+ bcm6345_reset->rcdev.of_reset_n_cells = 1;
+ bcm6345_reset->rcdev.nr_resets = BCM6345_RESET_NUM;
+
+ err = devm_reset_controller_register(&pdev->dev,
+ &bcm6345_reset->rcdev);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+static const struct of_device_id bcm6345_reset_of_match[] = {
+ { .compatible = "brcm,bcm6345-reset" },
+ { },
+};
+
+static struct platform_driver bcm6345_reset_driver = {
+ .probe = bcm6345_reset_probe,
+ .driver = {
+ .name = "bcm6345-reset",
+ .of_match_table = bcm6345_reset_of_match,
+ .suppress_bind_attrs = true,
+ },
+};
+builtin_platform_driver(bcm6345_reset_driver);
--
2.27.0
Hi "?lvaro,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on pza/reset/next]
[also build test WARNING on robh/for-next v5.7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/lvaro-Fern-ndez-Rojas/bmips-add-bcm6345-reset-controller-support/20200613-164237
base: https://git.pengutronix.de/git/pza/linux reset/next
config: x86_64-allyesconfig (attached as .config)
compiler: clang version 11.0.0 (https://github.com/llvm/llvm-project d7e6f116f4517952fbdf5ad4b5ff67e378600c60)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <[email protected]>
All warnings (new ones prefixed by >>, old ones prefixed by <<):
>> WARNING: modpost: vmlinux.o(.data+0x1b0c020): Section mismatch in reference from the variable bcm6345_reset_driver to the function .init.text:bcm6345_reset_probe()
The variable bcm6345_reset_driver references
the function __init bcm6345_reset_probe()
If the reference is valid then annotate the
variable with or __refdata (see linux/init.h) or name the variable:
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/[email protected]
On 6/13/2020 1:38 AM, Álvaro Fernández Rojas wrote:
> Add support for resetting blocks through the Linux reset controller
> subsystem for BCM63xx SoCs.
>
> Signed-off-by: Álvaro Fernández Rojas <[email protected]>
With the kbuild robot error fixed:
Reviewed-by: Florian Fainelli <[email protected]>
Thanks!
--
Florian
BCM63xx SoCs have a reset controller for certain components.
v5: fix kbuild robot error (drop __init).
v4: fix device tree bindings documentation.
v3: using reset-simple isn't possible since sleeping after performing the
reset is also needed.
Add BCM63268 and BCM6318 support.
v2: add compatibility to reset-simple instead of adding a new driver.
Álvaro Fernández Rojas (9):
mips: bmips: select ARCH_HAS_RESET_CONTROLLER
dt-bindings: reset: add BCM6345 reset controller bindings
reset: add BCM6345 reset controller driver
mips: bmips: dts: add BCM6328 reset controller support
mips: bmips: dts: add BCM6358 reset controller support
mips: bmips: dts: add BCM6362 reset controller support
mips: bmips: dts: add BCM6368 reset controller support
mips: bmips: dts: add BCM63268 reset controller support
mips: bmips: add BCM6318 reset controller definitions
.../bindings/reset/brcm,bcm6345-reset.yaml | 37 +++++
arch/mips/Kconfig | 1 +
arch/mips/boot/dts/brcm/bcm63268.dtsi | 6 +
arch/mips/boot/dts/brcm/bcm6328.dtsi | 6 +
arch/mips/boot/dts/brcm/bcm6358.dtsi | 6 +
arch/mips/boot/dts/brcm/bcm6362.dtsi | 6 +
arch/mips/boot/dts/brcm/bcm6368.dtsi | 6 +
drivers/reset/Kconfig | 7 +
drivers/reset/Makefile | 1 +
drivers/reset/reset-bcm6345.c | 135 ++++++++++++++++++
include/dt-bindings/reset/bcm6318-reset.h | 20 +++
include/dt-bindings/reset/bcm63268-reset.h | 26 ++++
include/dt-bindings/reset/bcm6328-reset.h | 18 +++
include/dt-bindings/reset/bcm6358-reset.h | 15 ++
include/dt-bindings/reset/bcm6362-reset.h | 22 +++
include/dt-bindings/reset/bcm6368-reset.h | 16 +++
16 files changed, 328 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
create mode 100644 drivers/reset/reset-bcm6345.c
create mode 100644 include/dt-bindings/reset/bcm6318-reset.h
create mode 100644 include/dt-bindings/reset/bcm63268-reset.h
create mode 100644 include/dt-bindings/reset/bcm6328-reset.h
create mode 100644 include/dt-bindings/reset/bcm6358-reset.h
create mode 100644 include/dt-bindings/reset/bcm6362-reset.h
create mode 100644 include/dt-bindings/reset/bcm6368-reset.h
--
2.27.0
BCM6358 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
---
v5: no changes.
v4: no changes.
v3: add reset controller definitions header file.
v2: no changes.
arch/mips/boot/dts/brcm/bcm6358.dtsi | 6 ++++++
include/dt-bindings/reset/bcm6358-reset.h | 15 +++++++++++++++
2 files changed, 21 insertions(+)
create mode 100644 include/dt-bindings/reset/bcm6358-reset.h
diff --git a/arch/mips/boot/dts/brcm/bcm6358.dtsi b/arch/mips/boot/dts/brcm/bcm6358.dtsi
index f21176cac038..9d93e7f5e6fc 100644
--- a/arch/mips/boot/dts/brcm/bcm6358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6358.dtsi
@@ -82,6 +82,12 @@ periph_intc: interrupt-controller@fffe000c {
interrupts = <2>, <3>;
};
+ periph_rst: reset-controller@fffe0034 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0xfffe0034 0x4>;
+ #reset-cells = <1>;
+ };
+
leds0: led-controller@fffe00d0 {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/include/dt-bindings/reset/bcm6358-reset.h b/include/dt-bindings/reset/bcm6358-reset.h
new file mode 100644
index 000000000000..bda62ef84f5a
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6358-reset.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6358_H
+#define __DT_BINDINGS_RESET_BCM6358_H
+
+#define BCM6358_RST_SPI 0
+#define BCM6358_RST_ENET 2
+#define BCM6358_RST_MPI 3
+#define BCM6358_RST_EPHY 6
+#define BCM6358_RST_SAR 7
+#define BCM6358_RST_USBH 12
+#define BCM6358_RST_PCM 13
+#define BCM6358_RST_ADSL 14
+
+#endif /* __DT_BINDINGS_RESET_BCM6358_H */
--
2.27.0
BCM63268 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
---
v5: no changes.
v4: no changes.
v3: add new path with BCM63268 reset controller support.
arch/mips/boot/dts/brcm/bcm63268.dtsi | 6 +++++
include/dt-bindings/reset/bcm63268-reset.h | 26 ++++++++++++++++++++++
2 files changed, 32 insertions(+)
create mode 100644 include/dt-bindings/reset/bcm63268-reset.h
diff --git a/arch/mips/boot/dts/brcm/bcm63268.dtsi b/arch/mips/boot/dts/brcm/bcm63268.dtsi
index beec24145af7..0150da7e3905 100644
--- a/arch/mips/boot/dts/brcm/bcm63268.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm63268.dtsi
@@ -70,6 +70,12 @@ reboot: syscon-reboot@10000008 {
mask = <0x1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x20>,
diff --git a/include/dt-bindings/reset/bcm63268-reset.h b/include/dt-bindings/reset/bcm63268-reset.h
new file mode 100644
index 000000000000..6a6403a4c2d5
--- /dev/null
+++ b/include/dt-bindings/reset/bcm63268-reset.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM63268_H
+#define __DT_BINDINGS_RESET_BCM63268_H
+
+#define BCM63268_RST_SPI 0
+#define BCM63268_RST_IPSEC 1
+#define BCM63268_RST_EPHY 2
+#define BCM63268_RST_SAR 3
+#define BCM63268_RST_ENETSW 4
+#define BCM63268_RST_USBS 5
+#define BCM63268_RST_USBH 6
+#define BCM63268_RST_PCM 7
+#define BCM63268_RST_PCIE_CORE 8
+#define BCM63268_RST_PCIE 9
+#define BCM63268_RST_PCIE_EXT 10
+#define BCM63268_RST_WLAN_SHIM 11
+#define BCM63268_RST_DDR_PHY 12
+#define BCM63268_RST_FAP0 13
+#define BCM63268_RST_WLAN_UBUS 14
+#define BCM63268_RST_DECT 15
+#define BCM63268_RST_FAP1 16
+#define BCM63268_RST_PCIE_HARD 17
+#define BCM63268_RST_GPHY 18
+
+#endif /* __DT_BINDINGS_RESET_BCM63268_H */
--
2.27.0
BCM6318 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
---
v5: no changes.
v4: no changes.
v3: add new path with BCM6318 reset controller definitions.
include/dt-bindings/reset/bcm6318-reset.h | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
create mode 100644 include/dt-bindings/reset/bcm6318-reset.h
diff --git a/include/dt-bindings/reset/bcm6318-reset.h b/include/dt-bindings/reset/bcm6318-reset.h
new file mode 100644
index 000000000000..f4fef7bfb06d
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6318-reset.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6318_H
+#define __DT_BINDINGS_RESET_BCM6318_H
+
+#define BCM6318_RST_SPI 0
+#define BCM6318_RST_EPHY 1
+#define BCM6318_RST_SAR 2
+#define BCM6318_RST_ENETSW 3
+#define BCM6318_RST_USBD 4
+#define BCM6318_RST_USBH 5
+#define BCM6318_RST_PCIE_CORE 6
+#define BCM6318_RST_PCIE 7
+#define BCM6318_RST_PCIE_EXT 8
+#define BCM6318_RST_PCIE_HARD 9
+#define BCM6318_RST_ADSL 10
+#define BCM6318_RST_PHYMIPS 11
+#define BCM6318_RST_HOSTMIPS 11
+
+#endif /* __DT_BINDINGS_RESET_BCM6318_H */
--
2.27.0
BCM6368 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
---
v5: no changes.
v4: no changes.
v3: add reset controller definitions header file.
v2: no changes.
arch/mips/boot/dts/brcm/bcm6368.dtsi | 6 ++++++
include/dt-bindings/reset/bcm6368-reset.h | 16 ++++++++++++++++
2 files changed, 22 insertions(+)
create mode 100644 include/dt-bindings/reset/bcm6368-reset.h
diff --git a/arch/mips/boot/dts/brcm/bcm6368.dtsi b/arch/mips/boot/dts/brcm/bcm6368.dtsi
index 449c167dd892..52c19f40b9cc 100644
--- a/arch/mips/boot/dts/brcm/bcm6368.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6368.dtsi
@@ -70,6 +70,12 @@ reboot: syscon-reboot@10000008 {
mask = <0x1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x10>,
diff --git a/include/dt-bindings/reset/bcm6368-reset.h b/include/dt-bindings/reset/bcm6368-reset.h
new file mode 100644
index 000000000000..c81d8eb6d173
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6368-reset.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6368_H
+#define __DT_BINDINGS_RESET_BCM6368_H
+
+#define BCM6368_RST_SPI 0
+#define BCM6368_RST_MPI 3
+#define BCM6368_RST_IPSEC 4
+#define BCM6368_RST_EPHY 6
+#define BCM6368_RST_SAR 7
+#define BCM6368_RST_SWITCH 10
+#define BCM6368_RST_USBD 11
+#define BCM6368_RST_USBH 12
+#define BCM6368_RST_PCM 13
+
+#endif /* __DT_BINDINGS_RESET_BCM6368_H */
--
2.27.0
BCM6362 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
---
v5: no changes.
v4: no changes.
v3: add reset controller definitions header file.
v2: no changes.
arch/mips/boot/dts/brcm/bcm6362.dtsi | 6 ++++++
include/dt-bindings/reset/bcm6362-reset.h | 22 ++++++++++++++++++++++
2 files changed, 28 insertions(+)
create mode 100644 include/dt-bindings/reset/bcm6362-reset.h
diff --git a/arch/mips/boot/dts/brcm/bcm6362.dtsi b/arch/mips/boot/dts/brcm/bcm6362.dtsi
index 8ae6981735b8..443af6b4c838 100644
--- a/arch/mips/boot/dts/brcm/bcm6362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6362.dtsi
@@ -70,6 +70,12 @@ reboot: syscon-reboot@10000008 {
mask = <0x1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x10>,
diff --git a/include/dt-bindings/reset/bcm6362-reset.h b/include/dt-bindings/reset/bcm6362-reset.h
new file mode 100644
index 000000000000..7ebb0546e0ab
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6362-reset.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6362_H
+#define __DT_BINDINGS_RESET_BCM6362_H
+
+#define BCM6362_RST_SPI 0
+#define BCM6362_RST_IPSEC 1
+#define BCM6362_RST_EPHY 2
+#define BCM6362_RST_SAR 3
+#define BCM6362_RST_ENETSW 4
+#define BCM6362_RST_USBD 5
+#define BCM6362_RST_USBH 6
+#define BCM6362_RST_PCM 7
+#define BCM6362_RST_PCIE_CORE 8
+#define BCM6362_RST_PCIE 9
+#define BCM6362_RST_PCIE_EXT 10
+#define BCM6362_RST_WLAN_SHIM 11
+#define BCM6362_RST_DDR_PHY 12
+#define BCM6362_RST_FAP 13
+#define BCM6362_RST_WLAN_UBUS 14
+
+#endif /* __DT_BINDINGS_RESET_BCM6362_H */
--
2.27.0
Add support for resetting blocks through the Linux reset controller
subsystem for BCM63xx SoCs.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
---
v5: fix kbuild robot error (drop __init).
v4: no changes.
v3: using reset-simple isn't possible since sleeping after performing the
reset is also needed.
v2: add compatibility to reset-simple instead of adding a new driver.
drivers/reset/Kconfig | 7 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-bcm6345.c | 135 ++++++++++++++++++++++++++++++++++
3 files changed, 143 insertions(+)
create mode 100644 drivers/reset/reset-bcm6345.c
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index d9efbfd29646..9f1da978cef6 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -41,6 +41,13 @@ config RESET_BERLIN
help
This enables the reset controller driver for Marvell Berlin SoCs.
+config RESET_BCM6345
+ bool "BCM6345 Reset Controller"
+ depends on BMIPS_GENERIC || COMPILE_TEST
+ default BMIPS_GENERIC
+ help
+ This enables the reset controller driver for BCM6345 SoCs.
+
config RESET_BRCMSTB
tristate "Broadcom STB reset controller"
depends on ARCH_BRCMSTB || COMPILE_TEST
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 249ed357c997..e642aae42f0f 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/
obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o
+obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o
obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
diff --git a/drivers/reset/reset-bcm6345.c b/drivers/reset/reset-bcm6345.c
new file mode 100644
index 000000000000..e1acb8d9f661
--- /dev/null
+++ b/drivers/reset/reset-bcm6345.c
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * BCM6345 Reset Controller Driver
+ *
+ * Copyright (C) 2020 Álvaro Fernández Rojas <[email protected]>
+ */
+
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/mod_devicetable.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+
+#define BCM6345_RESET_NUM 32
+#define BCM6345_RESET_SLEEP_MIN_US 10000
+#define BCM6345_RESET_SLEEP_MAX_US 20000
+
+struct bcm6345_reset {
+ struct reset_controller_dev rcdev;
+ void __iomem *base;
+ spinlock_t lock;
+};
+
+static void bcm6345_reset_update(struct reset_controller_dev *rcdev,
+ unsigned long id, bool assert)
+{
+ struct bcm6345_reset *bcm6345_reset =
+ container_of(rcdev, struct bcm6345_reset, rcdev);
+ unsigned long flags;
+ uint32_t val;
+
+ spin_lock_irqsave(&bcm6345_reset->lock, flags);
+ val = __raw_readl(bcm6345_reset->base);
+ if (assert)
+ val &= ~BIT(id);
+ else
+ val |= BIT(id);
+ __raw_writel(val, bcm6345_reset->base);
+ spin_unlock_irqrestore(&bcm6345_reset->lock, flags);
+}
+
+static int bcm6345_reset_assert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ bcm6345_reset_update(rcdev, id, true);
+
+ return 0;
+}
+
+static int bcm6345_reset_deassert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ bcm6345_reset_update(rcdev, id, false);
+
+ return 0;
+}
+
+static int bcm6345_reset_reset(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ bcm6345_reset_update(rcdev, id, true);
+ usleep_range(BCM6345_RESET_SLEEP_MIN_US,
+ BCM6345_RESET_SLEEP_MAX_US);
+
+ bcm6345_reset_update(rcdev, id, false);
+ usleep_range(BCM6345_RESET_SLEEP_MIN_US,
+ BCM6345_RESET_SLEEP_MAX_US);
+
+ return 0;
+}
+
+static int bcm6345_reset_status(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ struct bcm6345_reset *bcm6345_reset =
+ container_of(rcdev, struct bcm6345_reset, rcdev);
+
+ return !(__raw_readl(bcm6345_reset->base) & BIT(id));
+}
+
+static struct reset_control_ops bcm6345_reset_ops = {
+ .assert = bcm6345_reset_assert,
+ .deassert = bcm6345_reset_deassert,
+ .reset = bcm6345_reset_reset,
+ .status = bcm6345_reset_status,
+};
+
+static int bcm6345_reset_probe(struct platform_device *pdev)
+{
+ struct bcm6345_reset *bcm6345_reset;
+ struct resource *res;
+ int err;
+
+ bcm6345_reset = devm_kzalloc(&pdev->dev,
+ sizeof(*bcm6345_reset), GFP_KERNEL);
+ if (!bcm6345_reset)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, bcm6345_reset);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ bcm6345_reset->base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(bcm6345_reset->base))
+ return PTR_ERR(bcm6345_reset->base);
+
+ spin_lock_init(&bcm6345_reset->lock);
+ bcm6345_reset->rcdev.ops = &bcm6345_reset_ops;
+ bcm6345_reset->rcdev.owner = THIS_MODULE;
+ bcm6345_reset->rcdev.of_node = pdev->dev.of_node;
+ bcm6345_reset->rcdev.of_reset_n_cells = 1;
+ bcm6345_reset->rcdev.nr_resets = BCM6345_RESET_NUM;
+
+ err = devm_reset_controller_register(&pdev->dev,
+ &bcm6345_reset->rcdev);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+static const struct of_device_id bcm6345_reset_of_match[] = {
+ { .compatible = "brcm,bcm6345-reset" },
+ { },
+};
+
+static struct platform_driver bcm6345_reset_driver = {
+ .probe = bcm6345_reset_probe,
+ .driver = {
+ .name = "bcm6345-reset",
+ .of_match_table = bcm6345_reset_of_match,
+ .suppress_bind_attrs = true,
+ },
+};
+builtin_platform_driver(bcm6345_reset_driver);
--
2.27.0
This allows to add reset controllers support.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
---
v5: no changes
v4: no changes
v3: no changes
v2: no changes
arch/mips/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 6fee1a133e9d..b1840119cb64 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -227,6 +227,7 @@ config ATH79
config BMIPS_GENERIC
bool "Broadcom Generic BMIPS kernel"
+ select ARCH_HAS_RESET_CONTROLLER
select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
select ARCH_HAS_PHYS_TO_DMA
select BOOT_RAW
--
2.27.0
BCM6328 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
---
v5: no changes.
v4: no changes.
v3: add reset controller definitions header file.
v2: no changes.
arch/mips/boot/dts/brcm/bcm6328.dtsi | 6 ++++++
include/dt-bindings/reset/bcm6328-reset.h | 18 ++++++++++++++++++
2 files changed, 24 insertions(+)
create mode 100644 include/dt-bindings/reset/bcm6328-reset.h
diff --git a/arch/mips/boot/dts/brcm/bcm6328.dtsi b/arch/mips/boot/dts/brcm/bcm6328.dtsi
index af860d06def6..590118cf5c12 100644
--- a/arch/mips/boot/dts/brcm/bcm6328.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6328.dtsi
@@ -57,6 +57,12 @@ clkctl: clock-controller@10000004 {
#clock-cells = <1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x10>,
diff --git a/include/dt-bindings/reset/bcm6328-reset.h b/include/dt-bindings/reset/bcm6328-reset.h
new file mode 100644
index 000000000000..0f3df87d47af
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6328-reset.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6328_H
+#define __DT_BINDINGS_RESET_BCM6328_H
+
+#define BCM6328_RST_SPI 0
+#define BCM6328_RST_EPHY 1
+#define BCM6328_RST_SAR 2
+#define BCM6328_RST_ENETSW 3
+#define BCM6328_RST_USBS 4
+#define BCM6328_RST_USBH 5
+#define BCM6328_RST_PCM 6
+#define BCM6328_RST_PCIE_CORE 7
+#define BCM6328_RST_PCIE 8
+#define BCM6328_RST_PCIE_EXT 9
+#define BCM6328_RST_PCIE_HARD 10
+
+#endif /* __DT_BINDINGS_RESET_BCM6328_H */
--
2.27.0
Add device tree binding documentation for BCM6345 reset controller.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
---
v5: no changes
v4: change license and fix maxItems.
v3: no changes
v2: no changes
.../bindings/reset/brcm,bcm6345-reset.yaml | 37 +++++++++++++++++++
1 file changed, 37 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
diff --git a/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml b/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
new file mode 100644
index 000000000000..560cf6522cb8
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/reset/brcm,bcm6345-reset.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: BCM6345 reset controller
+
+description: This document describes the BCM6345 reset controller.
+
+maintainers:
+ - Álvaro Fernández Rojas <[email protected]>
+
+properties:
+ compatible:
+ const: brcm,bcm6345-reset
+
+ reg:
+ maxItems: 1
+
+ "#reset-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - "#reset-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
--
2.27.0