2020-07-02 15:52:28

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 1/8] dt-bindings: pwm: samsung: Do not require interrupts on Exynos SoCs

The bindings required interrupts for all SoCs but actually only the PWM
timer clocksource (for S3C/S5P SoCs) was using them. This PWM timer
clocksource driver is not used on Exynos SoCs thus the interrupts can be
marked as optional.

Reported-by: Alim Akhtar <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Changes since v1:
1. New patch
---
.../devicetree/bindings/pwm/pwm-samsung.yaml | 23 +++++++++++++++----
1 file changed, 18 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
index fc799b0577d4..188679cb8b8c 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
+++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
@@ -18,9 +18,6 @@ description: |+

Be aware that the clocksource driver supports only uniprocessor systems.

-allOf:
- - $ref: pwm.yaml#
-
properties:
compatible:
enum:
@@ -63,7 +60,8 @@ properties:

interrupts:
description:
- One interrupt per timer, starting at timer 0.
+ One interrupt per timer, starting at timer 0. Necessary only for SoCs which
+ use PWM clocksource.
minItems: 1
maxItems: 5

@@ -88,12 +86,27 @@ required:
- clocks
- clock-names
- compatible
- - interrupts
- "#pwm-cells"
- reg

additionalProperties: false

+allOf:
+ - $ref: pwm.yaml#
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - samsung,s3c2410-pwm
+ - samsung,s3c6400-pwm
+ - samsung,s5p6440-pwm
+ - samsung,s5pc100-pwm
+ then:
+ required:
+ - interrupts
+
examples:
- |
pwm@7f006000 {
--
2.17.1


2020-07-02 15:52:41

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 2/8] arm64: dts: exynos: Describe PWM interrupts on Exynos7

Add interrupts property to PWM node on Exynos7 to describe the hardware
fully. No functional change as the interrupts are not used by drivers.

Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Changes since v1:
1. Correct the interrupts, change message.

Not tested
---
arch/arm64/boot/dts/exynos/exynos7.dtsi | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index f590891efe25..709742b98c9c 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -581,6 +581,11 @@
pwm: pwm@136c0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x136c0000 0x100>;
+ interrupts = <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>;
samsung,pwm-outputs = <0>, <1>, <2>, <3>;
#pwm-cells = <3>;
clocks = <&clock_peric0 PCLK_PWM>;
--
2.17.1

2020-07-02 15:52:47

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 3/8] arm64: dts: exynos: Remove generic arm,armv8-pmuv3 compatible

The ARM PMU node is described enough with first compatible so remove the
arm,armv8-pmuv3 to fix dtschema warnings like:

arm-pmu: compatible: Additional items are not allowed ('arm,armv8-pmuv3' was unexpected)
arm-pmu: compatible: ['arm,cortex-a57-pmu', 'arm,armv8-pmuv3'] is too long

Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Changes since v1:
1. None

Not tested although no effect expected.
---
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 4 ++--
arch/arm64/boot/dts/exynos/exynos7.dtsi | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index ebe089469b5f..57b433a1c900 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -24,7 +24,7 @@
interrupt-parent = <&gic>;

arm_a53_pmu {
- compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3";
+ compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
@@ -33,7 +33,7 @@
};

arm_a57_pmu {
- compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3";
+ compatible = "arm,cortex-a57-pmu";
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index 709742b98c9c..c0b63b0d39ab 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -29,7 +29,7 @@
};

arm-pmu {
- compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3";
+ compatible = "arm,cortex-a57-pmu";
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
--
2.17.1

2020-07-02 15:52:54

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 4/8] arm64: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings

There is no need to keep DMA controller nodes under AMBA bus node.
Remove the "amba" node to fix dtschema warnings like:

amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Changes since v1:
1. Remove the bus, as suggested by Marek
---
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 47 +++++++++-------------
arch/arm64/boot/dts/exynos/exynos7.dtsi | 47 +++++++++-------------
2 files changed, 40 insertions(+), 54 deletions(-)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 57b433a1c900..74ac4ac75865 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -1756,33 +1756,26 @@
status = "disabled";
};

- amba {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- pdma0: pdma@15610000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x15610000 0x1000>;
- interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cmu_fsys CLK_PDMA0>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
- };
-
- pdma1: pdma@15600000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x15600000 0x1000>;
- interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cmu_fsys CLK_PDMA1>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
- };
+ pdma0: pdma@15610000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x15610000 0x1000>;
+ interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cmu_fsys CLK_PDMA0>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
+ };
+
+ pdma1: pdma@15600000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x15600000 0x1000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cmu_fsys CLK_PDMA1>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
};

audio-subsystem@11400000 {
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index c0b63b0d39ab..b9ed6a33e290 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -105,33 +105,26 @@
<0x11006000 0x2000>;
};

- amba {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- pdma0: pdma@10e10000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x10E10000 0x1000>;
- interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clock_fsys0 ACLK_PDMA0>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
- };
-
- pdma1: pdma@10eb0000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x10EB0000 0x1000>;
- interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clock_fsys0 ACLK_PDMA1>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
- };
+ pdma0: pdma@10e10000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x10E10000 0x1000>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_fsys0 ACLK_PDMA0>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
+ };
+
+ pdma1: pdma@10eb0000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x10EB0000 0x1000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_fsys0 ACLK_PDMA1>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
};

clock_topc: clock-controller@10570000 {
--
2.17.1

2020-07-02 15:53:03

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 5/8] ARM: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings

There is no need to keep DMA controller nodes under AMBA bus node.
Remove the "amba" node to fix dtschema warnings like:

amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Changes since v1:
1. Remove the bus, as suggested by Marek
---
arch/arm/boot/dts/exynos3250.dtsi | 47 +++----
arch/arm/boot/dts/exynos4.dtsi | 70 +++++-----
.../boot/dts/exynos4210-universal_c210.dts | 2 +-
arch/arm/boot/dts/exynos5250.dtsi | 92 ++++++-------
arch/arm/boot/dts/exynos5410.dtsi | 46 +++----
arch/arm/boot/dts/exynos5420.dtsi | 130 ++++++++----------
6 files changed, 174 insertions(+), 213 deletions(-)

diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 044e5da64a76..d3fb45a56527 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -418,33 +418,26 @@
status = "disabled";
};

- amba {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- pdma0: pdma@12680000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x12680000 0x1000>;
- interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cmu CLK_PDMA0>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
- };
-
- pdma1: pdma@12690000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x12690000 0x1000>;
- interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cmu CLK_PDMA1>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
- };
+ pdma0: pdma@12680000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x12680000 0x1000>;
+ interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cmu CLK_PDMA0>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
+ };
+
+ pdma1: pdma@12690000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x12690000 0x1000>;
+ interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cmu CLK_PDMA1>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
};

adc: adc@126c0000 {
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index d2779a790ce3..a1e54449f33f 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -669,45 +669,37 @@
status = "disabled";
};

- amba: amba {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- interrupt-parent = <&gic>;
- ranges;
-
- pdma0: pdma@12680000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x12680000 0x1000>;
- interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clock CLK_PDMA0>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
- };
-
- pdma1: pdma@12690000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x12690000 0x1000>;
- interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clock CLK_PDMA1>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
- };
-
- mdma1: mdma@12850000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x12850000 0x1000>;
- interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clock CLK_MDMA>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
- };
+ pdma0: pdma@12680000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x12680000 0x1000>;
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock CLK_PDMA0>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
+ };
+
+ pdma1: pdma@12690000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x12690000 0x1000>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock CLK_PDMA1>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
+ };
+
+ mdma1: mdma@12850000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x12850000 0x1000>;
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock CLK_MDMA>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <1>;
};

fimd: fimd@11c00000 {
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index 02fde1a75ebd..e07aa3aa93bd 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -181,7 +181,7 @@
};
};

-&amba {
+&soc {
mdma0: mdma@12840000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12840000 0x1000>;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index b6135af7ef39..e3dbe4166836 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -679,56 +679,48 @@
samsung,pmureg-phandle = <&pmu_system_controller>;
};

- amba {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- interrupt-parent = <&gic>;
- ranges;
-
- pdma0: pdma@121a0000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x121A0000 0x1000>;
- interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clock CLK_PDMA0>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
- };
-
- pdma1: pdma@121b0000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x121B0000 0x1000>;
- interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clock CLK_PDMA1>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
- };
-
- mdma0: mdma@10800000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x10800000 0x1000>;
- interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clock CLK_MDMA0>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
- };
-
- mdma1: mdma@11c10000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x11C10000 0x1000>;
- interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clock CLK_MDMA1>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
- };
+ pdma0: pdma@121a0000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x121A0000 0x1000>;
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock CLK_PDMA0>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
+ };
+
+ pdma1: pdma@121b0000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x121B0000 0x1000>;
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock CLK_PDMA1>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
+ };
+
+ mdma0: mdma@10800000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x10800000 0x1000>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock CLK_MDMA0>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <1>;
+ };
+
+ mdma1: mdma@11c10000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x11C10000 0x1000>;
+ interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock CLK_MDMA1>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <1>;
};

gsc_0: gsc@13e00000 {
diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
index 2eab80bf5f3a..abe75b9e39f5 100644
--- a/arch/arm/boot/dts/exynos5410.dtsi
+++ b/arch/arm/boot/dts/exynos5410.dtsi
@@ -189,34 +189,26 @@
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
};

- amba {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- interrupt-parent = <&gic>;
- ranges;
-
- pdma0: pdma@121a0000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x121a0000 0x1000>;
- interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clock CLK_PDMA0>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
- };
+ pdma0: pdma@121a0000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x121a0000 0x1000>;
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock CLK_PDMA0>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
+ };

- pdma1: pdma@121b0000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x121b0000 0x1000>;
- interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clock CLK_PDMA1>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
- };
+ pdma1: pdma@121b0000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x121b0000 0x1000>;
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock CLK_PDMA1>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
};

audi2s0: i2s@3830000 {
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index b672080e7469..c76460b70532 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -433,76 +433,68 @@
power-domains = <&mau_pd>;
};

- amba {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- interrupt-parent = <&gic>;
- ranges;
-
- adma: adma@3880000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x03880000 0x1000>;
- interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clock_audss EXYNOS_ADMA>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <6>;
- #dma-requests = <16>;
- power-domains = <&mau_pd>;
- };
-
- pdma0: pdma@121a0000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x121A0000 0x1000>;
- interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clock CLK_PDMA0>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
- };
-
- pdma1: pdma@121b0000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x121B0000 0x1000>;
- interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clock CLK_PDMA1>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
- };
-
- mdma0: mdma@10800000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x10800000 0x1000>;
- interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clock CLK_MDMA0>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
- };
+ adma: adma@3880000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x03880000 0x1000>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_audss EXYNOS_ADMA>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <6>;
+ #dma-requests = <16>;
+ power-domains = <&mau_pd>;
+ };

- mdma1: mdma@11c10000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x11C10000 0x1000>;
- interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clock CLK_MDMA1>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
- /*
- * MDMA1 can support both secure and non-secure
- * AXI transactions. When this is enabled in
- * the kernel for boards that run in secure
- * mode, we are getting imprecise external
- * aborts causing the kernel to oops.
- */
- status = "disabled";
- };
+ pdma0: pdma@121a0000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x121A0000 0x1000>;
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock CLK_PDMA0>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
+ };
+
+ pdma1: pdma@121b0000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x121B0000 0x1000>;
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock CLK_PDMA1>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
+ };
+
+ mdma0: mdma@10800000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x10800000 0x1000>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock CLK_MDMA0>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <1>;
+ };
+
+ mdma1: mdma@11c10000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x11C10000 0x1000>;
+ interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock CLK_MDMA1>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <1>;
+ /*
+ * MDMA1 can support both secure and non-secure
+ * AXI transactions. When this is enabled in
+ * the kernel for boards that run in secure
+ * mode, we are getting imprecise external
+ * aborts causing the kernel to oops.
+ */
+ status = "disabled";
};

i2s0: i2s@3830000 {
--
2.17.1

2020-07-02 15:53:56

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 7/8] ARM: dts: exynos: Define fixed regulators in root node for consistency in Arndale

Remove the regulators node and define fixed regulators directly under
the root node. This makes Exynos5250 Arndale board consistent with
other Exynos boards.

Suggested-by: Marek Szyprowski <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Changes since v1:
1. New patch
---
arch/arm/boot/dts/exynos5250-arndale.dts | 92 +++++++++++-------------
1 file changed, 43 insertions(+), 49 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index c4cc7611898c..7ccb3814bab6 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -84,60 +84,54 @@
};
};

- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
-
- main_dc_reg: regulator@0 {
- compatible = "regulator-fixed";
- reg = <0>;
- regulator-name = "MAIN_DC";
- regulator-always-on;
- };
+ main_dc_reg: regulator-0 {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "MAIN_DC";
+ regulator-always-on;
+ };

- mmc_reg: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "VDD_MMC";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-always-on;
- };
+ mmc_reg: regulator-1 {
+ compatible = "regulator-fixed";
+ reg = <1>;
+ regulator-name = "VDD_MMC";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ };

- reg_hdmi_en: regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "hdmi-en";
- regulator-always-on;
- };
+ reg_hdmi_en: regulator-2 {
+ compatible = "regulator-fixed";
+ reg = <2>;
+ regulator-name = "hdmi-en";
+ regulator-always-on;
+ };

- vcc_1v2_reg: regulator@3 {
- compatible = "regulator-fixed";
- reg = <3>;
- regulator-name = "VCC_1V2";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-always-on;
- };
+ vcc_1v2_reg: regulator-3 {
+ compatible = "regulator-fixed";
+ reg = <3>;
+ regulator-name = "VCC_1V2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ };

- vcc_1v8_reg: regulator@4 {
- compatible = "regulator-fixed";
- reg = <4>;
- regulator-name = "VCC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
+ vcc_1v8_reg: regulator-4 {
+ compatible = "regulator-fixed";
+ reg = <4>;
+ regulator-name = "VCC_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };

- vcc_3v3_reg: regulator@5 {
- compatible = "regulator-fixed";
- reg = <5>;
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
+ vcc_3v3_reg: regulator-5 {
+ compatible = "regulator-fixed";
+ reg = <5>;
+ regulator-name = "VCC_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
};

sound {
--
2.17.1

2020-07-02 15:54:18

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 6/8] ARM: dts: exynos: Define fixed regulators in root node for consistency in Origen

Remove the regulators node and define fixed regulators directly under
the root node. This makes Exynos4412 Origen board consistent with other
Exynos boards.

Suggested-by: Marek Szyprowski <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Changes since v1:
1. New patch
---
arch/arm/boot/dts/exynos4412-origen.dts | 22 ++++++++--------------
1 file changed, 8 insertions(+), 14 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts
index dc865be40751..74f7cef8acc5 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -33,20 +33,14 @@
reg = <0x0203F000 0x1000>;
};

- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
-
- mmc_reg: regulator@0 {
- compatible = "regulator-fixed";
- reg = <0>;
- regulator-name = "VMEM_VDD_2.8V";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
+ mmc_reg: regulator-0 {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "VMEM_VDD_2.8V";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
};

display-timings {
--
2.17.1

2020-07-02 15:54:27

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 8/8] ARM: dts: exynos: Define fixed regulators in root node for consistency in SMDK5420

Remove the regulators node and define fixed regulators directly under
the root node. This makes SMDK5420 board consistent with other Exynos
boards.

Name the fixed regulator nodes consistently.

Suggested-by: Marek Szyprowski <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Changes since v1:
1. New patch
---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 56 ++++++++++-------------
1 file changed, 25 insertions(+), 31 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index e3f2afe8359a..d703c603c45a 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -32,40 +32,34 @@
};
};

- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
-
- vdd: fixed-regulator@0 {
- compatible = "regulator-fixed";
- reg = <0>;
- regulator-name = "vdd-supply";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
+ vdd: regulator-0 {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "vdd-supply";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };

- dbvdd: fixed-regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "dbvdd-supply";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
+ dbvdd: regulator-1 {
+ compatible = "regulator-fixed";
+ reg = <1>;
+ regulator-name = "dbvdd-supply";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };

- spkvdd: fixed-regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "spkvdd-supply";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
+ spkvdd: regulator-2 {
+ compatible = "regulator-fixed";
+ reg = <2>;
+ regulator-name = "spkvdd-supply";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
};

- usb300_vbus_reg: regulator-usb300 {
+ usb300_vbus_reg: regulator-3 {
compatible = "regulator-fixed";
regulator-name = "VBUS0";
regulator-min-microvolt = <5000000>;
@@ -76,7 +70,7 @@
enable-active-high;
};

- usb301_vbus_reg: regulator-usb301 {
+ usb301_vbus_reg: regulator-4 {
compatible = "regulator-fixed";
regulator-name = "VBUS1";
regulator-min-microvolt = <5000000>;
--
2.17.1

2020-07-02 20:36:54

by Marek Szyprowski

[permalink] [raw]
Subject: Re: [PATCH v2 5/8] ARM: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings

On 02.07.2020 17:51, Krzysztof Kozlowski wrote:
> There is no need to keep DMA controller nodes under AMBA bus node.
> Remove the "amba" node to fix dtschema warnings like:
>
> amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
> ---
>
> Changes since v1:
> 1. Remove the bus, as suggested by Marek
> ---
> arch/arm/boot/dts/exynos3250.dtsi | 47 +++----
> arch/arm/boot/dts/exynos4.dtsi | 70 +++++-----
> .../boot/dts/exynos4210-universal_c210.dts | 2 +-
> arch/arm/boot/dts/exynos5250.dtsi | 92 ++++++-------
> arch/arm/boot/dts/exynos5410.dtsi | 46 +++----
> arch/arm/boot/dts/exynos5420.dtsi | 130 ++++++++----------
> 6 files changed, 174 insertions(+), 213 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
> index 044e5da64a76..d3fb45a56527 100644
> --- a/arch/arm/boot/dts/exynos3250.dtsi
> +++ b/arch/arm/boot/dts/exynos3250.dtsi
> @@ -418,33 +418,26 @@
> status = "disabled";
> };
>
> - amba {
> - compatible = "simple-bus";
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges;
> -
> - pdma0: pdma@12680000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x12680000 0x1000>;
> - interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cmu CLK_PDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - pdma1: pdma@12690000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x12690000 0x1000>;
> - interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cmu CLK_PDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> + pdma0: pdma@12680000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x12680000 0x1000>;
> + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cmu CLK_PDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + pdma1: pdma@12690000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x12690000 0x1000>;
> + interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cmu CLK_PDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> };
>
> adc: adc@126c0000 {
> diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
> index d2779a790ce3..a1e54449f33f 100644
> --- a/arch/arm/boot/dts/exynos4.dtsi
> +++ b/arch/arm/boot/dts/exynos4.dtsi
> @@ -669,45 +669,37 @@
> status = "disabled";
> };
>
> - amba: amba {
> - #address-cells = <1>;
> - #size-cells = <1>;
> - compatible = "simple-bus";
> - interrupt-parent = <&gic>;
> - ranges;
> -
> - pdma0: pdma@12680000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x12680000 0x1000>;
> - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - pdma1: pdma@12690000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x12690000 0x1000>;
> - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - mdma1: mdma@12850000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x12850000 0x1000>;
> - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_MDMA>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> - };
> + pdma0: pdma@12680000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x12680000 0x1000>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + pdma1: pdma@12690000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x12690000 0x1000>;
> + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + mdma1: mdma@12850000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x12850000 0x1000>;
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_MDMA>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <1>;
> };
>
> fimd: fimd@11c00000 {
> diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> index 02fde1a75ebd..e07aa3aa93bd 100644
> --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
> +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> @@ -181,7 +181,7 @@
> };
> };
>
> -&amba {
> +&soc {


What about the alphabetical order of the labels here?


> mdma0: mdma@12840000 {
> compatible = "arm,pl330", "arm,primecell";
> reg = <0x12840000 0x1000>;
> diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
> index b6135af7ef39..e3dbe4166836 100644
> --- a/arch/arm/boot/dts/exynos5250.dtsi
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -679,56 +679,48 @@
> samsung,pmureg-phandle = <&pmu_system_controller>;
> };
>
> - amba {
> - #address-cells = <1>;
> - #size-cells = <1>;
> - compatible = "simple-bus";
> - interrupt-parent = <&gic>;
> - ranges;
> -
> - pdma0: pdma@121a0000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x121A0000 0x1000>;
> - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - pdma1: pdma@121b0000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x121B0000 0x1000>;
> - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - mdma0: mdma@10800000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x10800000 0x1000>;
> - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_MDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> - };
> -
> - mdma1: mdma@11c10000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x11C10000 0x1000>;
> - interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_MDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> - };
> + pdma0: pdma@121a0000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x121A0000 0x1000>;
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + pdma1: pdma@121b0000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x121B0000 0x1000>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + mdma0: mdma@10800000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x10800000 0x1000>;
> + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_MDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <1>;
> + };
> +
> + mdma1: mdma@11c10000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x11C10000 0x1000>;
> + interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_MDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <1>;
> };
>
> gsc_0: gsc@13e00000 {
> diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
> index 2eab80bf5f3a..abe75b9e39f5 100644
> --- a/arch/arm/boot/dts/exynos5410.dtsi
> +++ b/arch/arm/boot/dts/exynos5410.dtsi
> @@ -189,34 +189,26 @@
> interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> - amba {
> - #address-cells = <1>;
> - #size-cells = <1>;
> - compatible = "simple-bus";
> - interrupt-parent = <&gic>;
> - ranges;
> -
> - pdma0: pdma@121a0000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x121a0000 0x1000>;
> - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> + pdma0: pdma@121a0000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x121a0000 0x1000>;
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
>
> - pdma1: pdma@121b0000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x121b0000 0x1000>;
> - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> + pdma1: pdma@121b0000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x121b0000 0x1000>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> };
>
> audi2s0: i2s@3830000 {
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index b672080e7469..c76460b70532 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -433,76 +433,68 @@
> power-domains = <&mau_pd>;
> };
>
> - amba {
> - #address-cells = <1>;
> - #size-cells = <1>;
> - compatible = "simple-bus";
> - interrupt-parent = <&gic>;
> - ranges;
> -
> - adma: adma@3880000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x03880000 0x1000>;
> - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock_audss EXYNOS_ADMA>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <6>;
> - #dma-requests = <16>;
> - power-domains = <&mau_pd>;
> - };
> -
> - pdma0: pdma@121a0000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x121A0000 0x1000>;
> - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - pdma1: pdma@121b0000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x121B0000 0x1000>;
> - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - mdma0: mdma@10800000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x10800000 0x1000>;
> - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_MDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> - };
> + adma: adma@3880000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x03880000 0x1000>;
> + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock_audss EXYNOS_ADMA>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <6>;
> + #dma-requests = <16>;
> + power-domains = <&mau_pd>;
> + };
>
> - mdma1: mdma@11c10000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x11C10000 0x1000>;
> - interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_MDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> - /*
> - * MDMA1 can support both secure and non-secure
> - * AXI transactions. When this is enabled in
> - * the kernel for boards that run in secure
> - * mode, we are getting imprecise external
> - * aborts causing the kernel to oops.
> - */
> - status = "disabled";
> - };
> + pdma0: pdma@121a0000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x121A0000 0x1000>;
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + pdma1: pdma@121b0000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x121B0000 0x1000>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + mdma0: mdma@10800000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x10800000 0x1000>;
> + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_MDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <1>;
> + };
> +
> + mdma1: mdma@11c10000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x11C10000 0x1000>;
> + interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_MDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <1>;
> + /*
> + * MDMA1 can support both secure and non-secure
> + * AXI transactions. When this is enabled in
> + * the kernel for boards that run in secure
> + * mode, we are getting imprecise external
> + * aborts causing the kernel to oops.
> + */
> + status = "disabled";
> };
>
> i2s0: i2s@3830000 {

Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland

2020-07-03 17:11:08

by Alim Akhtar

[permalink] [raw]
Subject: RE: [PATCH v2 2/8] arm64: dts: exynos: Describe PWM interrupts on Exynos7

Hi Krzysztof,

> -----Original Message-----
> From: Krzysztof Kozlowski <[email protected]>
> Sent: 02 July 2020 21:22
> To: Thierry Reding <[email protected]>; Uwe Kleine-König <u.kleine-
> [email protected]>; Lee Jones <[email protected]>; Rob Herring
> <[email protected]>; Kukjin Kim <[email protected]>; Krzysztof Kozlowski
> <[email protected]>; [email protected]; [email protected];
> [email protected]; [email protected]; linux-
> [email protected]
> Cc: Marek Szyprowski <[email protected]>; Bartlomiej Zolnierkiewicz
> <[email protected]>; Sylwester Nawrocki <[email protected]>;
> Alim Akhtar <[email protected]>; Chanwoo Choi
> <[email protected]>; Pankaj Dubey <[email protected]>
> Subject: [PATCH v2 2/8] arm64: dts: exynos: Describe PWM interrupts on
> Exynos7
>
> Add interrupts property to PWM node on Exynos7 to describe the hardware
> fully. No functional change as the interrupts are not used by drivers.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
Reviewed-by: Alim Akhtar <[email protected]>
> ---
>
> Changes since v1:
> 1. Correct the interrupts, change message.
>
> Not tested
> ---
> arch/arm64/boot/dts/exynos/exynos7.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi
> b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> index f590891efe25..709742b98c9c 100644
> --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> @@ -581,6 +581,11 @@
> pwm: pwm@136c0000 {
> compatible = "samsung,exynos4210-pwm";
> reg = <0x136c0000 0x100>;
> + interrupts = <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>;
> samsung,pwm-outputs = <0>, <1>, <2>, <3>;
> #pwm-cells = <3>;
> clocks = <&clock_peric0 PCLK_PWM>;
> --
> 2.17.1



2020-07-03 17:19:26

by Alim Akhtar

[permalink] [raw]
Subject: RE: [PATCH v2 3/8] arm64: dts: exynos: Remove generic arm,armv8-pmuv3 compatible

HI Krzysztof

> -----Original Message-----
> From: Krzysztof Kozlowski <[email protected]>
> Sent: 02 July 2020 21:22
> To: Thierry Reding <[email protected]>; Uwe Kleine-König <u.kleine-
> [email protected]>; Lee Jones <[email protected]>; Rob Herring
> <[email protected]>; Kukjin Kim <[email protected]>; Krzysztof Kozlowski
> <[email protected]>; [email protected]; [email protected];
> [email protected]; [email protected]; linux-
> [email protected]
> Cc: Marek Szyprowski <[email protected]>; Bartlomiej Zolnierkiewicz
> <[email protected]>; Sylwester Nawrocki <[email protected]>;
> Alim Akhtar <[email protected]>; Chanwoo Choi
> <[email protected]>; Pankaj Dubey <[email protected]>
> Subject: [PATCH v2 3/8] arm64: dts: exynos: Remove generic arm,armv8-pmuv3
> compatible
>
> The ARM PMU node is described enough with first compatible so remove the
> arm,armv8-pmuv3 to fix dtschema warnings like:
>
> arm-pmu: compatible: Additional items are not allowed ('arm,armv8-pmuv3'
> was unexpected)
> arm-pmu: compatible: ['arm,cortex-a57-pmu', 'arm,armv8-pmuv3'] is too long
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
Reviewed-by: Alim Akhtar <[email protected]>
> ---
>
> Changes since v1:
> 1. None
>
> Not tested although no effect expected.
> ---
Booted on exynos7 board and see arm PMU still gets registered
Tested-by: Alim Akhtar <[email protected]>



2020-07-03 17:26:32

by Alim Akhtar

[permalink] [raw]
Subject: RE: [PATCH v2 4/8] arm64: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings

Hi Krzysztof

> -----Original Message-----
> From: Krzysztof Kozlowski <[email protected]>
> Sent: 02 July 2020 21:22
> To: Thierry Reding <[email protected]>; Uwe Kleine-König <u.kleine-
> [email protected]>; Lee Jones <[email protected]>; Rob Herring
> <[email protected]>; Kukjin Kim <[email protected]>; Krzysztof Kozlowski
> <[email protected]>; [email protected]; [email protected];
> [email protected]; [email protected]; linux-
> [email protected]
> Cc: Marek Szyprowski <[email protected]>; Bartlomiej Zolnierkiewicz
> <[email protected]>; Sylwester Nawrocki <[email protected]>;
> Alim Akhtar <[email protected]>; Chanwoo Choi
> <[email protected]>; Pankaj Dubey <[email protected]>
> Subject: [PATCH v2 4/8] arm64: dts: exynos: Remove DMA controller bus node
> name to fix dtschema warnings
>
> There is no need to keep DMA controller nodes under AMBA bus node.
> Remove the "amba" node to fix dtschema warnings like:
>
> amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-
> 9a-f]+)?$'
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
Reviewed-by: Alim Akhtar <[email protected]>
> ---
>
> Changes since v1:
> 1. Remove the bus, as suggested by Marek
> ---
> arch/arm64/boot/dts/exynos/exynos5433.dtsi | 47 +++++++++-------------
> arch/arm64/boot/dts/exynos/exynos7.dtsi | 47 +++++++++-------------
> 2 files changed, 40 insertions(+), 54 deletions(-)



2020-07-03 18:02:04

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH v2 3/8] arm64: dts: exynos: Remove generic arm,armv8-pmuv3 compatible

On Thu, Jul 02, 2020 at 05:51:44PM +0200, Krzysztof Kozlowski wrote:
> The ARM PMU node is described enough with first compatible so remove the
> arm,armv8-pmuv3 to fix dtschema warnings like:
>
> arm-pmu: compatible: Additional items are not allowed ('arm,armv8-pmuv3' was unexpected)
> arm-pmu: compatible: ['arm,cortex-a57-pmu', 'arm,armv8-pmuv3'] is too long
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
> ---
>
> Changes since v1:
> 1. None
>
> Not tested although no effect expected.
> ---
> arch/arm64/boot/dts/exynos/exynos5433.dtsi | 4 ++--
> arch/arm64/boot/dts/exynos/exynos7.dtsi | 2 +-

Applied.

Best regards,
Krzysztof

2020-07-03 18:04:35

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH v2 2/8] arm64: dts: exynos: Describe PWM interrupts on Exynos7

On Thu, Jul 02, 2020 at 05:51:43PM +0200, Krzysztof Kozlowski wrote:
> Add interrupts property to PWM node on Exynos7 to describe the hardware
> fully. No functional change as the interrupts are not used by drivers.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
> ---
>
> Changes since v1:
> 1. Correct the interrupts, change message.
>
> Not tested
> ---
> arch/arm64/boot/dts/exynos/exynos7.dtsi | 5 +++++

Applied.

Best regards,
Krzysztof

2020-07-05 18:13:46

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH v2 5/8] ARM: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings

On Thu, Jul 02, 2020 at 10:34:14PM +0200, Marek Szyprowski wrote:
> On 02.07.2020 17:51, Krzysztof Kozlowski wrote:
> > There is no need to keep DMA controller nodes under AMBA bus node.
> > Remove the "amba" node to fix dtschema warnings like:
> >
> > amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
> >
> > Signed-off-by: Krzysztof Kozlowski <[email protected]>
> >
> > ---
> >
> > Changes since v1:
> > 1. Remove the bus, as suggested by Marek
> > ---
> > arch/arm/boot/dts/exynos3250.dtsi | 47 +++----
> > arch/arm/boot/dts/exynos4.dtsi | 70 +++++-----
> > .../boot/dts/exynos4210-universal_c210.dts | 2 +-
> > arch/arm/boot/dts/exynos5250.dtsi | 92 ++++++-------
> > arch/arm/boot/dts/exynos5410.dtsi | 46 +++----
> > arch/arm/boot/dts/exynos5420.dtsi | 130 ++++++++----------
> > 6 files changed, 174 insertions(+), 213 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
> > index 044e5da64a76..d3fb45a56527 100644
> > --- a/arch/arm/boot/dts/exynos3250.dtsi
> > +++ b/arch/arm/boot/dts/exynos3250.dtsi
> > @@ -418,33 +418,26 @@
> > status = "disabled";
> > };
> >
> > - amba {
> > - compatible = "simple-bus";
> > - #address-cells = <1>;
> > - #size-cells = <1>;
> > - ranges;
> > -
> > - pdma0: pdma@12680000 {
> > - compatible = "arm,pl330", "arm,primecell";
> > - reg = <0x12680000 0x1000>;
> > - interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> > - clocks = <&cmu CLK_PDMA0>;
> > - clock-names = "apb_pclk";
> > - #dma-cells = <1>;
> > - #dma-channels = <8>;
> > - #dma-requests = <32>;
> > - };
> > -
> > - pdma1: pdma@12690000 {
> > - compatible = "arm,pl330", "arm,primecell";
> > - reg = <0x12690000 0x1000>;
> > - interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
> > - clocks = <&cmu CLK_PDMA1>;
> > - clock-names = "apb_pclk";
> > - #dma-cells = <1>;
> > - #dma-channels = <8>;
> > - #dma-requests = <32>;
> > - };
> > + pdma0: pdma@12680000 {
> > + compatible = "arm,pl330", "arm,primecell";
> > + reg = <0x12680000 0x1000>;
> > + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cmu CLK_PDMA0>;
> > + clock-names = "apb_pclk";
> > + #dma-cells = <1>;
> > + #dma-channels = <8>;
> > + #dma-requests = <32>;
> > + };
> > +
> > + pdma1: pdma@12690000 {
> > + compatible = "arm,pl330", "arm,primecell";
> > + reg = <0x12690000 0x1000>;
> > + interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cmu CLK_PDMA1>;
> > + clock-names = "apb_pclk";
> > + #dma-cells = <1>;
> > + #dma-channels = <8>;
> > + #dma-requests = <32>;
> > };
> >
> > adc: adc@126c0000 {
> > diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
> > index d2779a790ce3..a1e54449f33f 100644
> > --- a/arch/arm/boot/dts/exynos4.dtsi
> > +++ b/arch/arm/boot/dts/exynos4.dtsi
> > @@ -669,45 +669,37 @@
> > status = "disabled";
> > };
> >
> > - amba: amba {
> > - #address-cells = <1>;
> > - #size-cells = <1>;
> > - compatible = "simple-bus";
> > - interrupt-parent = <&gic>;
> > - ranges;
> > -
> > - pdma0: pdma@12680000 {
> > - compatible = "arm,pl330", "arm,primecell";
> > - reg = <0x12680000 0x1000>;
> > - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> > - clocks = <&clock CLK_PDMA0>;
> > - clock-names = "apb_pclk";
> > - #dma-cells = <1>;
> > - #dma-channels = <8>;
> > - #dma-requests = <32>;
> > - };
> > -
> > - pdma1: pdma@12690000 {
> > - compatible = "arm,pl330", "arm,primecell";
> > - reg = <0x12690000 0x1000>;
> > - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> > - clocks = <&clock CLK_PDMA1>;
> > - clock-names = "apb_pclk";
> > - #dma-cells = <1>;
> > - #dma-channels = <8>;
> > - #dma-requests = <32>;
> > - };
> > -
> > - mdma1: mdma@12850000 {
> > - compatible = "arm,pl330", "arm,primecell";
> > - reg = <0x12850000 0x1000>;
> > - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> > - clocks = <&clock CLK_MDMA>;
> > - clock-names = "apb_pclk";
> > - #dma-cells = <1>;
> > - #dma-channels = <8>;
> > - #dma-requests = <1>;
> > - };
> > + pdma0: pdma@12680000 {
> > + compatible = "arm,pl330", "arm,primecell";
> > + reg = <0x12680000 0x1000>;
> > + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clock CLK_PDMA0>;
> > + clock-names = "apb_pclk";
> > + #dma-cells = <1>;
> > + #dma-channels = <8>;
> > + #dma-requests = <32>;
> > + };
> > +
> > + pdma1: pdma@12690000 {
> > + compatible = "arm,pl330", "arm,primecell";
> > + reg = <0x12690000 0x1000>;
> > + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clock CLK_PDMA1>;
> > + clock-names = "apb_pclk";
> > + #dma-cells = <1>;
> > + #dma-channels = <8>;
> > + #dma-requests = <32>;
> > + };
> > +
> > + mdma1: mdma@12850000 {
> > + compatible = "arm,pl330", "arm,primecell";
> > + reg = <0x12850000 0x1000>;
> > + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clock CLK_MDMA>;
> > + clock-names = "apb_pclk";
> > + #dma-cells = <1>;
> > + #dma-channels = <8>;
> > + #dma-requests = <1>;
> > };
> >
> > fimd: fimd@11c00000 {
> > diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> > index 02fde1a75ebd..e07aa3aa93bd 100644
> > --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
> > +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> > @@ -181,7 +181,7 @@
> > };
> > };
> >
> > -&amba {
> > +&soc {
>
>
> What about the alphabetical order of the labels here?

Yes, I'll keep them ordered. Thanks.

Best regards,
Krzysztof

2020-07-06 09:44:57

by Uwe Kleine-König

[permalink] [raw]
Subject: Re: [PATCH v2 1/8] dt-bindings: pwm: samsung: Do not require interrupts on Exynos SoCs

On Thu, Jul 02, 2020 at 05:51:42PM +0200, Krzysztof Kozlowski wrote:
> The bindings required interrupts for all SoCs but actually only the PWM
> timer clocksource (for S3C/S5P SoCs) was using them. This PWM timer
> clocksource driver is not used on Exynos SoCs thus the interrupts can be
> marked as optional.
>
> Reported-by: Alim Akhtar <[email protected]>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>

LGTM,

Acked-by: Uwe Kleine-K?nig <[email protected]>

I'd expect it is ok to let this patch go in via whatever way the other
patches go. (But it's Thierry who has the authority here.)

Best regards
Uwe

--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | https://www.pengutronix.de/ |


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2020-07-07 06:46:14

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH v2 4/8] arm64: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings

On Thu, Jul 02, 2020 at 05:51:45PM +0200, Krzysztof Kozlowski wrote:
> There is no need to keep DMA controller nodes under AMBA bus node.
> Remove the "amba" node to fix dtschema warnings like:
>
> amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
> ---
>
> Changes since v1:

Applied.

Best regards,
Krzysztof

2020-07-07 18:53:44

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH v2 1/8] dt-bindings: pwm: samsung: Do not require interrupts on Exynos SoCs

On Mon, Jul 06, 2020 at 11:41:57AM +0200, Uwe Kleine-König wrote:
> On Thu, Jul 02, 2020 at 05:51:42PM +0200, Krzysztof Kozlowski wrote:
> > The bindings required interrupts for all SoCs but actually only the PWM
> > timer clocksource (for S3C/S5P SoCs) was using them. This PWM timer
> > clocksource driver is not used on Exynos SoCs thus the interrupts can be
> > marked as optional.
> >
> > Reported-by: Alim Akhtar <[email protected]>
> > Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
> LGTM,
>
> Acked-by: Uwe Kleine-König <[email protected]>
>
> I'd expect it is ok to let this patch go in via whatever way the other
> patches go. (But it's Thierry who has the authority here.)

This patch is independent so it can go either through PWM tree or DT
bindings. Usually the latter, so Rob was picking it up.

Thanks for ack.

Best regards,
Krzysztof

2020-07-14 02:48:08

by Rob Herring (Arm)

[permalink] [raw]
Subject: Re: [PATCH v2 1/8] dt-bindings: pwm: samsung: Do not require interrupts on Exynos SoCs

On Thu, 02 Jul 2020 17:51:42 +0200, Krzysztof Kozlowski wrote:
> The bindings required interrupts for all SoCs but actually only the PWM
> timer clocksource (for S3C/S5P SoCs) was using them. This PWM timer
> clocksource driver is not used on Exynos SoCs thus the interrupts can be
> marked as optional.
>
> Reported-by: Alim Akhtar <[email protected]>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
> ---
>
> Changes since v1:
> 1. New patch
> ---
> .../devicetree/bindings/pwm/pwm-samsung.yaml | 23 +++++++++++++++----
> 1 file changed, 18 insertions(+), 5 deletions(-)
>

Applied, thanks!